Patents Assigned to MEMC
  • Patent number: 6849119
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: February 1, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
  • Patent number: 6846539
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: January 25, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Chang Bum Kim, Steven L. Kimbel, Jeffrey L. Libbert, Mohsen Banan
  • Patent number: 6840997
    Abstract: The present invention relates to a process for growing a single crystal silicon. The process including controlling a growth velocity, v, and an average axial temperature gradient, G0, during the growth of the constant diameter portion of the crystal over the temperature range from solidification to a temperature of no less than about 1325° C., to cause the formation of a first axially symmetrical region in which vacancies, upon cooling of the ingot from the solidification temperature, are the predominant intrinsic point defect and which is substantially free of agglomerated intrinsic point defects, wherein the first axially symmetric region has a width of at least about 50% of the radius of the constant diameter portion of the ingot.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: January 11, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert A. Falster, Joseph C. Holzer, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Publication number: 20040255847
    Abstract: A fluid sealing system is provided for use in a crystal puller for growing a monocrystalline ingot. The crystal puller has a housing, a fluid flow path contained in the housing, and a fluid passage through a wall of the housing for passage of fluid. The fluid sealing system includes a fluid connector head adapted for connection to the fluid passage and to the fluid flow path to establish fluid communication between the fluid flow path and the outside of the housing. The head has a port adapted for fluid communication with the fluid passage through the wall of the housing. First and second seals around the port are adapted for sealing engagement with the head. A space is defined generally between the first and second seals, and a leak detector is arranged to monitor the space for detecting fluid leakage past at least one of the seals.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Carl F. Cherko, Robert D. Cook
  • Patent number: 6828690
    Abstract: A process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the segment. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: December 7, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Publication number: 20040235402
    Abstract: A wafer carrier for retaining at least one semiconductor wafer in a processing apparatus during a processing operation which removes wafer material by at least one of abrading and chemical reaction. The processing apparatus is adapted for removing wafer material from a front side and a back side of each wafer simultaneously. The carrier includes a plate including wafer contaminating material and having an opening and a thickness. An insert has a thickness and is disposed in the opening for receiving at least one wafer and engaging a peripheral edge of the wafer to hold the wafer as the carrier rotates. The thickness of the insert is significantly greater than the thickness of the plate to inhibit removal of material from the plate and thereby inhibit bulk metal contamination of the wafer.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Mick Bjelopavlic, Alexis Grabbe, Michele Haler, Tracy M. Ragan
  • Patent number: 6808781
    Abstract: A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: October 26, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
  • Patent number: 6803576
    Abstract: The present invention is a method for quantitatively measuring nitrogen in Czochralski silicon based on the detection of one or more N—O complexes by means of low temperature Fourier Transform infrared spectroscopy (LT-FTIR) in the far infrared spectral range (FIR).
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: October 12, 2004
    Assignee: MEMC Electronic Materials, SPA
    Inventors: Maria Giovanna Pretto, Maria Porrini, Roberto Scala, Vladimir Voronkov, Paolo Collareta, Robert J. Falster
  • Patent number: 6797062
    Abstract: A heat shield assembly is disclosed for use in a crystal puller for growing a monocrystalline ingot from molten semiconductor source material. The heat shield assembly has a central opening sized and shaped for surrounding the ingot as the ingot is pulled from the molten source material. In one aspect, the heat shield assembly includes a multi-sectioned outer shield and a multi-sectioned inner shield. The sections of at least one of the inner and outer shields may be releasably connected to one another so that, in the event a section is damaged, the sections may be separated to allow replacement with an undamaged section. In another aspect the heat shield assembly includes an upper section and a lower section extending generally downward from the upper section toward the molten material. The lower section has a height equal to at least about 33% of a height of the heat shield assembly.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: September 28, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Lee W. Ferry, Richard G. Schrenker, Hariprasad Sreedharamurthy
  • Patent number: 6776840
    Abstract: A method and apparatus for controlling the diameter of a monocrystalline ingot as it is being pulled from a melt by changing the temperature of the melt. The ingot is pulled from the melt at a target rate that substantially follows a predetermined velocity profile. A temperature model represents variations in the melt temperature in response to variations in power supplied to a heater for heating the melt. In generating a temperature set point representing a target melt temperature, an error between a target diameter and a measured diameter of the ingot is determined and proportional-integral-derivative (PID) control is performed on the error signal. The PID control generates the temperature set point as a function of the error signal. In turn, the temperature model determines a power set point for the power supplied to the heater as a function of the temperature set point generated by the PID control and the power supplied to the heater is adjusted according to the power set point.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: August 17, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert H. Fuerhoff, Steven L. Kimbel
  • Publication number: 20040118333
    Abstract: The present invention is directed to a process for preparing single crystal silicon, in ingot or wafer form, wherein crucible rotation is utilized to control the average axial temperature gradient in the crystal, G0, as a function of radius (i.e., G0(r)), particularly at or near the central axis. Additionally, crucible rotation modulation is utilized to obtain an axially uniform oxygen content therein.
    Type: Application
    Filed: October 31, 2003
    Publication date: June 24, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Zheng Lu, Steven L. Kimbel, Ying Tao
  • Publication number: 20040112277
    Abstract: A crystal puller for growing monocrystalline ingots includes a side heater adjacent a crucible for heating the crucible and a melt heat exchanger sized and shaped for surrounding the ingot and disposed adjacent a surface of the melt. The heat exchanger includes a heat source having an area for radiating heat to the melt for controlling heat transfer at the upper surface of the melt. The melt heat exchanger is adapted to reduce heat loss at the exposed upper surface portion. Methods for growing single crystal silicon crystals having desired defect characteristics are disclosed.
    Type: Application
    Filed: November 10, 2003
    Publication date: June 17, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Milind Kulkarni
  • Patent number: 6749683
    Abstract: A process for controlling the amount of insoluble gas trapped by a silicon melt is disclosed. Polycrystalline silicon is charged to a crucible in a crystal pulling apparatus and the apparatus sealed and evacuated. After evacuation, the crystal pulling apparatus is backfilled at least once with a gas having a high solubility in silicon, such as nitrogen. The highly soluble gas fills in cavities between the polycrystalline silicon pieces and between the pieces and the crucible such that when the silicon is melted and bubbles form in the molten silicon the bubbles will solubilize into the melt instead of becoming entrapped in the growing crystal.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: June 15, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: John D. Holder
  • Publication number: 20040108297
    Abstract: A process for etching silicon wafers using a caustic etchant in the form of an aqueous solution comprising water and a source of hydroxide ions and generally characterized by a lower concentration of water and/or higher concentration of source of hydroxide ions. In accordance with another embodiment, the caustic etchant includes a salt additive. The process produces silicon wafers with improved surface characteristics such as flatness and nanotopography.
    Type: Application
    Filed: September 18, 2003
    Publication date: June 10, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Henry F. Erk, James R. Capstick, Thomas E. Doane, Alexis Grabbe, Judith A. Schmidt, Annlie Sing, Mark G. Stinson, Guoqiang (David) Zhang
  • Patent number: 6743495
    Abstract: A process for manufacturing silicon wafers that reduces the size of silicon wafer surface and/or sub-surface defects without the forming excessive haze. The process entails cleaning the front surface of the silicon wafer at a temperature of at least about 1100° C. by exposing the front surface to a cleaning ambient comprising H2, HF gas, or HCl gas to remove silicon oxide from the front surface and exposing the cleaned front surface of the silicon wafer at a temperature of at least about 1100° C. to a vacuum or an annealing ambient consisting essentially of a mono-atomic noble gas selected from the group consisting of He, Ne, Ar, Kr, and Xe to facilitate the migration of silicon atoms to the exposed agglomerated defects without substantially etching silicon from the front surface of the heated silicon wafer.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: June 1, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Jiri L. Vasat, Andrei Stefanescu, Thomas A. Torack, Gregory M. Wilson
  • Patent number: 6743289
    Abstract: A thermal annealing process for producing a low defect density single crystal silicon wafer. The process includes thermally annealing a wafer having a first axially symmetric region which extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect and is substantially free of agglomerated interstitial defects and a second axially symmetric region which has vacancies as the predominant intrinsic point defect. The wafer is subjected to a thermal anneal at a temperature in excess of about 1000° C. in an atmosphere of hydrogen, argon or a mixture thereof to dissolve agglomerated vacancy defects present in the second axially symmetric region within a layer extending from the front side toward the central plane.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: June 1, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Martin Jeffrey Binns, Alan Wang
  • Publication number: 20040089224
    Abstract: The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects, and a process for the preparation thereof.
    Type: Application
    Filed: October 14, 2003
    Publication date: May 13, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 6726764
    Abstract: A control method for use with a crystal puller for growing a monocrystalline semiconductor crystal from a melt according to the Czochralski process. The method includes defining an initial interval of time for observing growth of the crystal being pulled from the melt and determining diameter variations occurring during the interval. Based on the variations in the crystal diameter, the method defines a function r(t). By performing a best fit routine on the function r(t), the method deduces current values of crystal radius rf, meniscus height hf and growth rate Vgf at the end of the observation interval. The method also includes determining pull rate and heater power parameters as a function of the growth rate to control the crystal puller to minimize variations in both crystal diameter and growth rate during subsequent growth of the crystal.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: April 27, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Paolo Mutti, Vladmir V. Voronknov
  • Publication number: 20040070012
    Abstract: The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects, and a process for the preparation thereof. The process comprises controlling growth conditions, such as growth velocity, v, instantaneous axial temperature gradient, G0, and the cooling rate, within a range of temperatures at which silicon self-interstitials are mobile, in order to prevent the formation of these agglomerated defects. In ingot form, the axially symmetric region has a width, as measured from the circumferential edge of the ingot radially toward the central axis, which is at least about 30% the length of the radius of the ingot. The axially symmetric region additionally has a length, as measured along the central axis, which is at least about 20% the length of the constant diameter portion of the ingot.
    Type: Application
    Filed: August 12, 2003
    Publication date: April 15, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer
  • Patent number: 6712673
    Abstract: A wafer polishing apparatus for polishing a semiconductor wafer. The polisher comprises a base, a turntable, a polishing pad and a head drive mechanism for driven rotation of a polishing head. The polishing head comprises a sealing ring adapted to hold at least one wafer for engaging a front surface of the wafer with a work surface of the polishing pad. The sealing ring allows for application of uniform air pressure over the rear surface of the wafer. The sealing ring is constructed so that the wafer itself defines a portion of a pressure cavity receiving pressurized air.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: March 30, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Peter Albrecht, Ashley Samuel Hull, David Vadnais