Patents Assigned to MEMC
  • Publication number: 20070179659
    Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.
    Type: Application
    Filed: December 28, 2006
    Publication date: August 2, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Roland Vandamme, Milind Bhagavat
  • Publication number: 20070179660
    Abstract: A double side grinder comprises a pair of grinding wheels and a pair of hydrostatic pads operable to hold a flat workpiece (e.g., semiconductor wafer) so that part of the workpiece is positioned between the grinding wheels and part of the workpiece is positioned between the hydrostatic pads. At least one sensor measures a distance between the workpiece and the respective sensor for assessing nanotopology of the workpiece. In a method of the invention, a distance to the workpiece is measured during grinding and used to assess nanotopology of the workpiece. For instance, a finite element structural analysis of the workpiece can be performed using sensor data to derive at least one boundary condition. The nanotopology assessment can begin before the workpiece is removed from the grinder, providing rapid nanotopology feedback. A spatial filter can be used to predict the likely nanotopology of the workpiece after further processing.
    Type: Application
    Filed: December 28, 2006
    Publication date: August 2, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Sumeet Bhagavat, Milind Bhagavat, Roland Vandamme, Tomomi Komura
  • Publication number: 20070169683
    Abstract: The present invention relates to a process for forming single crystal silicon ingots or wafers that contain an axially symmetric region in which vacancies are the predominant intrinsic point defect, that are substantially free of oxidation induced stacking faults, and are nitrogen doped to stabilize oxygen precipitation nuclei therein.
    Type: Application
    Filed: January 15, 2007
    Publication date: July 26, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Hiroyo Haga, Takaaki Aoshima, Mohsen Banan
  • Patent number: 7242037
    Abstract: An electronic power device comprising a single crystal silicon segment being characterized in that the segment comprises a non-uniform distribution of minority carrier recombination centers, the minority carrier recombination centers comprising a substitutional metal, with the concentration of the centers in a bulk layer being greater than the concentration in a surface layer. The centers have a concentration profile in which the peak density of the centers is at or near the central plane with the concentration generally decreasing from the position of peak density in the direction of the front surface of the segment and generally decreasing from the position of peak density in the direction of the back surface of the segment.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: July 10, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Patent number: 7229693
    Abstract: The present invention is directed to a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: June 12, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 7223344
    Abstract: A method of separating, recovering and reusing components of an exhausted slurry used in slicing silicon wafers from a silicon ingot. In the method, the solid particles and lubricating fluid of the exhausted slurry are separated without decreasing the viscosity of the exhausted slurry. The separated lubricating fluid may be collected and reused in the preparation of a fresh slurry. Additionally, the silicon particulate and metal slicing wire particulate are dissolved and separated from the abrasive grains. The abrasive grains are separated into spent abrasive grains and unspent abrasive grains. The separated unspent abrasive grains are suitable for reuse in the preparation of a fresh slurry.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: May 29, 2007
    Assignee: MEMC Electronic Materials, SpA
    Inventors: Carlo Zavattari, Guido Fragiacomo, Elio Portaluppi
  • Patent number: 7223304
    Abstract: Methods and system for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 29, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Zheng Lu
  • Publication number: 20070117350
    Abstract: This invention generally relates to a strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes forming a thin SiO2 layer on a strained silicon layer after it is formed on the donor wafer and before bonding to the handle wafer.
    Type: Application
    Filed: December 27, 2006
    Publication date: May 24, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Michael Seacrist, Lu Fei
  • Patent number: 7217320
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: May 15, 2007
    Assignee: MEMC Electronics Materials, Inc.
    Inventors: Chang Bum Kim, Steven L. Kimbel, Jeffrey L. Libbert, Mohsen Banan
  • Publication number: 20070105279
    Abstract: A process for the preparation of low resistivity arsensic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
    Type: Application
    Filed: November 9, 2005
    Publication date: May 10, 2007
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Vladimir Voronkov, Gabriella Borionetti
  • Patent number: 7201800
    Abstract: A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: April 10, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
  • Publication number: 20070074653
    Abstract: A crystal pulling apparatus for producing a silicon crystal ingot having a reduced amount of metal contamination. The apparatus includes a growth chamber and a component disposed within the growth chamber having a protective layer of silicon nitride for preventing metal contamination of the crystal.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Hariprasad Sreedharamurthy, John Holder, Mohsen Banan
  • Publication number: 20070045738
    Abstract: The present invention is directed to a strained silicon on insulator (SSOI) structure having improved surface characteristics, such as reduced roughness, low concentration of LPDs, and lower contamination, and a method for making such a structure.
    Type: Application
    Filed: August 2, 2006
    Publication date: March 1, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Andrew Jones, Lu Fei
  • Patent number: 7182809
    Abstract: A single crystal silicon, ingot or wafer form, which contains an axially symmetric region in which vacancies are the predominant intrinsic point defect, is substantially free of oxidation induced stacking faults and is nitrogen doped to stabilize oxygen precipitation nuclei therein, and a process for the preparation thereof.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: February 27, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hiroyo Haga, Takaaki Aoshima, Mohsen Banan
  • Publication number: 20070042566
    Abstract: This invention generally relates to strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes a high temperature thermal anneal of a SSOI structure to improve the crystallinity of the strained silicon layer, while maintaining the strain present therein.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 22, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Michael Seacrist, Lu Fei
  • Publication number: 20060263967
    Abstract: The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 23, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Vladimir Voronkov, Galina Voronkova, Anna Batunina
  • Patent number: 7137874
    Abstract: A wafer polishing apparatus for polishing a semiconductor wafer. The polisher comprises a base (23), a turntable (27), a polishing pad (29) and a drive mechanism (45) for driven rotation of a polishing head (63). The polishing head is adapted to hold at least one wafer (35) for engaging a front surface of the wafer with a work surface of the polishing pad. A spherical bearing assembly (75) mounts the polishing head (63) on the drive mechanism for pivoting of the polishing head about a gimbal point (p) lying no higher than the work surface when the polishing head holds the wafer in engagement with the polishing pad. This pivoting allowing the plane of the front surface of the wafer to continuously align itself to equalize polishing pressure over the front surface of the wafer, while rotation of the polishing head is driven by the driving mechanism.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: November 21, 2006
    Assignee: MEMC Electronic Materials, SpA
    Inventors: Ezio Bovio, Paride Corbellini, Marco Morganti, Giovanni Negri, Peter D. Albrecht
  • Patent number: 7135351
    Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: November 14, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Martin J. Binns, Robert J. Falster, Jeffrey L. Libbert
  • Patent number: 7132091
    Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.003 ?·cm.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 7, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind Kulkarni, Mohsen Banan, Christopher V. Luers
  • Patent number: 7125450
    Abstract: The present invention is directed to a process for preparing single crystal silicon, in ingot or wafer form, wherein crucible rotation is utilized to control the average axial temperature gradient in the crystal, G0, as a function of radius (i.e., G0(r)), particularly at or near the central axis. Additionally, crucible rotation modulation is utilized to obtain an axially uniform oxygen content therein.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: October 24, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Zheng Lu, Steven L. Kimbel, Ying Tao