Abstract: The present invention relates to SiC nanostructures, including SiC nanopowder, SiC nanowires, and composites of SiC nanopowder and nanowires, which can be used as catalyst supports in membrane electrode assemblies and in fuel cells. The present invention also relates to composite catalyst supports comprising nanopowder and one or more inorganic nanowires for a membrane electrode assembly.

Abstract: The present invention provides methods and systems for nanowire alignment and deposition. Energizing (e.g., an alternating current electric field) is used to align and associate nanowires with electrodes. By modulating the energizing, the nanowires are coupled to the electrodes such that they remain in place during subsequent wash and drying steps. The invention also provides methods for transferring nanowires from one substrate to another in order to prepare various device substrates. The present invention also provides methods for monitoring and controlling the number of nanowires deposited at a particular electrode pair, as well as methods for manipulating nanowires in solution.

Abstract: An object of the present invention is to implement a method for aligning microscopic structures in desired locations and in a desired direction, in order to align microscopic structures, such as nanostructures, with high precision. The method includes a substrate forming step of forming three electrodes to which independent potentials can be applied, a microscopic structure liquid applying step of applying a liquid in which microscopic structures are dispersed to the insulating substrate, and a microscopic structure aligning step of applying respective voltages to the three electrodes to align the microscopic structures in locations defined by the electrodes.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).

Abstract: An integrated circuit device of the present invention includes a substrate on which at least two types of nano wire element are provided. These nano wire elements have functions and materials different from each other. The nano wire elements are constituted by nano wires having sizes differing depending on types of nano wire element. With this, it is possible to dramatically improve a function of the integrated circuit device, as compared with an integrated circuit device including a substrate on which one type of nano wire element is provided.

Abstract: Methods for producing Group 10 metal nanostructures are provided. The methods involve novel precursors, novel surfactants, or novel precursor-surfactant combinations. Compositions related to the methods are also featured.

Abstract: Graded artificial dielectrics using nanostructures, such as nanowires, are disclosed. The graded artificial dielectric includes a material (typically a dielectric) with a plurality of nanostructures, such as nanowires, embedded within the dielectric material. One or more characteristics of the nanostructures are spatially varied from a first region within the dielectric to a second region within the dielectric to produce permittivity of the graded artificial dielectric that is spatially varied. The characteristics that can be varied include, but are not limited to, nanostructure density, nanostructure length, nanostructure aspect ratio, nanostructure oxide ratio, and nanostructure alignment. Methods of producing graded artificial dielectrics are also provided. A wide range of electronic devices such as antennas can use graded artificial dielectrics with nanostructures to improve performance.

Abstract: Methods for producing nanostructures, particularly Group III-V semiconductor nanostructures, are provided. The methods include use of novel Group III and/or Group V precursors, novel surfactants, oxide acceptors, high temperature, and/or stable co-products. Related compositions are also described. Methods and compositions for producing Group III inorganic compounds that can be used as precursors for nanostructure synthesis are provided. Methods for increasing the yield of nanostructures from a synthesis reaction by removal of a vaporous by-product are also described.

Abstract: The present invention relates to interfacial layers for use m membrane electrode assemblies that comprise nanowire-supported catalysts, and fuel cells comprising such membrane electrode assemblies. The present invention also relates to methods of preparing membrane electrode assemblies and fuel cells comprising interfacial layers and nanowire-supported catalysts.

Abstract: The present invention relates to electrochemical catalyst particles, including nanoparticles, which can be used membrane electrode assemblies and in fuel cells. In exemplary embodiments, the present invention provides electrochemical catalysts supported by various materials. Suitably the catalysts have an atomic ratio of oxygen to a metal in the nanoparticle of about 3 to about 6.

Abstract: This invention provides composite materials comprising nanostructures (e.g., nanowires, branched nanowires, nanotetrapods, nanocrystals, and nanoparticles). Methods and compositions for making such nanocomposites are also provided, as are articles comprising such composites. Waveguides and light concentrators comprising nanostructures (not necessarily as part of a nanocomposite) are additional features of the invention.

Abstract: A nonvolatile memory cell includes a substrate comprising a source, drain, and channel between the source and the drain. A tunnel dielectric layer overlies the channel, and a localized charge storage layer is disposed between the tunnel dielectric layer and a control dielectric layer. A gate electrode has a first surface adjacent to the control dielectric layer, and the first surface includes a midsection and two edge portions. According to one embodiment, the midsection defines a plane, and at least one edge portion extends away from the plane. Preferably, the edge portion extending away from the plane converges toward an opposing second surface of the gate electrode. According to another embodiment, the gate electrode of the nonvolatile memory cell includes a first sublayer and a second sublayer of a different width on the first sublayer.

Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

Abstract: Porous nanofiber bearing substrate materials are provided having enhanced surface area for a variety of applications including as electrical substrates, semipermeable membranes and barriers, structural lattices for tissue culturing and for composite materials, and the like.

Abstract: This invention provides novel super-liquidphobic nanofibers and structures comprising such nanofibers, as well as methods and uses for such nanofibers.

Abstract: The present invention is directed to compositions of matter, systems, and methods to manufacture nanowires. In an embodiment, a method to produce a catalytic-coated nanowire growth substrate for nanowire growth is disclosed which comprises: (a) depositing a buffer layer on a substrate; (b) treating the buffer layer with boiled water or steam to enhance interactions between the buffer layer and catalyst particles; and (c) depositing catalytic particles on a surface of the buffer layer. Methods to develop and use this catalytic-coated nanowire growth substrate are disclosed.

Abstract: Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.

Abstract: The present invention discloses nanowires for use in a fuel cell comprising a metal catalyst deposited on a surface of the nanowires. A membrane electrode assembly for a fuel cell is disclosed which generally comprises a proton exchange membrane, an anode electrode, and a cathode electrode, wherein at least one or more of the anode electrode and cathode electrode comprise an interconnected network of the catalyst supported nanowires. Methods are also disclosed for preparing a membrane electrode assembly and fuel cell based upon an interconnected network of nanowires.

Abstract: The present invention discloses nanowires for use in a fuel cell comprising a metal catalyst deposited on a surface of the nanowires. A membrane electrode assembly for a fuel cell is disclosed which generally comprises a proton exchange membrane, an anode electrode, and a cathode electrode, wherein at least one or more of the anode electrode and cathode electrode comprise an interconnected network of the catalyst supported nanowires. Methods are also disclosed for preparing a membrane electrode assembly and fuel cell based upon an interconnected network of nanowires.

Abstract: Graded artificial dielectrics using nanostructures, such as nanowires, are disclosed. The graded artificial dielectric includes a material (typically a dielectric) with a plurality of nanostructures, such as nanowires, embedded within the dielectric material. One or more characteristics of the nanostructures are spatially varied from a first region within the dielectric to a second region within the dielectric to produce permittivity of the graded artificial dielectric that is spatially varied. The characteristics that can be varied include, but are not limited to, nanostructure density, nanostructure length, nanostructure aspect ratio, nanostructure oxide ratio, and nanostructure alignment. Methods of producing graded artificial dielectrics are also provided. A wide range of electronic devices such as antennas can use graded artificial dielectrics with nanostructures to improve performance.