Patents Assigned to National Semiconductor Corporation
  • Patent number: 10311825
    Abstract: An LC display driver including a gamma reference circuit to generate N gamma-compensated reference voltages based on at least one pre-defined gamma curve divided into M regions defined by M+1 breakpoint voltages, each generated by a range-region DAC coupled to a subset of voltage taps of a range resistor string (some subsets overlapping). An output circuit generates the N gamma-compensated reference voltages, and includes a reference resistor string with N reference voltage taps, and M+1 breakpoint locations to receive respective breakpoint voltages, the N reference voltage taps divided into M subsets corresponding to the M regions of the gamma curve, each of the M subsets of reference voltage taps forming a voltage divider. N output selector circuits output a corresponding one of the N gamma-compensated reference voltages based on a respective reference voltage tap and the associated voltage divider.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: June 4, 2019
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Christopher Ludden, Imre Knausz
  • Patent number: 10153383
    Abstract: An apparatus and method that controls the power produced by a string of solar cells, enabling the string to operate at its maximum power point when connected to a bus that operates at an externally controlled voltage. The apparatus and method can also be used to increase or decrease the output power of a string to any desired operating point.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: December 11, 2018
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Andrew Foss
  • Patent number: 10141749
    Abstract: One heuristic for tuning a wireless power transfer device includes monitoring a circuit parameter while sweeping a power source frequency; identifying two frequencies related to local maxima of the circuit parameter values; estimating self-resonant frequency of an electromagnetically coupled device based on the two frequencies; determining a value for a tuning component of the wireless power transfer device such that the device self-resonant frequency equals the estimated coupled device self-resonant frequency; and adjusting the tuning component to the determined value.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: November 27, 2018
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Vijay N. Choudhary, Robert Loke
  • Patent number: 10042009
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: August 7, 2018
    Assignee: National Semiconductor Corporation
    Inventors: Philipp Lindorfer, Peter J Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa
  • Patent number: 9863817
    Abstract: A battery temperature monitoring circuit, which has a cold comparator and a hot comparator, achieves high accuracy in a small cell size by utilizing a cold current optimized for the cold comparator and a cold reference voltage, and a hot current optimized for the hot comparator and a hot reference voltage, along with switching circuitry that provides the cold current to the cold comparator as the battery temperature approaches the cold trip temperature, and the hot current to the hot comparator as the battery temperature approaches the hot trip temperature.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: January 9, 2018
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Luan Minh Vu, Thomas Y. Tse, Tuong Hoang
  • Patent number: 9716167
    Abstract: A trench DMOS transistor with a very low on-state drain-to-source resistance and a high gate-to-drain charge includes one or more floating islands that lie between the gate and drain to reduce the charge coupling between the gate and drain, and effectively lower the gate-to-drain capacitance.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: July 25, 2017
    Assignee: National Semiconductor Corporation
    Inventors: Yaojian Leng, Richard Wendell Foote, Jr., Steven J. Adler
  • Patent number: 9543296
    Abstract: In a dual direction ESD protection circuit formed from multiple base-emitter fingers that include a SiGe base region, and a common sub-collector region, the I-V characteristics are adjusted by including P+ regions to define SCR structures that are operable to sink positive and negative ESD pulses, and adjusting the layout and distances between regions and the number of regions.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: January 10, 2017
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Vladislav Vashchenko
  • Patent number: 9444284
    Abstract: A bi-directional charging device includes a rechargeable battery, a coil coupled to the rechargeable battery, a selection mechanism that selectively causes power to be delivered from the coil to the battery and selectively causes power to be delivered from the battery to the coil, and a control mechanism. Upon determining that the coil is to provide power to the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the coil to the battery, and upon determining that the coil is to receive power from the battery, the control mechanism causes the selection mechanism to selectively cause power to be delivered from the battery to the coil. The bi-directional charging device includes a housing enclosing the rechargeable battery, the coil, the selection mechanism, and the control mechanism.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: September 13, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: James E. Schuessler
  • Patent number: 9418611
    Abstract: The line banding image artifact that results from the interaction of LCD ripple and LED flicker in an LCD device that utilizes LED backlighting strings is substantially reduced by selecting a number of LED strings, individually driving the number of LED strings with a corresponding number of identical clock signals that are equally phase delayed, and selecting the frequency of the clock signals so that the product of the frequency of the clock signal multiplied by the number of LED strings is equal to the line clock frequency.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: August 16, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tuomas Tapani Tuikkanen, Jeremy K. Yaeger, Mikko Topi Loikkanen, Tomi Juhani Koskela
  • Patent number: 9385199
    Abstract: A method includes forming a relaxed layer in a semiconductor device. The method also includes forming a tensile layer over the relaxed layer, where the tensile layer has tensile stress. The method further includes forming a compressive layer over the relaxed layer, where the compressive layer has compressive stress. The compressive layer has a piezoelectric polarization that is approximately equal to or greater than a spontaneous polarization in the relaxed, tensile, and compressive layers. The piezoelectric polarization in the compressive layer could be in an opposite direction than the spontaneous polarization in the compressive layer. The relaxed layer could include gallium nitride, the tensile layer could include aluminum gallium nitride, and the compressive layer could include aluminum indium gallium nitride.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: July 5, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Jamal Ramdani
  • Patent number: 9370064
    Abstract: A device driver which includes an input driver configured to produce a sequence of uncompensated drive signals along with compensation circuitry connected to receive the uncompensated drive signals and to produce corresponding compensated drive signals. The compensation circuitry is capable of storing two or less control points that define a single compensation curve such as a Bezier curve, with the compensation circuitry converting the uncompensated drive signals to the corresponding compensated drive signals utilizing the control points. An output driver is configured to drive a device such as one or more light emitting diodes to be connected to the output driver with the compensated drive signals.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: June 14, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventor: David James Fensore
  • Patent number: 9363067
    Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: June 7, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
  • Patent number: 9313853
    Abstract: A method includes providing an input signal identifying a desired brightness for one or more LEDs to first and second parallel control paths. The method also includes generating a digital modulation control signal using the first control path, generating a current control signal using the second control path, and driving the one or more LEDs using the control signals. The method further includes performing compensation in at least one of the control paths to compensate for an increased efficiency of the one or more LEDs. Generating the control signals could include (i) adjusting the digital modulation control signal while maintaining the current control signal at a substantially constant value for a range of lower LED brightness values and (ii) adjusting the current control signal while maintaining the digital modulation control signal at a maximum value or within a range of maximum values for a range of higher LED brightness values.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 12, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Ari K. Väänänen, Mauri K. Määttä, T. Tapani Tuikkanen
  • Patent number: 9305540
    Abstract: A system and method for processing close talking differential microphone array (CTDMA) signals in which incoming microphone signals are transformed from time domain signals to frequency domain signals having separable magnitude and phase information. Processing of the frequency domain signals is performed using the magnitude information, following which phase information is reintroduced using phase information of one of the original frequency domain signals. As a result, high pass filtering effects of conventional differential signal processing of CTDMA signals are substantially avoided.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: April 5, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yunhong Li, Lin Sun, Wei Ma
  • Patent number: 9264682
    Abstract: An apparatus is provided, which includes a driving circuit. The driving circuit includes a gamma reference source and a liquid crystal display (LCD) source driver circuit. A first resistor string is provided. A plurality of digital-to-analog converters (DACs) are provided, where each DAC is coupled to the first resistor string. An output circuit having a second resistor string is provided so as to output a plurality of reference voltages. The LCD source driver circuit is coupled to the output circuit of the gamma reference source. The source driver is configured to receive the plurality of reference voltages, wherein the plurality of reference voltages are arranged in a first sequence during a positive polarity cycle and are arranged in a second sequence during a negative polarity cycle. The fifth sequence is an inverse of the fourth sequence.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: February 16, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Christopher Ludden, Imre Knausz
  • Patent number: 9250298
    Abstract: An apparatus includes a sense module configured to be coupled to at least one power supply, where the sense module has a first leg. The apparatus also includes a replica module having a second leg, where the first and second legs have a common structure. The apparatus further includes a feedback loop configured to cause an output voltage across terminals of the replica module to at least substantially equal an input voltage across terminals of the sense module based on sense currents in the first and second legs. At least one cascode stage coupled to the sense module can be configured to reduce a voltage at which one or more signals from the sense module are referenced. One or more trim units can be used to reduce a gain error and/or an offset error between the input voltage and the output voltage.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: February 2, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Athos Canclini, Willem Johannes Kindt
  • Patent number: 9235413
    Abstract: In semiconductor wafer manufacturing, processes such as analyzing test data associated with semiconductor wafers, interpreting the test data analysis, and acting on the test data interpretation and analysis are automated. Such automation can eliminate delays that were previously imposed by the action of test analysis engineers and wafer fabrication personnel, thereby reducing the amount of useless material that is produced before a process defect can be detected.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: January 12, 2016
    Assignee: National Semiconductor Corporation
    Inventors: William MacDonald, George Logsdon, Matthew Lascom, Steven Craig Gessler
  • Patent number: 9231412
    Abstract: In a wireless power transfer system with multiple receivers, receiver management may be necessary to effectively provide power to the multiple receivers. In one implementation, receiver management includes sweeping or stepping the transmitter resonant and/or operating frequency. In another implementation, receiver management includes receiver self-management, in which the receiver load current duty cycle is controlled to maintain receiver voltage even in the presence of multiple receivers. In another implementation, receiver management includes receiver self-management, in which one or more receivers use a time-sharing heuristic to identify when other receivers are charging and wait to begin receiving a transfer of power until another receiver has stopped receiving a transfer of power.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: January 5, 2016
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Gianpaolo Lisi, Gerard G. Socci, Ali Djabbari, Ali Kiaei, Ahmad R. S. Bahai, Jeffrey Anthony Morroni
  • Patent number: 9203380
    Abstract: One heuristic for tuning a wireless power transfer device includes monitoring a circuit parameter while sweeping a power source frequency; identifying two frequencies related to local maxima of the circuit parameter values; estimating self-resonant frequency of an electromagnetically coupled device based on the two frequencies; determining a value for a tuning component of the wireless power transfer device such that the device self-resonant frequency equals the estimated coupled device self-resonant frequency; and adjusting the tuning component to the determined value.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: December 1, 2015
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Vijay N. Choudhary, Robert Loke
  • Patent number: 9201124
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 1, 2015
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Philipp Lindorfer, Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa