Abstract: An error amplifier includes a first amplification circuit with a reference signal input and a feedback signal input representing the amplitude of a load voltage of a switched mode power supply. The error amplifier includes a difference amplifier providing a difference signal representing a difference between the reference signal and the feedback signal, provided for determining the duty cycle of a switching signal in the switched mode power supply. The first amplification circuit further includes a control circuit providing a control signal generated as a function of the difference between the reference signal and the feedback signal. The error amplifier also includes a second amplification circuit, included in a compensation circuit. The second amplification circuit receives the control signal, and the operating current of the second amplification circuit is adjusted by an amount indicated by the control signal.

Abstract: A semiconductor structure, which serves as the core of a semiconductor fabrication platform, has a combination of empty-well regions and filled-well regions variously used by electronic elements, particularly insulated-gate field-effect transistors (“IGFETs”), to achieve desired electronic characteristics. A relatively small amount of semiconductor well dopant is near the top of an empty well. A considerable amount of semiconductor well dopant is near the top of a filled well. Some IGFETs (100, 102, 112, 114, 124, and 126) utilize empty wells (180, 182, 192, 194, 204, and 206) in achieving desired transistor characteristics. Other IGFETs (108, 110, 116, 118, 120, and 122) utilize filled wells (188, 190, 196, 198, 200, and 202) in achieving desired transistor characteristics.

Abstract: A semiconductor package configured to attain a thin profile and low moisture sensitivity. Packages of this invention can include a semiconductor die mounted on a die attachment site of a leadframe and further connected with a plurality of elongate I/O leads arranged about the die attach pad and extending in said first direction. The leadframe having an “up-set” bonding pad arranged with a bonding support for supporting a plurality of wire bonds and a large mold flow aperture in the up-set bonding pad. The package encapsulated in a mold material that surrounds the bonding support and flows through the large mold flow aperture to establish well supported wire bonds such that the package has low moisture sensitivity.

Abstract: A method includes receiving a sense signal having multiple pulses, where the sense signal is based on an output of a dimmer. The method also includes, for each of multiple sampling periods, (i) identifying at least one pulse duty cycle for at least one pulse in the sense signal during that sampling period and (ii) generating an output value identifying a duty cycle for driving one or more light emitting diodes (LEDs). The output value is based on the at least one pulse duty cycle. The method further includes filtering the output values using a filter and adjusting the filter based on a rate at which the output of the dimmer changes. The filter could be adjusted by controlling whether an additional resistor forms part of an RC filter based on a sampling state.

Abstract: A Schottky diode optimizes the on state resistance, the reverse leakage current, and the reverse breakdown voltage of the Schottky diode by forming an insulated control gate over a region that lies between the metal-silicon junction of the Schottky diode and the n+ cathode contact of the Schottky diode.

Abstract: A semiconductor capacitor with large area plates and a small footprint is formed on a semiconductor wafer by forming an opening in the wafer, depositing a first metal atoms through a first shadow mask that lies spaced apart from the wafer to form a first metal layer in the opening, a dielectric layer on the first metal layer, and a second metal atoms through a second shadow mask that lies spaced apart from the wafer to form a second metal layer on the dielectric layer.

Abstract: An electrically tunable inductor with an equivalent inductance includes a main winding and a tuning winding magnetically coupled to the main winding. The current through the tuning winding is controlled to adjust the equivalent inductance of the electrically tunable inductor. A device may include an electrically tunable inductor. A system may include multiple devices, one or more of the devices including an electrically tunable inductor. A tuning controller within the system may control the current in tuning windings of one or more of the multiple devices in the system. When an electrically tunable inductor is part of a resonant circuit, the resonant frequency may be controlled by adjusting the equivalent inductance of the electrically tunable inductor through controlling the current in the tuning winding. Controlling the current in the tuning winding includes one or more of controlling the peak, direction, frequency, duty cycle, or phase of the current.

Abstract: A method includes forming a stress compensating stack over a substrate, where the stress compensating stack has compressive stress on the substrate. The method also includes forming one or more Group III-nitride islands over the substrate, where the one or more Group III-nitride islands have tensile stress on the substrate. The method further includes at least partially counteracting the tensile stress from the one or more Group III-nitride islands using the compressive stress from the stress compensating stack. Forming the stress compensating stack could include forming one or more oxide layers and one or more nitride layers over the substrate. The one or more oxide layers can have compressive stress, the one or more nitride layers can have tensile stress, and the oxide and nitride layers could collectively have compressive stress. Thicknesses of the oxide and nitride layers can be selected to provide the desired amount of stress compensation.

Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to: receive design parameters indicative of a plurality of power supply loads to be powered; determine a plurality of power supply architectures that may be used to provide power supply solutions satisfying the plurality of loads, each power supply architecture including at least one position requiring a component configured to satisfy a load requirement; for each one of at least a subset of the plurality of power supply architectures, determine, based on the characteristics of the plurality of components, at least one component configured to satisfy the corresponding load requirement for each position of the one of the power supply architectures; and generate at least one power supply design in accordance with the power supply architectures and the determined components.

Abstract: A method includes forming one or more capacitors over a substrate. The method also includes forming a transformer at least partially over the substrate. The transformer is adjacent to at least one of the one or more capacitors. At least a portion of the transformer is formed at a same level over the substrate as the one or more capacitors. The method further includes coupling the one or more capacitors and the transformer to at least one embedded integrated circuit die. The one or more capacitors, the transformer, and the at least one embedded integrated circuit die form at least part of a light emitting diode (LED) driver.

Abstract: Separate control of the operation of an audio amplifier and a charge pump that synthesizes a negative voltage supply (VSS) for improving the dynamic range of the audio amplifier. The audio amplifier is typically powered by a single positive power supply (VDD) and the charge pump is arranged to synthesize a negative voltage supply rail (VSS) that enables a greater dynamic range for the amplifier's “on” and “shut down” modes of operation. Also, when the audio amplifier enters its shut down mode of operation to create at least some isolation from Line_In audio signals provided at the amplifier's output by other electronic devices, the amplifier's charge pump stays “on” and continues to provide the negative voltage supply rail (VSS). In this way, the greater dynamic range offered by the presence of both the positive and negative voltage rails is provided even if the amplifier is in a shut down mode.

Abstract: A system includes a load and a single-ended primary-inductance converter (SEPIC) power converter configured to provide power to the load. The SEPIC power converter includes a primary side and a secondary side that are electrically isolated by a transformer. The transformer includes a primary coil and a secondary coil. The primary side includes (i) a capacitor coupled to a first end of the primary coil and (ii) an inductor and a switch coupled to a second end of the primary coil. The primary side of the SEPIC power converter could also include a diode coupled between the inductor and the switch, where the diode is coupled to the second end of the primary coil. The capacitor could be configured to transfer energy to the secondary side of the SEPIC power converter through the transformer during valleys associated with a rectified input voltage.

Abstract: An enhancement-mode GaN MOSFET with a low leakage current and an improved reliability is formed by utilizing a SiO2/Si3N4 gate insulation layer on an AlGaN (or InAlGaN) barrier layer. The Si3N4 portion of the SiO2/Si3N4 gate insulation layer significantly reduces the formation of interface states at the junction between the gate insulation layer and the barrier layer, while the SiO2 portion of the SiO2/Si3N4 gate insulation layer significantly reduces the leakage current.

Abstract: A fluxgate magnetometer is formed in a semiconductor wafer fabrication sequence, which significantly reduces the size and cost of the fluxgate magnetometer. The semiconductor wafer fabrication sequence attaches a die, which has drive and sense circuits, to the bottom surface of a cavity formed in a larger structure, and forms drive and sense coils around a magnetic core structure on the top surface of the larger structure.

Abstract: An optically-controlled shunt (OCS) circuit includes a switch and a light sampler. The light sampler is coupled to the switch and is configured to sample light at a photovoltaic (PV) cell corresponding to the OCS circuit and to turn on the switch when the sampled light comprises insufficient light for the PV cell. The light sampler may also be configured to turn off the switch when the sampled light comprises sufficient light for the PV cell. The light sampler may further be configured to partially turn on the switch when the sampled light comprises adequate light for the PV cell and to turn off the switch when the sampled light comprises full light for the PV cell. The switch could include a transistor, and the light sampler could include a photodiode.

Abstract: An anneal recipe is provided to tighten the distribution of resistance values in the manufacture of semiconductor integrated circuits. An adjusted amount of dopant is implanted to compensate for a shift in the distribution of resistance values associated with the anneal recipe. The distribution tightening can be effectuated by including an ammonia gas flow in the anneal recipe.

Abstract: A system and method is disclosed for manufacturing thin film resistors using a trench and chemical mechanical polishing. A trench is etched in a layer of dielectric material and a thin film resistor layer is deposited so that the thin film resistor layer lines the trench. A thin film resistor protection layer is then deposited to fill the trench. Then a chemical mechanical polishing process removes excess portions of the thin film resistor layer and the thin film resistor protection layer. An interconnect metal is then deposited and patterned to create an opening over the trench. A central portion of the thin film resistor protection material is removed down to the thin film resistor layer at the bottom of the trench. The resulting structure is immune to the effects of topography on the critical dimensions (CDs) of the thin film resistor.

Abstract: Methods and systems are described for enabling the efficient fabrication of small form factor power converters and also the small form factor power converter devices.

Abstract: An insulated-gate field-effect transistor (110, 114, or 122) is fabricated so that its gate dielectric layer (500, 566, or 700) contains nitrogen having a vertical concentration profile specially tailored to prevent boron in the overlying gate electrode (502, 568, or 702) from significantly penetrating through the gate dielectric layer into the underlying channel zone (484, 554, or 684) while simultaneously avoiding the movement of nitrogen from the gate dielectric layer into the underlying semiconductor body. Damage which could otherwise result from undesired boron in the channel zone and from undesired nitrogen in the semiconductor body is substantially avoided.

Abstract: A method includes identifying a position of a user's touch on a touch screen, a velocity of the user's touch across the touch screen, and a pressure of the user's touch on the touch screen. The method also includes generating at least one drive signal for driving one or more actuators associated with the touch screen and outputting the at least one drive signal. The at least one drive signal is configured to cause the one or more actuators to generate a desired haptic texture on the touch screen. The at least one drive signal is based on the position, the velocity, and the pressure. For example, a waveform of the at least one drive signal could be based on the position. Also, groups of pulses in the at least one drive signal could have a frequency and waveform based on the velocity or an amplitude based on the pressure.