Patents Assigned to National Semiconductor Corporation
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Patent number: 9178407Abstract: A battery charger circuit having a regulator controller configured to control the switching transistors of a switching voltage regulator. A power path switch is disposed intermediate an output of the switching voltage regulator and a terminal of a battery to be charged, with the power path switch including at least two transistor segments having common respective drain electrodes, common respective source electrodes and separate respective gate electrodes. A power path switch controller operates to sequentially turn ON the at least two transistor segments of the power path switch, preferably in the order of a decreasing ON resistance.Type: GrantFiled: August 17, 2011Date of Patent: November 3, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Sanjay Gurlahosur
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Patent number: 9111753Abstract: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.Type: GrantFiled: June 11, 2014Date of Patent: August 18, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Jamal Ramdani
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Patent number: 9093846Abstract: A methodology for regulating power supplied to a powered component based on hardware performance, such as may be used in a system that includes the powered component and a switching regulator (EMU or energy management unit) configured to supply a regulated supply voltage to the powered component. Performance monitoring circuitry generates a performance monitoring signal corresponding to a detected performance level of selected digital operations of the powered component relative to a reference performance level. Switching control circuitry provides a switching control signal in response to the performance monitoring signal. In an example embodiments, the switching control circuitry for the switching regulator (switching transistor) is integrated into the powered component, and the detected performance level corresponds to a detected signal path delay associated with the digital operations of the powered component.Type: GrantFiled: February 27, 2013Date of Patent: July 28, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Mark Hartman
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Patent number: 9087164Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to receive design requirements indicative of desired power supply designs; query the database for components that satisfy the design requirements; determine a plurality of power supply designs in accordance with the components and the design parameters; determine key parameters of at least a subset of the determined power supply designs; and rank the power supply designs.Type: GrantFiled: August 26, 2010Date of Patent: July 21, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Jeffrey R. Perry, Khanh Nhat Vo, Dien Mac, Martin Garrison, Phil Gibson
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Patent number: 9088307Abstract: A wireless power transfer system includes: a non-resonant transmitter, or a transmitter with a resonant circuit; and a non-resonant receiver, or a receiver with a resonant circuit. In some implementations, a transmitter with a resonant circuit is operated away from its resonance frequency. In some implementations, a receiver with a resonant circuit is operated away from the transmitter resonance frequency and/or the transmitter operating frequency. In some implementations, the selection of receiver resonance frequency is based on receiver power requirements. Thus, wireless power transfer may be accomplished by operating away from resonance in a quasi-resonant or non-resonant mode, and further may be accomplished using a non-resonant transmitter and/or a non-resonant receiver. Effective power transfer may also be achieved between a transmitter and multiple receivers. A combination of resonant and non-resonant transmitter and receiver(s) may be used for power transfer.Type: GrantFiled: December 19, 2011Date of Patent: July 21, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Gianpaolo Lisi, Gerard G. Socci, Ali Djabbari, Kosha Mahmodieh
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Patent number: 9082817Abstract: A method includes forming a first epitaxial layer over a semiconductor substrate and etching the first epitaxial layer to form multiple separated first epitaxial regions. The method also includes forming a second epitaxial layer over the etched first epitaxial layer. Each epitaxial layer includes at least one Group III-nitride, and the epitaxial layers collectively form a buffer. The method further includes forming a device layer over the buffer and fabricating a semiconductor device using the device layer. The second epitaxial layer could include second epitaxial regions substantially only on the first epitaxial regions. The second epitaxial layer could also cover the first epitaxial regions and the substrate, and the second epitaxial layer may or may not be etched. The device layer could be formed during the same operation used to form the second epitaxial layer.Type: GrantFiled: October 22, 2013Date of Patent: July 14, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Sandeep R. Bahl, Jamal Ramdani
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Patent number: 9083239Abstract: A system and method are disclosed for providing an active current assist with analog bypass for a switcher circuit. An active current assist circuit is coupled to a buck regulator circuit, which includes a switcher circuit, an inductor circuit and a capacitor circuit. The active current assist circuit includes an active current analog bypass control circuit and a current source. The active current analog bypass control circuit receives and uses current limit information, voltage error information, and drop out information to determine a value of assist current that is appropriate for a current operational state of the buck regulator circuit. The active current analog bypass control circuit causes the current source to provide the appropriate value of assist current to the buck regulator circuit.Type: GrantFiled: January 5, 2012Date of Patent: July 14, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Jeffry Mark Huard
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Patent number: 9077192Abstract: A wireless charging system includes a transmitter with tunable reactive components (such as capacitance or inductance). A metric related to power transfer from the transmitter through a coil is used to determine an amount to modify a Parameter. One metric is equal to |Vs|·|Is|·cos(?)·(Vcoil_ref/Vcoil), where |Vs| is magnitude of the power source voltage, |Is| is magnitude of the power source current, ? is phase difference between the power source voltage and power source current, Vcoil_ref is a normalization value, and Vcoil is voltage across the coil. The transmitter can further include a phase tracking and adjustment loop (such as a phase-locked loop).Type: GrantFiled: June 1, 2011Date of Patent: July 7, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Gianpaolo Lisi, Gerard G. Socci, Ali Kiaei, Kosha Mahmodieh, Ali Djabbari
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Patent number: 9077206Abstract: A method for activating a local converter for one of a plurality of energy generating devices in an energy generating array is provided. The local converter includes a power stage and a local controller. The method includes comparing a device voltage for the energy generating device to a voltage activation level. The local converter is automatically activated when the device voltage exceeds the voltage activation level.Type: GrantFiled: May 14, 2008Date of Patent: July 7, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Jianhui Zhang, Ali Djabbari, Gianpaolo Lisi
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Patent number: 9064928Abstract: A method includes forming a first epitaxial layer over a semiconductor substrate and etching the first epitaxial layer to form multiple separated first epitaxial regions. The method also includes forming a second epitaxial layer over the etched first epitaxial layer. Each epitaxial layer includes at least one Group III-nitride, and the epitaxial layers collectively form a buffer. The method further includes forming a device layer over the buffer and fabricating a semiconductor device using the device layer. The second epitaxial layer could include second epitaxial regions substantially only on the first epitaxial regions. The second epitaxial layer could also cover the first epitaxial regions and the substrate, and the second epitaxial layer may or may not be etched. The device layer could be formed during the same operation used to form the second epitaxial layer.Type: GrantFiled: October 22, 2013Date of Patent: June 23, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Sandeep R. Bahl, Jamal Ramdani
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Patent number: 9054656Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.Type: GrantFiled: June 25, 2013Date of Patent: June 9, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Kazim Seven
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Patent number: 9048670Abstract: System and method are provided for transferring electrical energy among multiple electrical energy storage devices via a differential power bus and a capacitive load switched-mode power supply. The switched-mode power supply transfers the electrical energy between the load capacitor and the differential power bus to which the electrical energy storage devices (e.g., rechargeable batteries and/or capacitors connected in parallel or series or combinations of both) are electrically connected via bus switches. As a result, electrical energy is efficiently transferred and distributed among the electrical energy storage devices.Type: GrantFiled: July 12, 2011Date of Patent: June 2, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventor: Jang Dae Kim
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Patent number: 9041513Abstract: A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to communicate with a data logger in an RFID tag. The RFID reader performs data access processes using an Index Register and a Data Register of the RFID tag. The RFID reader selects one of (1) Index Read access (2) Index Write access (3) Data Write access (4) Data Read access with parity and (5) Data Read access with cyclic redundancy check (CRC). The RFID tag performs the requested data access and then performs an error detection process.Type: GrantFiled: October 3, 2005Date of Patent: May 26, 2015Assignee: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Srinath B. Pai, K. Krishna Moorthy
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Patent number: 9030236Abstract: A phase detection system for providing a phase signal indicative of a phase difference between first and second input signals, with the system including a pair of amplification channels for receiving the input signals, with each channel including a plurality of amplifier stages. The outputs of the two amplification channels are connected to the inputs of a multiplier arrangement, with the arrangement producing an uncompensated phase signal. Compensation circuitry is provided to receive a magnitude signal indicative of the relative magnitudes of the two input signals, with the magnitude signal being used to produce a corrected phase signal indicative of the phase difference between the two input signals.Type: GrantFiled: August 9, 2011Date of Patent: May 12, 2015Assignee: National Semiconductor CorporationInventors: Marc Gerardus Maria Stegers, Arie Van Staveren
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Patent number: 9018921Abstract: A control circuit for use in a battery charger circuit that includes a switching voltage regulator, with the control circuit having a constant current charging mode and a constant voltage charging mode. A switcher controller is provided which configured to control a state of a top side switching transistor and a low side transistor of the switching voltage regulator in response to at least one error signal. A power path transistor switch is disposed intermediate an output of the switching voltage regulator and a first node for receiving a first terminal of a battery to be charged.Type: GrantFiled: August 17, 2011Date of Patent: April 28, 2015Assignee: National Semiconductor CorporationInventor: Sanjay Gurlahosur
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Patent number: 8970191Abstract: An apparatus includes a constant on-time or constant off-time (COT) switching regulator configured to generate an output signal. The switching regulator includes a switch that is turned on or off for a specified amount of time during each of multiple switching cycles. The apparatus also includes a modulator configured to modulate the specified amount of time that the switch is turned on or off during at least some of the switching cycles. The specified amount of time that the switch is turned on or off during each of the switching cycles could be equal to tON/OFF+?tMODF(?MOD), where tON/OFF denotes a constant amount of time, ?tMOD denotes an amplitude of the second signal, ?MOD denotes a frequency of the second signal, and F( ) denotes a modulation function. This could help to modulate switching noise over a range of frequencies and spread electro-magnetic interference generated by the switching regulator.Type: GrantFiled: February 1, 2010Date of Patent: March 3, 2015Assignee: National Semiconductor CorporationInventors: Lik-Kin Wong, Issac Kuan-Chun Hsu, Tze-Kau Man
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Patent number: 8972751Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to receive design parameters indicative of a plurality of loads of a multiple-load device; determine a plurality of power supply architectures that may be used to provide power supply solutions satisfying the plurality of loads, each power supply architecture including at least one position requiring a component configured to satisfy a load requirement; for each one of at least a subset of the plurality of power supply architectures, determine, based on the characteristics of the plurality of components, at least one component configured to satisfy the corresponding load requirement for each position of the one of the power supply architectures; and generate at least one power supply design in accordance with the power supply architectures and the determined components.Type: GrantFiled: June 27, 2011Date of Patent: March 3, 2015Assignee: National Semiconductor CorporationInventors: Jeffrey R. Perry, Martin Garrison, Dien Mac, Howard Chen, Phil Gibson, Thomas Jewell
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Patent number: 8946780Abstract: A semiconductor device includes a first layer and a second layer over the first layer. The first and second layers are configured to form an electron gas layer at an interface of the first and second layers. The semiconductor device also includes an Ohmic contact and multiple conductive vias through the second layer. The conductive vias are configured to electrically couple the Ohmic contact to the electron gas layer. The conductive vias could have substantially vertical sidewalls or substantially sloped sidewalls, or the conductive vias could form a nano-textured surface on the Ohmic contact. The first layer could include Group III-nitride nucleation, buffer, and channel layers, and the second layer could include a Group III-nitride barrier layer.Type: GrantFiled: March 1, 2011Date of Patent: February 3, 2015Assignee: National Semiconductor CorporationInventors: Sandeep R. Bahl, Richard W. Foote, Jr.
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Patent number: 8923166Abstract: Interface circuitry and method for transmitting and receiving downstream and upstream data signals simultaneously via a common conductor pair. The composite signal containing the downstream and upstream data signal components being conveyed by the common conductor pair is isolated, e.g., via signal filtering or buffering, and combined with an appropriately scaled inverse replica of the outgoing upstream data signal to subtract out upstream data signal components and thereby provide the downstream data signal substantially free of any upstream data signal components.Type: GrantFiled: March 10, 2011Date of Patent: December 30, 2014Assignee: National Semiconductor CorporationInventors: Vijaya G. Ceekala, Qingping Zheng, Min Du, Xin Liu, Chandrakumar R. Pathi
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Patent number: 8908400Abstract: A wireless energy transfer receiver includes an input configured to receive alternating current (AC) electric energy and an output configured to make available direct current (DC) electric energy. The receiver further includes a rectification component configured to convert the AC energy received at the input into DC energy available at the output, the DC energy made available as DC voltage; and a multiplication component configured to amplify a peak voltage of the AC energy received at the input, the DC voltage made available at the output correspondingly being higher than the peak voltage of the AC energy received at the input.Type: GrantFiled: February 28, 2011Date of Patent: December 9, 2014Assignee: National Semiconductor CorporationInventors: Gianpaolo Lisi, Ali Djabbari