Abstract: The buffer breakdown of a group III-N HEMT on a p-type Si substrate is significantly increased by forming an n-well in the p-type Si substrate to lie directly below the metal drain region of the group III-N HEMT. The n-well forms a p-n junction which becomes reverse biased during breakdown, thereby increasing the buffer breakdown by the reverse-biased breakdown voltage of the p-n junction and allowing the substrate to be grounded. The buffer layer of a group III-N HEMT can also be implanted with n-type and p-type dopants which are aligned with the p-n junction to minimize any leakage currents at the junction between the substrate and the buffer layer.

Abstract: In a DIAC-like device that includes an n+ and a p+ region connected to the high voltage node, and an n+ and a p+ region connected to the low voltage node, at least two MOS devices are formed between the n+ and p+ region connected to the high voltage node, and the n+ and p+ region connected to the low voltage node.

Abstract: A phase frequency detector detects the difference between the edges of a fractional-rate recovered clock signal and the edges within a serial data bit stream, where the edges within the serial data bit stream correspond with the edges of a full-rate clock signal that was used to clock the serial data bit stream.

Abstract: A high voltage ESD protection diode wherein the p-n junction is defined by a p-well and an n-well and includes a RESURF region, the diode including a field oxide layer formed on top of the p-well and n-well, wherein the parameters of the diode are adjustable by controlling one or more of the junction width, the length of the RESURF region, or the length of the field oxide layer.

Abstract: A Schottky diode with a small footprint and a high-current carrying ability is fabricated by forming an opening that extends into an n-type semiconductor material. The opening is then lined with a metallic material such as platinum. The metallic material is then heated to form a salicide region where the metallic material touches the n-type semiconductor material.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. To suppress click and pop, an amplifier control circuit maintains certain amplifiers (depending on headphone or speaker mode) tri-stated until input coupling capacitors have fully charged and an input signal exceeding a predetermined amount is detected.

Abstract: A system and method for monitoring chloride content and concentration induced by a metal etch process is disclosed. A blank metal film is deposited on a semiconductor wafer. A metal etch process is then applied to partially etch the blank metal film on the wafer. The metal etch process exposes the metal film to chlorine. The wafer is then scanned using surface profiling total X-ray reflection fluorescence. A chlorine concentration map is generated that shows quantitative and spatial information about the chlorine on the wafer. Information from the chlorine concentration map is then used to select a value of chlorine concentration for a metal etch process that will not create metal chloride corrosion on a semiconductor wafer.

Abstract: One aspect of the present invention relates to an integrated circuit package that includes multiple layers of a planarizing, photo-imageable epoxy that are formed over a substrate. In some designs, the substrate is a silicon wafer. An integrated circuit is embedded in the epoxy. An antenna, which is electrically coupled to the active face of the integrated circuit through an interconnect layer, is formed over one of the epoxy layers. In various embodiments, at least some of the epoxy layers are positioned between the substrate and the antenna such that there is a distance of at least approximately 100 microns between the substrate and the antenna.

Abstract: A methodology for regulating power supplied to a powered component based on hardware performance, such as may be used in a system that includes the powered component and a switching regulator (EMU or energy management unit) configured to supply a regulated supply voltage to the powered component. Performance monitoring circuitry generates a performance monitoring signal corresponding to a detected performance level of selected digital operations of the powered component relative to a reference performance level. Switching control circuitry provides a switching control signal in response to the performance monitoring signal. In an example embodiments, the switching control circuitry for the switching regulator (switching transistor) is integrated into the powered component, and the detected performance level corresponds to a detected signal path delay associated with the digital operations of the powered component.

Abstract: A method for controlling heat dissipated from a prosthetic retinal device is described. A heat transfer device employs the Peltier heat transfer effect to cool the surface of the retinal device that faces the retina by dissipating/transferring collected heat away from the retina and towards the iris or front of the eye. According to one embodiment, a heat pump is formed in a second substrate on the retinal device. The heat pump is controlled by a temperature sense device that activates the heat pump, when a first predetermined temperature limit is exceeded. The temperature sense device deactivates the heat pump, when a temperature of the retinal device drops below a second predetermined temperature. According to another embodiment, a supply current of the retinal device may pass through the heat pump and a direction of heat transfer by the heat pump can be reversed, when the first predetermined temperature is exceeded.

Abstract: A system and method is disclosed for using an input data signal as a clock signal in a state machine of a radio frequency identification (RFID) tag. An output of a demodulator in the RFID tag is directly coupled to a clock input of the command state machine in the RFID state machine. The command state machine receives an edge detect signal directly from the input data signal and then immediately generates backscatter signals to begin a backscatter process. The edge detect signal may comprise a rising edge of a data symbol of the RFID protocol. The immediate initiation of the backscatter process reduces latency of the backscatter process in the RFID state machine.

Abstract: Differential signal detection circuitry with an integrated reference voltage. The reference voltage is added as an offset to the output voltage, and its integration ensures that variations in the reference voltage closely track variations in the signal. Accordingly, the detection threshold for the signal being detected remains more consistent over variations in the circuit manufacturing process, power supply voltage and operating temperature.

Abstract: An apparatus includes a sense element that generates a sense signal based on an output signal generated by a regulator. The apparatus also includes a current control unit that generates a compensated reference signal using the sense signal. The compensated reference signal is associated with an average of the output signal. The apparatus further includes a comparator that compares the compensated reference signal and the sense signal. In addition, the apparatus includes a hysteretic control unit that adjusts a control signal based on an output of the comparator and that provides the control signal to the regulator in order to adjust the output signal generated by the regulator. The hysteretic control unit could dynamically adjust peak and valley currents through an inductor in the regulator to maintain the average of the output signal at a substantially constant value.

Abstract: A startup circuit for use in a DC-DC converter having an input voltage terminal and an output voltage terminal, with the output voltage terminal connected to an output capacitor and with said converter including a pass transistor for transferring charge from the input terminal to the output terminal. The startup circuit includes a control circuit configured to cause the pass transistor to conduct an output current during start up when the output terminal voltage is approaching a final regulated voltage, with the output current being comprised of first and second current components, with the first current component being proportional to the output voltage and the second current component being proportional to the input voltage, with the two components being combined so as to resist changes in the power dissipation in the pass transistor during startup.

Abstract: An insulating material interposed between two conductive materials can experience plasma process induced damage (PPID) when a plasma process is used to deposit a dielectric onto one of the conductive materials. This PPID can be reduced by reducing electric charge accumulation on the one conductive material during the plasma process dielectric deposition.

Abstract: The spikes in current and voltage that result from the failure of a galvanic dielectric layer are safely contained by a galvanic isolation fuse that pops and forms and open circuit between a high-voltage die and a low-voltage die in response to the failure of the galvanic dielectric layer.

Abstract: The self heating of a high-performance bipolar transistor that is formed on a fully-isolated single-crystal silicon region of a silicon-on-insulator (SOI) structure is substantially reduced by forming a Schottky structure in the same fully-isolated single-crystal silicon region as the bipolar transistor is formed.

Abstract: A semiconductor-based gas detector enhances the collection of gas molecules and also provides a self-contained means for removing collected gas molecules by utilizing one or more electric fields to transport the gas molecules to and away from a metallic material that has a high permeability to the gas molecules.

Abstract: In an active clamp implemented in a 5V complementary BiCMOS process, the footprint of the active clamp, which includes at least one NMOS clamp stack, is reduced by introducing a BJT into the circuit to allow the number of NMOS clamp stacks to be reduced.

Abstract: A plurality of sequential electro-deposition, planarization and insulator deposition steps are performed over a patterned thick photoresist film to form a laminated ferromagnetic alloy core for micro-fabricated inductors and transformers. The use of a plurality of contiguous thin laminations within deep patterns on non-removable photoresist film provides sufficient volume of magnetic film in, for example, high frequency applications, and reduces eddy current loss at high frequency.