Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

Abstract: A method includes forming a transistor over a substrate; and forming a resistive element over the transistor, in which forming the resistive element includes forming a bottom electrode electrically connected to a source/drain region of the transistor; forming a resistive switching layer over the bottom electrode, in which the resistive switching layer is made of metal halide; and forming a top electrode over the resistive switching layer.

Abstract: The present invention provides a method of improving the ability of plants to resistance diseases, comprising using a strain of Bacillus amyloliquefaciens and a Bidens plant extract; and the Bidens plant extract enhances the ability of the Bacillus amyloliquefaciens to inhibit the growth of the Acidovorax avenae subsp. citrulli, increases the metabolic activity of the Bacillus amyloliquefaciens, increases the amount of the biofilm formation of the Bacillus amyloliquefaciens, and maintains the alive number of the Bacillus amyloliquefaciens.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: A method for fabricating an integrated circuit device is provided. The method includes forming a field effect transistor (FET) on a semiconductor substrate; depositing a first dielectric layer over the FET; depositing a first metal-containing dielectric layer over the first dielectric layer; and forming a first thin film transistor (TFT) over the first metal-containing dielectric layer.

Abstract: An asymmetric bidirectional optical wireless communication system based on orbital angular momentum comprises a system end device and a client end device. The system can split light into P-polarization beam and S-polarization beam, and utilize the orbital angular momentum multiplexing technology to increase the system capacity for uplink transmission in the client end device. In addition, the system also uses the combination of a beam homogenizer and a spatial light modulator to design an orbital angular momentum multiplexer with low energy loss, which can increase the number of orbital angular momentum channels by increasing the effective area of the components.

Abstract: A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

Abstract: A method for forming a chitin film is provided. The method includes the following steps. In a step (a), a chitin suspension is prepared by adding chitin to water. In a step (b), physical forces are provided to process the chitin suspension, so that a mean particle diameter of the chitin is reduced. In a step (c), the chitin suspension is applied to a target, and the chitin film is formed after the chitin suspension is dried.

Abstract: Techniques in accordance with embodiments described herein are directed to a MFM structure that includes a resistance component, an inductance component and a capacitance component. The MFM device is equivalent to a series LC circuit with the resistance component coupled in parallel with the capacitance component. The MFM structure is used as a series LC resonant circuit, band-pass circuit, band-stop circuit, low-pass filter, high-pass filter, oscillators, or negative capacitors.

Abstract: A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

Abstract: A device includes a substrate, a first electrode and a second electrode. The first electrode is disposed on the substrate, and configured to receive an input signal. The second electrode is disposed on the substrate, and configured to output an output signal based on the input signal. When the input signal is configured to oscillate within a first range between a first voltage value and a second voltage value with a first frequency, the output signal is an inverted version of the input signal, and has the first frequency. When the input signal is configured to oscillate within a second range including the first voltage value without the second voltage value with the first frequency, the output signal has a second frequency which is approximately twice of the first frequency.

Abstract: A method for preparing a perovskite solar cell is disclosed, which comprises the following steps: providing a first electrode; forming an active layer on the first electrode; and forming a second electrode on the active layer. Herein, the active layer can be prepared by the following steps: mixing a perovskite precursor and a solvent mixture to form a precursor solution, wherein the solvent mixture comprises a first solvent and a second solvent, the first solvent is selected from the group consisting of ?-butyrolactone (GBL), dimethyl sulfoxide (DMSO), 2-methylpyrazine (2-MP), dimethylformamide (DMF), 1-methyl-2-pyrrolidone (NMP), dimethylacetamide (DMAc) and a combination thereof, and the second solvent is an alcohol; and coating the first electrode with the precursor solution and heating the precursor solution to form the active layer.

Abstract: An electrode including a binary metal oxide, a method for preparing an electrode including the same, and a supercapacitor are provided. The binary metal oxide includes a first metal element and a second metal element. The first metal element includes a first transition metal element with two valence states. The second metal element is different from the first metal element and is selected from one of Mn, Fe, Ni, Zn, Al, Li, Ba, and La.

Abstract: A method includes forming a first dielectric layer over the substrate and covering first, second, third, fourth, fifth and sixth protrusion regions; forming first, second, and third gate conductors over the first, fourth, and fifth protrusion regions, respectively; performing a first implantation process to form a second source region and a second drain region in the fourth protrusion region; performing a second implantation process to form a first source region and a first drain region in the first protrusion region, and to form a third source region and a third drain region in the fifth protrusion region; forming a metal layer over the third protrusion region; patterning the metal layer to form an inner circular electrode and an outer ring electrode encircling the inner circular electrode; forming a word line; and forming a bit line.

Abstract: A method for fabricating a semiconductor device is provided. The method includes depositing a gate dielectric layer over a semiconductor substrate; depositing a work function layer over the gate dielectric layer by an atomic layer deposition (ALD) process, wherein the work function layer comprises a metal element and a nonmetal element, and the ALD process comprises a plurality of cycles. Each of the cycles comprises: introducing a precursor gas comprising the metal element to a chamber to form a precursor surface layer on the semiconductor substrate in the chamber; purging a remaining portion of the precursor gas away from the chamber; performing a reactive-gas plasma treatment using a reactive-gas plasma comprising the nonmetal element to convert the precursor surface layer into a monolayer of the work function layer; purging a remaining portion of the reactive-gas plasma away from the chamber, and performing an inert-gas plasma treatment in the chamber.

Abstract: An integrated circuit device includes a semiconductor structure, a tunneling layer, a top electrode, a passivation layer, and a conductive feature. The semiconductor structure has a base portion and a protruding portion over a top surface of the base portion. The tunneling layer is over a top surface of the protruding portion of the semiconductor structure. The top electrode is over the tunneling layer. The passivation layer is over a sidewall of the protruding portion of the semiconductor structure. The conductive feature is directly below the protruding portion of the semiconductor structure.

Abstract: A near-eye light field display device includes a plurality of sub-aperture light field emitting modules and a bi-telecentric lens group. The plurality of sub-aperture light field emitting modules are adapted to generate a plurality of sub-aperture light fields. The bi-telecentric lens group is disposed on one side of the plurality of sub-aperture light field emitting modules, wherein the plurality of sub-aperture light fields pass through the bi-telecentric lens group and are converted into an exit light field by the bi-telecentric lens group, and the exit light field is incident on a receiver.

Abstract: A semiconductor device includes source and a drain above a substrate and spaced apart along a first direction, and a semiconductor channel extending between the source and the drain. The semiconductor device further includes gate spacers, an interfacial layer, and a metal gate structure. The gate spacers are disposed on the semiconductor channel and spaced apart by a spacer-to-spacer distance along the first direction. The interfacial layer is on the semiconductor channel. The interfacial layer extends a length along the first direction, and the length is less than a minimum of the spacer-to-spacer distance along the first direction. The metal gate structure is over the interfacial layer.

Abstract: A method for treating a subject suffering from non-compaction cardiomyopathy (NCC), by administering to the subject suffering from NCC a pharmaceutical composition having a therapeutically effective amount of a EZH2 downregulator including the statin.

Abstract: A method employs an unmanned aerial vehicle to carry an electromagnetic field measurement system to overcome environmental obstacles in measuring environmental electromagnetic field. The electromagnetic field measurement system senses the electromagnetic field of a spatial position in the environment to generate a sensing signal, then processes the sensing signal to remove the high-frequency electromagnetic interference generated by the operation of the unmanned aerial vehicle itself from the sensing signal, and converts the processed sensing signal into a digital signal. The digital signal is processed to extract at least one wave according to a fundamental frequency and a harmonic order, thereby removing the low-frequency electromagnetic interference from the digital signal. The extracted wave is employed in calculating an environmental electromagnetic field value of the spatial location.