Abstract: A semiconductor device has through electrodes with property as an electrode and excellent in manufacturing stability. The through electrode composed of a conductive small diameter plug and a conductive large diameter plug is provided on the semiconductor device. A cross sectional area of the small diameter plug is made larger than a cross sectional area of a connection plug and its diameter each, and the cross sectional area of the small diameter plug is made smaller than a cross sectional area of the large diameter plug and its diameter each. Further, a projecting portion where the small diameter plug is projected from a silicon substrate is put into an upper face of the large diameter plug. Further, an upper face of the small diameter plug is connected to a first interconnect.

Abstract: A semiconductor device is composed of an oscillator circuit developing a clock, and an oscillation failure detect unit. The an oscillation failure detect unit is configured to obtain at least one count value through counting clock pulses of the clock, and to activate an oscillation failure detect signal in response to the at least one count value being out of a predetermined count value range.

Abstract: Through heat discharge only by wiring connected to a conventional semiconductor chip, sufficient heat discharge performance may not be achieved in a recent semiconductor device. A semiconductor device according to an aspect of the present invention includes: a flexible substrate including a first main surface and a second main surface; a semiconductor chip; a first heat conductive layer formed on the first main surface of the flexible substrate and electrically connected to the semiconductor chip; and a second heat conductive layer formed on the second main surface of the flexible substrate and electrically insulated from the semiconductor chip.

Abstract: An amplifier comprises an input terminal that inputs an AC voltage signal; an amplifying unit having a transistor for amplifying the input AC voltage signal; a current detecting unit connected internally of said amplifying unit; and a control-current source controlled by said current detecting unit that drives an input stage of the transistor.

Abstract: An image compression circuit provided in an image pickup apparatus for generation of compressed image data for record can also serve as an evaluation value calculation circuit that generates a contrast evaluation value to be used as an index for finding an in-focus location for an autofocus process. The image pickup apparatus includes a shooting optical system, an image pickup unit, an image compression unit, and a focusing unit. The image pickup unit has an image pickup device that performs photoelectric conversion of a subject image formed by the shooting optical system, and performs A/D conversion of a captured image obtained by the image pickup device to generate digital captured image data. The image compression unit performs an image compression process on the digital captured image data to generate compressed image data for focusing.

Abstract: In an aspect of the present invention, a liquid crystal display apparatus includes: a liquid crystal display (LCD) panel; and an LCD driver. The LCD driver includes: a first memory having a capacity more than a capacity of image data for one frame and configured to receive the image data externally to store therein; a second memory; an overdrive processing circuit configured to compress the image data read out from the first memory to generate a compressed image data, write the generated compressed image data in the second memory, and perform an overdrive process based on the image data of a current frame read out from the first memory and the compressed image data of a previous read out from the second memory to generate a post-process image data; and a data line driving section configured to drive data lines of the LCD panel in response to the post-process image data.

Abstract: In a layout design method for a semiconductor device having a hard macro, a netlist data of the semiconductor device and a hard macro data are read out from a storage section. An arrangement position of the hard macro is determined from the netlist data and the hard macro data, and an extension direction of an interconnection pattern in a specified area of a chip for the semiconductor device is determined based on arrangement restriction data. The interconnection pattern is arranged to extend in the determined extension direction in the specified area.

Abstract: A driving method for driving an LCD panel having a counter electrode and a source line. In a first period, the counter electrode is driven to a potential VCOMH. In a second period, the counter electrode and the source line are short-circuited to a power supply interconnection having a power supply potential VCI. In a third period, the counter electrode is connected to a ground interconnection while the source line is kept to be short-circuited to the power supply interconnection. In a fourth period, the counter electrode is pulled down to a potential VCOML lower than a ground potential In a fifth period, the source line is driven to a potential corresponding to an image data while the counter electrode is kept to the potential VCOML. The electric power consumed in pulling down the counter electrode from a positive potential to a negative potential can be effectively reduced.

Abstract: Disclosed is a digital-to-analog converter circuit having first to (2×h+1)th reference voltages (where h is a prescribed positive integer) grouped into the following groups: a first reference voltage group comprising h-number of (2×j?1)th (where j is a prescribed positive integer of 1 to h) reference voltages; a second reference voltage group comprising h-number of (2×j)th reference voltages; and a third reference voltage group comprising h-number of (2×j+1)th reference voltages.

Abstract: To test memories operating with different operational clocks and deal with a delay involved in testing a memory at a physically remote location. A memory test circuit of the present invention tests a processor core memory and a function-specific core memory with a processor core, and includes a clock selector receiving operational clocks for the processor core and for the function-specific core to select one of the two to be applied to the processor core, and a control unit supplying to the processor core, the operation clock for the processor core when testing the processor core memory, and the operational clock for the function-specific core when testing the function-specific core memory, by use of the selector. With this setting, it is possible to test a memory running at different operational clock and used by the function-specific core.

Abstract: A memory control system includes a first memory for accessing a CPU via an address bus and a data bus, an SDRAM for accessing a CPU via the address bus and the data bus, a SDRAM control circuit for outputting a refresh request to the DRAM and a selection unit for selecting a signal line of the address bus and outputting a signal of the signal line corresponding to the refresh request of the SDRAM control circuit to the SDRAM.

Abstract: A decoding device according to the one embodiment of the invention includes: a first decoder performing a first decoding based on first encoded data obtained by encoding unencoded data, and second soft-output data to generate first soft-output data; a second decoder performing a second decoding based on second encoded data obtained by interleaving the unencoded data and encoding the interleaved data, and the first soft-output data to generate the second soft-output data; and a hard decision part outputting decoded data through hard decision on the first soft-output data.

Abstract: A controller driver includes a color palette circuit configured to hold color palette data indicating a relation of a color reference numbers corresponding to a color and RGB data corresponding to the color, a first memory section configured to hold first layer data containing first RGB data specifying a color of each of pixels of a first layer image; a second memory section configured to hold second layer data containing a color reference number specifying a color of each of pixels of a second layer image; a calculating circuit configured to generate synthetic image data of the first layer data and the second layer data; and a driving circuit configured to drive a display panel based on the synthetic image data.

Abstract: Disclosed is a semiconductor device has a semiconductor substrate of a first conductivity type in which at least a first element-forming region and a second element-forming region are formed. Wells are formed in respective ones of the element-forming regions of the semiconductor substrate, and the well of at least one element-forming region is of the first conductivity type. A guard ring of a second conductivity type is formed between the wells of the first and second element-forming regions, and a region of the first conductivity type having an impurity concentration lower than that of the well of the one element-forming region is formed between the guard ring and the well of the one element-forming region.

Abstract: A semiconductor package is provided with a low thermal conductivity plate that covers an entire upper surface of a heat dissipating component, by which heat dissipation from the heat dissipating component can be inhibited during a reflow process. Accordingly, sufficient heat can be transmitted to solder balls, so as to heat the solder balls up to a desired temperature. As a result, the semiconductor package and a substrate can be fully bonded via the solder balls, and thereby an excellent mounting performance is achieved.

Abstract: A semiconductor circuit apparatus includes a booster which is connected to a single power supply and outputs a power supply voltage of the power supply or a voltage different from the power supply voltage, and a boost controller which controls whether to output the power supply voltage of the power supply or the voltage different from the power supply voltage.

Abstract: A semiconductor device is provided which has a capacitor insulating film made up of zirconium aliminate being an amorphous film obtained by having crystalline dielectric contain amorphous aluminum oxide and having its composition of AlXZr(1-X)OY (0.05?X?0.3), hereby being capable of preventing, in a process of forming a capacitor of MIM (Metal Insulator Metal) structure, dielectric breakdown of a capacitor insulating film while a relative dielectric constant of a metal oxide film used as the capacitor insulating film is kept high.

Abstract: A latch circuit includes: a first terminal; a second terminal; a first data-gating circuit coupled to the first terminal and the second terminal, the first data-gating circuit non-reversely gating the second signal in response to the first signal to reveal a third signal; a second data-gating circuit coupled to the first terminal and the second terminal, the second data-gating circuit reversely gating the second signal in response to the first signal to reveal a fourth signal; a third terminal receiving a fifth signal; a selector circuit coupled to the first data-gating circuit and the second data-gating circuit, the selector circuit outputting one of the third signal and the fourth signal in response to the fifth signal to latch one of the third signal and the fourth signal, respectively; and a bistable circuit coupled to the selector circuit, the bistable circuit holding one of the third signal and the fourth signal.

Abstract: A decoding apparatus includes a burst cutting area (BCA) signal interval measuring device which measures a signal interval of a BCA area and which outputs BCA signal interval information, a T converter which obtains T information from the BCA signal interval information, a sequencer which detects a space area based on a first threshold value and which outputs an output enable signal based on the T information and a detecting result, wherein the output enable signal shows that a signal is obtained from a data area of the BCA area, and the space area is a non-signal area of the BCA area, and a channel data converter which converts the T information into channel data based on the output enable signal from the sequencer.

Abstract: A semiconductor device including a semiconductor chip having external connecting terminals formed on one side is restrained to cause chipping in ridge line portion of semiconductor chip. A cover layer 103 is formed on the other side of the semiconductor chip 102. At least a part of an end portion 106 of the cover layer is outside of the ridge line portion 107 of the semiconductor chip.