Patents Assigned to Nippon Electric Co., Ltd.
  • Patent number: 4470113
    Abstract: An information processing unit, such as a central processor, microprocessor or one-chip microcomputer, which can be used as either a master unit or a slave unit yet does not require the provision of extra external terminals for control signals. The unit is provided with first and second bidirectional input/output ports and an internal bus coupled to both of the first and second input/output ports. The input/output mode of the two busses can be controlled either by an internally-generated control signal or by an externally-supplied control signal inputted to the unit. The one of the first and second control signals used for controlling the transmission modes of the input/output ports is determined in accordance with data input through one of the input/output ports and stored internally of the unit.
    Type: Grant
    Filed: January 13, 1982
    Date of Patent: September 4, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Toshio Oura
  • Patent number: 4468719
    Abstract: A porous body of Ti-Al alloy has a novel structure for a solid electrolytic capacitor, having improved values of leakage current and dielectric loss. The porous body of Ti-Al alloy has spherical particles which partially contact each other to form an integral body. The surfaces of the spherical particles have a ruggedness in the order of several microns or less. Because the diameter of the spherical particle is greater than the size of the ruggedness, the porous body has rough voids which provide a wide passageway through which a manganese nitrate solution penetrates. The wide passageway is effective for decreasing the number of times when there is a thermal decomposition of the manganese nitrate, thereby reducing the series resistance of the resultant cathode. In addition, this novel structure makes it possible to avoid production difficulties which are usually encountered when a solid electrolytic capacitor, having a high capacitance, is produced from a finely divided Ti-Al alloy.
    Type: Grant
    Filed: April 2, 1981
    Date of Patent: August 28, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Shigeaki Shimizu, Yoshimi Kubo, Tetsuo Suzuki, Takashi Kizaki, Hitoshi Igarashi
  • Patent number: 4468687
    Abstract: An apparatus for reproducing television synchronizing signals receives an input composite television video signal, separates synchronizing signals therefrom, and utilizes a separated horizontal synchronizing signal to separate a burst signal from the input. The burst signal is then provided through a phase-locked loop including a voltage controlled oscillator (VCO) and frequency divider. The separated horizontal sync signal is also provided through a phase-locked loop including a VCO and frequency divider. During reception of a color TV signal, a synchronizing signal generator receives the output of the first VCO as its clock and receives a horizontal reset pulse derived from the reproduced subcarrier output of the first phase-locked loop and the output of the second phase-locked loop, with the output of the frequency divider in the second phase-locked loop being provided back to its phase detector.
    Type: Grant
    Filed: May 6, 1982
    Date of Patent: August 28, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kazushi Munezawa, Tashihiko Tsuru
  • Patent number: 4468679
    Abstract: An ink-jet printer for recording information by jetting ink droplets on a recording medium has a plurality of ink-jet nozzles arranged so that ink droplets projected therefrom combine in flight at a space between the nozzles and the recording medium. The amplitude and the pulse width of driving signals used to deflect piezoelectric elements which contract to expel the ink droplets from the nozzles are appropriately varied to vary the momentum of the individual ink droplets projected from each nozzle so that the combined ink droplets will have a velocity and direction representative of the information to be recorded.
    Type: Grant
    Filed: May 11, 1982
    Date of Patent: August 28, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Michihisa Suga, Mitsuo Tsuzuki
  • Patent number: 4467437
    Abstract: This pattern matching system features the calculation of a weighting factor based on the variable interval between feature vector samples. On carrying out matching of two information compressed patterns, a weighted similarity measure calculator (64) calculates a weighted similarity measure by multiplying an intervector similarity measure between one each feature vector of the respective patterns by a weighting factor calculated by the use of a variable interval between each feature vector and a next previous one. A recurrence formula is calculated by the use of such weighted similarity measures instead of the intervector similarity measures. A predetermined value .delta. may be used in reducing the number of signal bits used for the recurrence formula. Preferably, a sum for the recurrence formula is restricted by two preselected values. Most preferably, an additional similarity measure is used for the recurrence formula.
    Type: Grant
    Filed: March 1, 1982
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Shichiro Tsuruta, Hiroaki Sakoe
  • Patent number: 4467315
    Abstract: A compandor converts a linear code signal consisting of a polarity bit and a plurality of absolute value bits. The polarity bit represents the polarity of each sample value of an original analog signal. The absolute value bits represent the absolute value of the sample. The compandor converts the linear code into a nonlinear code including the polarity bit, a plurality of segment bits representing the segments in a characteristic curve to which the original analog signal belongs, and mantissa bits which indicate the position of the sample value in that segment.
    Type: Grant
    Filed: August 18, 1978
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Rikio Maruta, Atsushi Tomozawa
  • Patent number: 4467449
    Abstract: An improved integrated circuit in which capacitive loads can be driven at a high speed is disclosed. The circuit comprises a first and a second capacitive loads disposed separately from each other, a first switch located near the first capacitive load and adapted to drive it with a power source, a second switch located near the second capacitive load and adapted to drive it with the power source, and means for simultaneously controlling the first and second switch.
    Type: Grant
    Filed: September 1, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Mineo Hayashi
  • Patent number: 4467355
    Abstract: The public telephone line has a bandwidth insufficient for the rapid transmission of video signals. A long time period is required therefore. The present invention improves this long transmission time.The freeze-picture transmission apparatus according to the present invention receives a plurality of video signals in a predetermined order. The received one is compressed and stored in memory. The read-out from the memory is done at a speed corresponding to a bandwidth of the transmission line. The compressed video signal read-out from the memory is transmitted to the reception unit. In the reception unit, the compressed video signal transmitted is once stored in another memory. The read-out from another memory is done at a TV scanning speed. The compressed video signal read-out from another memory is displayed by TV.
    Type: Grant
    Filed: January 26, 1982
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Akio Matsuda
  • Patent number: 4467447
    Abstract: A data processing system including a central processing unit (CPU), a memory device operating on a data word length of 2 m-bits, an input/output device operating on a data word length of m bits, an m-bit register and a direct memory access (DMA) controller for transferring data words in both directions between the memory device and the input/output device independently of the CPU. A 2 m-bit bus is connected between the memory device and two m-bit buses connected to a bus switching circuit which controls the transfer of m-bit data words between the 2 m-bit bus and the register and the input/output device.
    Type: Grant
    Filed: November 6, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Toshiya Takahashi, Yoshikuni Sato
  • Patent number: 4467414
    Abstract: In a cache memory arrangement used between a control processor (21) and a main memory (22) and comprising operand and instruction cache memories (31, 32), a cache buffer circuit (40) is responsive to storage requests from the central processor to individually memorize the accompanying storage data and store address data and to produce the memorized storage data and store address data as buffer output data and buffer output address data together with a buffer store request. Responsive to the buffer store request, first and second cache control circuits (36, 37) transfer for accompanying buffer output address data to the operand and the instruction cache memories, if each of the operand and the instruction cache memories is not supplied with any readout requests.
    Type: Grant
    Filed: August 19, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Mikiya Akagi, Hiroyuki Nishimura, Hideki Nishimura
  • Patent number: 4467345
    Abstract: A semiconductor integrated circuit device is disclosed in which insulation faults occurring above the ground or power supply wiring are eliminated. In one embodiment of the invention, the ground or power supply wirings are divided into two or more substantially parallel wiring sections, which eliminates the surface upon which large grain size phosphorus silicate glass may form. In a second embodiment of the invention, the ground or power supply wirings are divided into two or more substantially parallel wiring sections in the vicinity of the exposed region of a bonding pad.
    Type: Grant
    Filed: October 15, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Masahide Ozawa
  • Patent number: 4467371
    Abstract: For use in pre-editing a video tape, an original video tape is prepared by automatically recording successive scene numbers on a video tape in correspondence to the respective scenes being recorded on the tape. As the scenes are displayed in combination with the scene numbers, those of successive numbers preliminarily recorded on a card in one-to-one correspondence to the scene numbers are marked, which correspond to the scenes to be selected. The marked numbers are read while signals representative of the scenes and the scene numbers are reproduced from the original video tape. Each time correspondence between the marked numbers and the reproduced scene numbers is detected, scenes corresponding to the detected scene numbers are automatically transferred to another video tape to thereby complete the scene-selected video tape. The scene numbers may be recorded on the cue track to be visually displayed as successive numerals together with the corresponding scenes.
    Type: Grant
    Filed: April 18, 1983
    Date of Patent: August 21, 1984
    Assignees: Nippon Television Network Corp., Nippon Electric Co., Ltd.
    Inventors: Yosoji Kobayashi, Yoshitaka Kato, Kyoichi Tokiwa, Yukinori Yoneda, Hiroyuki Maie, Minoru Tamagami, Shoji Motohashi, Tatsuo Konishi, Shigeru Araki
  • Patent number: 4467415
    Abstract: A microprogrammed control apparatus includes a first control store for providing a first sequence of microinstructions and a second control store which includes first and second control store portions providing first and second sets, respectively, of microinstructions. A selection circuit selects a first microinstruction from the first control store followed by a first set of subsequent microinstructions from the second control store portion, etc. A second selection circuit will select either the selected microinstruction from the first selection circuit or control information provided from a control store. The address for reading out the microinstructions from the first and second control store portions is determined in accordance with the branch address field of the microinstruction currently being executed.
    Type: Grant
    Filed: August 31, 1981
    Date of Patent: August 21, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Hiroshi Ogawa
  • Patent number: 4466132
    Abstract: A digital transmission system is provided based on a cross-polarization band-sharing technique using a conventional antenna system which does not have a sufficient cross-polarization discrimination.An interference elimination circuit receives two mutually orthogonal cross-polarized waves and restores to at least one of the received cross-polarized signals, a baseband signal which is free of cross-polarization interference attributable to orthogonal cross-polarization crosstalk components. This circuit includes an orthogonal cross-polarization, crosstalk component adder having a weighting circuit for multiplying an interference component of the received orthogonal cross-polarized signals by a compensation coefficient. A compensating adder adds the output of the weighting circuit to a desired one of the received cross-polarized signals.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: August 14, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Junji Namiki
  • Patent number: 4464765
    Abstract: In a multi-level transmission system, a binary digital signal is converted into a multi-level signal by generating successive multi-level symbols each having a polarity opposite the polarity of the average DC level of preceding symbols, with the first symbol having a first polarity when the first binary bit is a logical "0" and having a second polarity when the first bit is a logical "1". If desired, the logical values of all bits after the first bit can be complemented prior to generating the appropriate multi-level symbols.
    Type: Grant
    Filed: April 13, 1982
    Date of Patent: August 7, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Hiroshi Shimizu
  • Patent number: 4463419
    Abstract: A microprogram control system for use in a data processor. The system has a plurality of control memories. Under the control of microinstructions stored in one control memory, a necessary microinstruction is loaded from the main memory onto the other control memory.
    Type: Grant
    Filed: September 24, 1981
    Date of Patent: July 31, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Hisao Takane
  • Patent number: 4462007
    Abstract: A microwave oscillator has a cavity resonator enclosed by conducting walls and containing a microwave oscillator element therein. A biasing device applies a bias voltage to the microwave oscillator element to generate a microwave signal. A microwave coupling circuit takes the microwave signal from the resonator in a direction which is perpendicular to the direction of the propagation of the microwave signal in the resonator and applies the taken-out microwave signal to an output means. The microwave coupling circuit is located at a position corresponding to one of the nodes of the electric field appearing in the cavity. The coupling circuit also is preferably at a position on the resonator wall which is a quarter wavelength away from the oscillator element. The undesired signals can be effectively suppressed in the output means, by -44 dB, or more, without making use of a filter.
    Type: Grant
    Filed: March 5, 1981
    Date of Patent: July 24, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Tadao Shirai
  • Patent number: 4462030
    Abstract: A portable electronic apparatus has an oscillator for generating a signal. An audible annunciator has an inductance element for generating an audible annunciating signal in response to a first actuation signal of a first frequency. A light emitting means is turned on and off by counter-electromotive forces developed in the inductance element in response to one of the first actuation signal and a second actuation signal of a second frequency. A frequency divider is coupled to the audible annunciator and to the light emitting means for frequency-dividing the oscillation signal to provide the first and second actuation signals and for selectively generating one of these actuation signals in response to a control signal.
    Type: Grant
    Filed: December 10, 1981
    Date of Patent: July 24, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Daisuke Ishii
  • Patent number: 4460923
    Abstract: In an adaptive predictive coding system for television signals in which one optimum prediction function is selected in block unit from a plurality of prediction functions alloted to a plurality of blocks each consisting of a plurality of picture elements which divide each frame for the television signal and the optimum prediction function is used for predictive coding of the television signal, a motion vector is determined in accordance with both motion vector information and prediction error information, so that the efficiency of coding can be remarkably improved especially where the transmission speed is low.
    Type: Grant
    Filed: June 1, 1982
    Date of Patent: July 17, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Akira Hirano, Toshio Koga
  • Patent number: 4459508
    Abstract: An image tube comprises a conductive film along the inside surface of an insulating tube extending axially of the image tube between a photoelectric cathode and a fluorescent anode. The conductive film should be electrically connected to the photoelectric cathode and have an axial length between 1/2 and 3/4 of that of the insulating tube. The conductive film may be formed along the outside surface of the insulating tube and either together with or without a conventional semi-insulating layer formed along the inside surface of the insulating tube.
    Type: Grant
    Filed: August 10, 1981
    Date of Patent: July 10, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kozo Ichikawa, Tadao Shima, Tadafumi Hoshiyama