Patents Assigned to Novellus Systems
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Patent number: 8916477Abstract: Provided are methods and systems for removing polysilicon on a wafer. A wafer can include a polysilicon layer and an exposed nitride and/or oxide structure. An etchant with a hydrogen-based species, such as hydrogen gas, and a fluorine-based species, such as nitrogen trifluoride, can be introduced. The hydrogen-based species and the fluorine-based species can be activated with a remote plasma source. The layer of polysilicon on the wafer can be removed at a selectivity over the exposed nitride and/or oxide structure that is greater than about 500:1.Type: GrantFiled: June 12, 2013Date of Patent: December 23, 2014Assignee: Novellus Systems, Inc.Inventors: Bayu Thedjoisworo, Jack Kuo, David Cheung, Joon Park
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Patent number: 8906791Abstract: Methods, apparatus, and systems for depositing materials with gaseous precursors are provided. In certain implementations, the methods involve providing a wafer substrate to a chamber of an apparatus. The apparatus includes a showerhead to deliver a gas to the chamber, a volume, and an isolation valve between the volume and the showerhead. A gas is delivered the volume when the isolation valve is closed, pressurizing the volume. The isolation valve is opened to allow the gas to flow to the showerhead when the gas is being delivered to the volume. A material is formed on the wafer substrate using the gas. In some implementations, releasing the pressurized gas from the volume reduces the duration of time to develop a spatially uniform gas flow across the showerhead.Type: GrantFiled: June 3, 2011Date of Patent: December 9, 2014Assignee: Novellus Systems, Inc.Inventors: Kie-Jin Park, Karl Leeser, Frank Greer, David Cohen
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Publication number: 20140357089Abstract: The embodiments disclosed herein pertain to novel methods and apparatus for removing material from a substrate. In certain embodiments, the method and apparatus are used to remove negative photoresist, though the disclosed techniques may be implemented to remove a variety of materials. In practicing the disclosed embodiments, a stripping solution may be introduced from an inlet to an internal manifold, sometimes referred to as a cross flow manifold. The solution flows laterally through a relatively narrow cavity between the substrate and the base plate. Fluid exits the narrow cavity at an outlet, which is positioned on the other side of the substrate, opposite the inlet and internal manifold. The substrate spins while in contact with the stripping solution to achieve a more uniform flow over the face of the substrate. In some embodiments, the base plate includes protuberances which operate to increase the flow rate (and thereby increase the local Re) near the face of the substrate.Type: ApplicationFiled: May 29, 2013Publication date: December 4, 2014Applicant: Novellus Systems, Inc.Inventors: Bryan L. BUCKALEW, Steven T. MAYER, David PORTER, Thomas A. PONNUSWAMY
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Publication number: 20140348618Abstract: A robot for use in vacuum chambers is disclosed. The robot may be mounted within an oblong transfer chamber and may be translated within the transfer chamber by an umbilical arm operating in conjunction with a linear motion guide and carriage. Motors or drive systems for the robot may be housed in atmospheric conditions, and the transfer chamber may be kept at a vacuum. The robot may include one or more arms configured for wafer handling. The robot may include one or more motors or drive systems and a multi-axial seal to realize independent extension/retraction of each arm and overall simultaneous rotation of the arm assembly.Type: ApplicationFiled: May 24, 2013Publication date: November 27, 2014Applicant: Novellus Systems, Inc.Inventor: Richard M. Blank
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Patent number: 8895415Abstract: The method and apparatus disclosed herein relate to preparing a stack structure for an electronic device on a semiconductor substrate. A particularly beneficial application of the method is in reduction of internal stress in a stack containing multiple layers of silicon. Typically, though not necessarily, the internal stress is a compressive stress, which often manifests as wafer bow. In some embodiments, the method reduces the internal stress of a work piece by depositing phosphorus doped silicon layers having low internal compressive stress or even tensile stress. The method and apparatus disclosed herein can be used to reduce compressive bow in stacks containing silicon.Type: GrantFiled: May 31, 2013Date of Patent: November 25, 2014Assignee: Novellus Systems, Inc.Inventors: Keith Fox, Dong Niu, Joseph L. Womack
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Patent number: 8889233Abstract: The present invention addresses provides improved methods of preparing a low-k dielectric material on a substrate. The methods involve multi-step ultraviolet curing processes in which UV intensity, wafer substrate temperature and other conditions may be independently modulated at each step. In certain embodiments, a film containing a structure former and a porogen is exposed to UV radiation in a first step to facilitate removal of the porogen and create a porous dielectric film. In a second step, the film is exposed to UV radiation to increase crosslinking within the porous film. In certain embodiments, the curing takes place in a multi-station UV chamber wherein UV intensity and substrate temperature may be independently controlled at each station.Type: GrantFiled: March 6, 2006Date of Patent: November 18, 2014Assignee: Novellus Systems, Inc.Inventors: Maxim Kelman, Krishnan Shrinivasan, Feng Wang, Victor Lu, Sean Chang, Guangquan Lu
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Patent number: 8883640Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.Type: GrantFiled: May 13, 2013Date of Patent: November 11, 2014Assignee: Novellus Systems, Inc.Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
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Patent number: 8883637Abstract: A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.Type: GrantFiled: June 28, 2012Date of Patent: November 11, 2014Assignee: Novellus Systems, Inc.Inventors: Esther Jeng, Anand Chandrashekar, Raashina Humayun, Michal Danek, Ronald Powell
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Patent number: 8883406Abstract: A method for supplying a first gas and a second gas using a purge ring in a photonic processing system includes arranging a first layer and a second layer to define a first plenum and a first baffle, arranging the second layer and a third layer to define a second plenum and a second baffle, receiving a first gas at the first plenum that flows through the first plenum and the first baffle to an inner region, and receiving a second gas at the second plenum that flows through the second plenum and the second baffle to the inner region. The second baffle is one of less restrictive and more restrictive than the first baffle.Type: GrantFiled: November 5, 2013Date of Patent: November 11, 2014Assignee: Novellus Systems, Inc.Inventors: James Lee, Lisa Gytri
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Patent number: 8864935Abstract: Embodiments of a plasma generator apparatus for ashing a work piece are provided. The apparatus includes a container adapted for continuous gas flow there through from an inlet end to an outlet end thereof. The container is fabricated of a dielectric material and adapted for ionization therein of a portion of at least one component of gas flowing therethrough. A gas flow distributor is configured to direct gas flow to a region within the container and a coil surrounds at least a portion of side walls of the container adjacent the region of the container to which the gas flow distributor directs gas flow. A radio frequency generator is coupled to the coil.Type: GrantFiled: June 11, 2012Date of Patent: October 21, 2014Assignee: Novellus Systems, Inc.Inventors: James A. Fair, Vincent Decaux, Anirban Guha, David Cheung, John Keller, Peter Jagusch
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Patent number: 8858763Abstract: Disclosed are apparatus and method embodiments for achieving etch and/or deposition selectivity in vias and trenches of a semiconductor wafer. That is, deposition coverage in the bottom of each via of a semiconductor wafer differs from the coverage in the bottom of each trench of such wafer. The selectivity may be configured so as to result in punch through in each via without damaging the dielectric material at the bottom of each trench or the like. In this configuration, the coverage amount deposited in each trench is greater than the coverage amount deposited in each via.Type: GrantFiled: February 24, 2009Date of Patent: October 14, 2014Assignee: Novellus Systems, Inc.Inventors: Erich R. Klawuhn, Robert Rozbicki, Girish A. Dixit
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Patent number: 8858774Abstract: Methods of electroplating metal on a substrate while controlling azimuthal uniformity, include, in one aspect, providing the substrate to the electroplating apparatus configured for rotating the substrate during electroplating, and electroplating the metal on the substrate while rotating the substrate relative to a shield such that a selected portion of the substrate at a selected azimuthal position dwells in a shielded area for a different amount of time than a second portion of the substrate having the same average arc length and the same average radial position and residing at a different angular (azimuthal) position. For example, a semiconductor wafer substrate can be rotated during electroplating slower or faster, when the selected portion of the substrate passes through the shielded area.Type: GrantFiled: April 3, 2012Date of Patent: October 14, 2014Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, David W. Porter, Bryan L. Buckalew, Robert Rash
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Publication number: 20140302689Abstract: Methods for depositing flowable dielectric films are provided. In some embodiments, the methods involve introducing a silicon-containing precursor to a deposition chamber wherein the precursor is characterized by having a partial pressure:vapor pressure ratio between 0.01 and 1. In some embodiments, the methods involve depositing a high density plasma dielectric film on a flowable dielectric film. The high density plasma dielectric film may fill a gap on a substrate. Also provided are apparatuses for performing the methods.Type: ApplicationFiled: April 9, 2014Publication date: October 9, 2014Applicant: Novellus Systems, Inc.Inventors: Kaihan Ashtiani, Michael Wood, John Drewery, Naohiro Shoda, Bart van Schravendijk, Lakshminarayana Nittala, Nerissa Draeger
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Patent number: 8851463Abstract: Examples of novel semiconductor processing pedestals, and apparatuses including such pedestals, are described. These pedestals are specifically configured to provide uniform heat transfer to semiconductor substrates and to reduce maintenance complexity and/or frequency. Specifically, a pedestal may include a removable cover positioned over a metal platen of the pedestal. The removable cover is configured to maintain a consistent and uniform temperature profile of its substrate-facing surface even though the platen's upper-surface, which supports the cover and is in thermal communication with the cover, may have a much less uniform temperature profile. The cover may be made from certain ceramic materials and shaped as a thin plate. These materials are resistant to the processing environments and maintain their thermal characteristics over many processing cycles. The cover can be easily removed from the platen and replaced with a new one without a need for major disassembly of the entire apparatus.Type: GrantFiled: January 8, 2013Date of Patent: October 7, 2014Assignee: Novellus Systems, Inc.Inventors: Ivelin Angelov, Brian Severson, Natan Solomon
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Patent number: 8853080Abstract: Methods of producing low resistivity tungsten bulk layers having low roughness and associated apparatus are provided. According to various embodiments, the methods involve CVD deposition of tungsten at high pressures and/or high temperatures. In some embodiments, the CVD deposition occurs in the presence of alternating nitrogen gas pulses, such that alternating portions of the film are deposited by CVD in the absence of nitrogen and in the presence of nitrogen.Type: GrantFiled: October 2, 2012Date of Patent: October 7, 2014Assignee: Novellus Systems, Inc.Inventors: Yan Guan, Abhishek Manohar, Deqi Wang, Feng Chen, Raashina Humayun
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Patent number: 8846525Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.Type: GrantFiled: August 15, 2013Date of Patent: September 30, 2014Assignee: Novellus Systems, Inc.Inventors: Vishwanathan Rangarajan, George Andrew Antonelli, Ananda Banerji, Bart Van Schravendijk
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Patent number: 8846536Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.Type: GrantFiled: June 11, 2012Date of Patent: September 30, 2014Assignee: Novellus Systems, Inc.Inventors: Nerissa Draeger, Karena Shannon, Bart van Schravendijk, Kaihan Ashtiani
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Patent number: 8835317Abstract: Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner.Type: GrantFiled: May 6, 2013Date of Patent: September 16, 2014Assignee: Novellus Systems, Inc.Inventors: Anand Chandrashekar, Raashina Humayun, Michal Danek, Aaron R. Fellis, Sean Chang
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Publication number: 20140238608Abstract: A showerhead assembly for a substrate processing system includes a back plate connected to a gas channel. A face plate is connected adjacent to a first surface of the back plate and includes a gas diffusion surface. An electrode is arranged in one of the back plate and the face plate and is connected to one or more conductors. A gas plenum is defined between the back plate and the face plate and is in fluid communication with the gas channel. The back plate and the face plate are made of a non-metallic material.Type: ApplicationFiled: April 8, 2013Publication date: August 28, 2014Applicant: Novellus Systems, Inc.Inventors: Mohamed Sabri, Edward Augustyniak, Douglas L. Keil, Ramkishan Rao Lingampalli, Karl Leeser, Cody Barnett
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Publication number: 20140230860Abstract: Disclosed are pre-wetting apparatus designs and methods for cleaning solid contaminants from substrates prior to through resist deposition of metal. In some embodiments, a pre-wetting apparatus includes a process chamber having a substrate holder, and at least one nozzle located directly above the wafer substrate and configured to deliver pre-wetting liquid (e.g., degassed deionized water) onto the substrate at a grazing angle of between about 5 and 45 degrees. In some embodiments the nozzle is a fan nozzle configured to deliver the liquid to the center of the substrate, such that the liquid first impacts the substrate in the vicinity of the center and then flows over the center of the substrate. In some embodiments the substrate is rotated unidirectionally or bidirectionally during pre-wetting with multiple accelerations and decelerations, which facilitate removal of contaminants.Type: ApplicationFiled: February 18, 2014Publication date: August 21, 2014Applicant: Novellus Systems, Inc.Inventors: Lee Peng Chua, Bryan L. Buckalew, Thomas Anand Ponnuswamy, Brian Blackman, Chad Michael Hosack, Steven T. Mayer