Patents Assigned to Novellus Systems
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Patent number: 8747964Abstract: Systems, methods, and apparatus for depositing a tantalum layer on a wafer substrate are disclosed. In one aspect, a tantalum layer may be deposited on a surface of a wafer substrate using an ion-induced atomic layer deposition process with a tantalum precursor. A copper layer may be deposited on the tantalum layer.Type: GrantFiled: September 23, 2011Date of Patent: June 10, 2014Assignee: Novellus Systems, Inc.Inventors: Kie Jin Park, Jeong Seok Na, Victor Lu
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Patent number: 8741394Abstract: Methods for depositing film stacks by plasma enhanced chemical vapor deposition are described. In one example, a method for depositing a film stack on a substrate, wherein the film stack includes films of different compositions and the deposition is performed in a process station in-situ, is provided. The method includes, in a first plasma-activated film deposition phase, depositing a first layer of film having a first film composition on the substrate; in a second plasma-activated deposition phase, depositing a second layer of film having a second film composition on the first layer of film; and sustaining the plasma while transitioning a composition of the plasma from the first plasma-activated film deposition phase to the second plasma-activated film deposition phase.Type: GrantFiled: December 16, 2010Date of Patent: June 3, 2014Assignee: Novellus Systems, Inc.Inventors: Jason Haverkamp, Pramod Subramonium, Joe Womack, Dong Niu, Keith Fox, John Alexy, Patrick Breiling, Jennifer O'Loughlin, Mandyam Sriram, George Andrew Antonelli, Bart van Schravendijk
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Patent number: 8734663Abstract: A method for removing species from a substrate includes arranging a purge ring in a chamber proximate to a pedestal. The purge ring includes an inlet portion and an exhaust portion. The inlet portion defines an inlet plenum and an inlet baffle. The inlet baffle includes a continuous slit that is substantially continuous around a peripheral arc not less than about 270°. The exhaust portion includes an exhaust channel that is located substantially opposite the inlet baffle. The method further includes supplying ozone to the inlet plenum; at least partially defining a ring hole space having a periphery using the inlet portion and the exhaust portion; conveying gas from the inlet plenum into the ring hole space using the inlet baffle; conveying gas and other matter out of a purge space using the exhaust portion; and inhibiting deposition of material evolved from the substrate during curing using the purge ring.Type: GrantFiled: July 17, 2013Date of Patent: May 27, 2014Assignee: Novellus Systems, Inc.Inventors: Eugene Smargiassi, Stephen Yu-Hong Lau, George D. Kamian, Ming Xi
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Publication number: 20140141542Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.Type: ApplicationFiled: November 7, 2013Publication date: May 22, 2014Applicant: Novellus Systems, Inc.Inventors: Hu Kang, Shankar Swaminathan, Adrien LaVoie, Jon Henri
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Patent number: 8728958Abstract: Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps.Type: GrantFiled: December 9, 2010Date of Patent: May 20, 2014Assignee: Novellus Systems, Inc.Inventors: Kaihan Ashtiani, Michael Wood, John Drewery, Naohiro Shoda, Bart van Schravendijk, Lakshminarayana Nittala, Nerissa Draeger
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Patent number: 8728955Abstract: A method of depositing a film on a substrate surface includes providing a substrate in a reaction chamber; selecting a silicon-containing reactant from a precursor group consisting of di-tert-butyl diazidosilane, bis(ethylmethylamido)silane, bis(diisopropylamino)silane, bis(tert-butylhydrazido)diethylsilane, tris(dimethylamido)silylazide, tris(dimethylamido)silylamide, ethylsilicon triazide, diisopropylaminosilane, and hexakis(dimethylamido)disilazane; introducing the silicon-containing reactant in vapor phase into the reaction chamber under conditions allowing the silicon-containing reactant to adsorb onto the substrate surface; introducing a second reactant in vapor phase into the reaction chamber while the silicon-containing reactant is adsorbed on the substrate surface, and wherein the second reactant is introduced without first sweeping the silicon-containing reactant out of the reaction chamber; and exposing the substrate surface to plasma to drive a reaction between the silicon-containing reactant andType: GrantFiled: March 1, 2012Date of Patent: May 20, 2014Assignee: Novellus Systems, Inc.Inventors: Adrien LaVoie, Mark J. Saly, Daniel Moser, Rajesh Odedra, Ravi Konjolia
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Patent number: 8728956Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by the following operations: (a) exposing the substrate surface to a first reactant in vapor phase under conditions allowing the first reactant to adsorb onto the substrate surface; (b) exposing the substrate surface to a second reactant in vapor phase while the first reactant is adsorbed on the substrate surface; and (c) exposing the substrate surface to plasma to drive a reaction between the first and second reactants adsorbed on the substrate surface to form the film.Type: GrantFiled: April 11, 2011Date of Patent: May 20, 2014Assignee: Novellus Systems, Inc.Inventors: Adrien LaVoie, Shankar Swaminathan, Hu Kang, Ramesh Chandrasekharan, Tom Dorsh, Dennis M. Hausmann, Jon Henri, Thomas Jewell, Ming Li, Bryan Schlief, Antonio Xavier, Thomas W. Mountsier, Bart J. van Schravendijk, Easwar Srinivasan, Mandyam Sriram
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Publication number: 20140131211Abstract: An electrolyte, and particularly anolyte, may be circulated via an open loop having a pressure regulator, so that the pressure in the plating chamber is maintained at a constant (or substantially constant) value with respect to atmospheric pressure. In these embodiments, a pressure regulator is in fluid communication with the anode chamber.Type: ApplicationFiled: November 7, 2013Publication date: May 15, 2014Applicant: Novellus Systems, Inc.Inventors: Robert Rash, Richard Abraham, David W. Porter, Steven T. Mayer
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Publication number: 20140134827Abstract: A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.Type: ApplicationFiled: November 7, 2013Publication date: May 15, 2014Applicant: Novellus Systems, Inc.Inventors: Shankar Swaminathan, Bart van Schravendijk, Adrien Lavoie, Sesha Varadarajan, Jason Daejin Park, Michal Danek, Naohiro Shoda
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Patent number: 8722539Abstract: A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias.Type: GrantFiled: October 11, 2011Date of Patent: May 13, 2014Assignee: Novellus Systems, Inc.Inventors: Jonathan D. Reid, Katie Qun Wang, Mark J. Willey
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Patent number: 8721797Abstract: Improved methods and apparatus for stripping photoresist and removing ion implant related residues from a work piece surface are provided. According to various embodiments, the workpiece is exposed to a passivation plasma, allowed to cool for a period of time, and then exposed to an oxygen-based or hydrogen-based plasma to remove the photoresist and ion implant related residues. Aspects of the invention include reducing silicon loss, leaving little or no residue while maintaining an acceptable strip rate. In certain embodiments, methods and apparatus remove photoresist material after high-dose ion implantation processes.Type: GrantFiled: December 8, 2010Date of Patent: May 13, 2014Assignee: Novellus Systems, Inc.Inventors: David Cheung, Haoquan Fang, Jack Kuo, Ilia Kalinovski, Ted Li, Andrew Yao
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Publication number: 20140124123Abstract: Novel methods for extending electrostatic chuck lifetimes are provided. The methods involve providing a chuck having a metal cooling plate attached to a ceramic top plate, and after a period of use, disassembling the chuck, and providing a new chuck including the used metal cooling plate. In certain embodiments, the use of a low temperature bond material uniquely allows the described disassembly and reassembly without damage to other parts of the chuck.Type: ApplicationFiled: October 29, 2013Publication date: May 8, 2014Applicant: Novellus Systems, Inc.Inventors: Alisa Hart, John C. Boyd, Liza Palma, Alasdair Dent
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Patent number: 8715788Abstract: Methods and apparatus for improving mechanical properties of a dielectric film on a substrate are provided. In some embodiments, the dielectric film is a carbon-doped oxide (CDO). The methods involve the use of modulated ultraviolet radiation to increase the mechanical strength while limiting shrinkage and limiting any increases in the dielectric constant of the film. Methods improve film hardness, modulus and cohesive strength, which provide better integration capability and improved performance in the subsequent device fabrication procedures such as chemical mechanical polishing (CMP) and packaging.Type: GrantFiled: October 17, 2011Date of Patent: May 6, 2014Assignee: Novellus Systems, Inc.Inventors: Ananda K. Bandyopadhyay, Seon-Mee Cho, Haiying Fu, Easwar Srinivasan, David Mordo
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Patent number: 8716143Abstract: A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the dielectric film having a dielectric constant no greater than about 4.0, and stripping the resist composition to leave a substantially silicon-containing ash residue on the dielectric film. The method then includes contacting the ash residue with plasma comprising an ionized, essentially pure noble gas such as helium to remove the resist residue without substantially affecting the underlying dielectric film.Type: GrantFiled: February 10, 2012Date of Patent: May 6, 2014Assignee: Novellus Systems, Inc.Inventors: David Cheung, Kirk J. Ostrowski
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Publication number: 20140120733Abstract: Improved methods for stripping photoresist and removing etch-related residues from dielectric materials are provided. In one aspect of the invention, methods involve removing material from a dielectric layer using a hydrogen-based etch process employing a weak oxidizing agent and fluorine-containing compound. Substrate temperature is maintained at a level of about 160° C. or less, e.g., less than about 90° C.Type: ApplicationFiled: October 29, 2013Publication date: May 1, 2014Applicant: Novellus Systems, Inc.Inventors: David Cheung, Ted Li, Anirban Guha, Kirk Ostrowski
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Patent number: 8709948Abstract: Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.Type: GrantFiled: March 12, 2010Date of Patent: April 29, 2014Assignee: Novellus Systems, Inc.Inventors: Michal Danek, Tom Mountsier, Jonathan Reid, Juwen Gao, Aaron Fellis
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Patent number: 8709551Abstract: Methods and hardware for depositing ultra-smooth silicon-containing films and film stacks are described. In one example, an embodiment of a method for forming a silicon-containing film on a substrate in a plasma-enhanced chemical vapor deposition apparatus is disclosed, the method including supplying a silicon-containing reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a co-reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a capacitively-coupled plasma to a process station of the plasma-enhanced chemical vapor deposition apparatus, the plasma including silicon radicals generated from the silicon-containing reactant and co-reactant radicals generated from the co-reactant; and depositing the silicon-containing film on the substrate, the silicon-containing film having a refractive index of between 1.4 and 2.1, the silicon-containing film further having an absolute roughness of less than or equal to 4.5 ? as measured on a silicon substrate.Type: GrantFiled: December 16, 2010Date of Patent: April 29, 2014Assignee: Novellus Systems, Inc.Inventors: Keith Fox, Dong Niu, Joe Womack, Mandyam Sriram, George Andrew Antonelli, Bart van Schravendijk, Jennifer O'Loughlin
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Patent number: 8703615Abstract: Disclosed are methods of depositing and annealing a copper seed layer. A copper seed layer may be deposited on a ruthenium layer disposed on a surface of a wafer and on features in the wafer. The thickness of the ruthenium layer may be about 40 Angstroms or less. The copper seed layer may be annealed in a reducing atmosphere having an oxygen concentration of about 2 parts per million or less. Annealing the copper seed layer in a low-oxygen atmosphere may improve the properties of the copper seed layer.Type: GrantFiled: February 7, 2012Date of Patent: April 22, 2014Assignee: Novellus Systems, Inc.Inventors: Thomas A. Ponnuswamy, John H. Sukamto, Jonathan D. Reid, Steven T. Mayer, Huanfeng Zhu
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Publication number: 20140097088Abstract: The disclosed embodiments relate to methods and apparatus for immersing a substrate in electrolyte in an electroplating cell under sub-atmospheric conditions to reduce or eliminate the formation/trapping of bubbles as the substrate is immersed. Various electrolyte recirculation loops are disclosed to provide electrolyte to the plating cell. The recirculation loops may include pumps, degassers, sensors, valves, etc. The disclosed embodiments allow a substrate to be immersed quickly, greatly reducing the issues related to bubble formation and uneven plating times during electroplating.Type: ApplicationFiled: December 10, 2013Publication date: April 10, 2014Applicant: Novellus Systems, Inc.Inventors: R. Marshall Stowell, Jingbin Feng, David W. Porter
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Publication number: 20140094035Abstract: Techniques, systems, and apparatuses for performing carbon gap-fill in semiconductor wafers are provided. The techniques may include performing deposition-etching operations in a cyclic fashion to fill a gap feature with carbon. A plurality of such deposition-etching cycles may be performed, resulting in a localized build-up of carbon film on the top surface of the semiconductor wafer near the gap feature. An ashing operation may then be performed to preferentially remove the built-up material from the top surface of the semiconductor wafer. Further groups of deposition-etching cycles may then be performed, interspersed with further ashing cycles.Type: ApplicationFiled: May 17, 2013Publication date: April 3, 2014Applicant: Novellus Systems, Inc.Inventors: Chunhai Ji, Sirish Reddy, Tuo Wang, Mandyam Sriram