Patents Assigned to NVidia
  • Patent number: 8867605
    Abstract: A decoder may include a first stage that can be used to decode (prior to deblocking) an encoded frame of data. The decoder may also include a second stage that is downstream of the first stage. The second stage includes a first deblocker and a second deblocker that can be used to deblock decoded frames in parallel.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: October 21, 2014
    Assignee: Nvidia Corporation
    Inventor: Wei Jia
  • Patent number: 8866833
    Abstract: A system, method, and computer program product are provided for a dynamic display refresh. In use, a state of a display device is identified in which an entirety of an image frame is currently displayed by the display device. In response to the identification of the state, it is determined whether an entirety of a next image frame to be displayed has been rendered to memory. The next image frame is transmitted to the display device for display thereof, when it is determined that the entirety of the next image frame to be displayed has been rendered to the memory. Further, a refresh of the display device is delayed, when it is determined that the entirety of the next image frame to be displayed has not been rendered to the memory.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: October 21, 2014
    Assignee: NVIDIA Corporation
    Inventors: Tom Petersen, David Wyatt, Paul van der Kouwe, Emmett M. Kilgariff, Laurence Harrison, Jensen Huang, Tony Tamasi, Gerrit A. Slavenburg, Thomas F. Fox, David Matthew Stears, Robert Jan Schutten, Ross Cunniff, Ajay Kamalvanshi, Robert Osborne, Rouslan Dimitrov
  • Patent number: 8866528
    Abstract: A dual flip-flop circuit combines two or more flip-flip sub-circuits into a single circuit. The flip-flop circuit comprises a first flip-flop sub-circuit and a second flip-flop sub-circuit. The first flip-flop sub-circuit comprises a first storage sub-circuit configured to store a first selected input signal and transfer the first selected input signal to a first output signal when a buffered clock signal transitions between two different logic levels and a dock driver configured to receive a clock input signal, generate an inverted clock signal, and generate the buffered clock signal. The second flip-flop sub-circuit is coupled to the clock driver and configured to receive the inverted clock signal and the buffered clock signal. The second flip-flop sub-circuit comprises a second storage sub-circuit configured to store a second selected input signal and transfer the second selected input signal to a second output signal when the buffered clock signal transitions.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: October 21, 2014
    Assignee: NVIDIA Corporation
    Inventors: Hwong-Kwo Lin, Ge Yang, Xi Zhang, Jiani Yu, Ting-Hsiang Chu
  • Publication number: 20140306909
    Abstract: A computer system has a touch sensitive display screen within a housing and a touch sensor, which is coupled to a bus. A processor and a memory are coupled to the bus. The housing has a channel for receiving and storing a stylus. A sensor is disposed adjacent to the channel. The sensor interacts with the stylus through the Hall effect caused by a magnet within the stylus and is thus operable for detecting a presence or absence of the stylus without physical contact therewith. The memory has an application which, when executed on the processor, automatically performs one or more stylus related software functions upon a reported absence of the stylus from the channel. One of the software functions includes palm detection rejection with respect to data from the touch sensor. Another function includes display of a GUI displaying a listing of applications that are based on stylus data entry modes. Another function includes setting up OS modes designed for accurate operation of stylus data entry.
    Type: Application
    Filed: April 10, 2014
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Christen Kent PEDERSEN, Arman TOORIANS
  • Publication number: 20140310665
    Abstract: A system, method, and computer program product are provided for translating a hardware design. In use, a hardware design is received that is a graph-based common representation of a hardware design stored in a hardware model database. Logic code is generated for each hardware module node of the graph-based common representation of the hardware design. Additionally, flow control code is generated for each hardware module node of the graph-based common representation of the hardware design. A logic code model of the hardware design that includes the generated logic code and the generated flow control code is stored.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventor: Robert Anthony Alfieri
  • Publication number: 20140306929
    Abstract: Operating touch screen enabled electronic devices is described. A contact of a capacitive stylus with a capacitive touch screen display panel is detected. A stylus tip characteristic is determined in relation to a contact surface of the touch screen display panel and the capacitive stylus based on the detection of the contact therewith and a size of the contact surface. An input by a user is communicated to the application based on the determined stylus tip characteristic or a capacitive signature of the stylus.
    Type: Application
    Filed: April 10, 2014
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Jen-Hsun Huang, Arman Toorians
  • Publication number: 20140306775
    Abstract: A system and method are provided for increasing a voltage range associated with a voltage controlled oscillator. A voltage-to-current converter is provided. Additionally, a current controlled oscillator is provided that is in communication with the voltage-to-current converter. Further, at least one circuit component is provided that is in communication with the voltage-to-current converter for increasing a voltage range with which the apparatus operates as a voltage controlled oscillator.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Dong-Myung Choi, Anuradha Subbaraman
  • Publication number: 20140310484
    Abstract: A system and method for efficient memory access. The method includes receiving a request to access a portion of memory. The request comprises a first address. The method further includes determining whether the first address corresponds to a thread local portion of memory and in response to the first address corresponding to the thread local portion of memory, translating the first address to a second address. The method further includes accessing the thread local portion of memory based on the second address. The second address corresponds to an offset in a region of memory reserved for storing thread local data and allocations into the region are contiguous for a plurality of threads at each thread local offset.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventor: Olivier GIROUX
  • Publication number: 20140306687
    Abstract: A system and method are provided for measuring an integrated circuit age. A first clock generator is provided for generating a first dock signal. Additionally, a second clock generator is provided for generating a second clock signal. Further, a phase detector is provided that is in communication with the first dock generator and the second dock generator. The phase detector is operable for receiving the first clock signal from the first clock generator and the second clock signal from the second dock generator, and outputting a phase difference signal. Still yet, a circuit is provided that is in communication with the phase detector and the first clock generator. The circuit is operable for receiving the first clock signal from the first clock generator and the phase difference signal from the phase detector. The circuit is further operable for synchronizing the phase difference signal from the phase detector with the first dock signal from the first clock generator.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Rubil Ahmadi, Varghese George, Suhas Mysore Satheesh
  • Publication number: 20140307116
    Abstract: A system and method for initiating cooperative control over a mobile device configured to capture static images or images contained within a video sequence. The method includes obtaining an instruction on the mobile device from an external source. The method includes initiating an image controller on the mobile device, wherein the image controller controls an image capturing pipeline of the mobile device. The method includes determining that a raw image was captured by the mobile device. The method includes performing an action on the raw image based on the instruction.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventor: Guanghua Gary ZHANG
  • Publication number: 20140310673
    Abstract: A system, method, and computer program product are provided for translating a hardware design. In use, a hardware design is received that is encoded as one or more data flows and one or more control constructs. A node is generated for each data flow of the one or more data flows and for each control construct of the one or more control constructs. Additionally, connectivity of the nodes is determined to generate a graph-based intermediate representation of the hardware design and the graph-based intermediate representation of the hardware design is stored in a source database.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventor: Robert Anthony Alfieri
  • Publication number: 20140306928
    Abstract: Signaling touch screen enabled devices is disclosed. A capacitive stylus has a body suitable for being hand held as a writing instrument. The body has a tip for interfacing with a capacitive touch screen display panel of a computer system. The stylus has an insulator disposed near its tip, which insulates capacitance of the stylus body. A switch selectively couples the tip to the remaining parts of the stylus body. A controller controls the switch. A mode selector on the body is responsive to being pressed to signal the controller for selecting one of multiple modes. The controller is configured to enter the selected mode responsive to the mode selector and is configured to control the switch unit to switch according to different signal patterns depending on a mode entered by the controller.
    Type: Application
    Filed: April 10, 2014
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Christen Kent PEDERSEN, Arman TOORIANS
  • Publication number: 20140307766
    Abstract: A method includes iteratively scanning, through a processor, at least a portion of a map of equalization coefficients related to channel equalization in a data communication link based on an ordinal integer step size S>1 for N (N>1) different sequences thereof to determine optimal points therein for which a signal quality in the data communication link is optimal. The method also includes performing, through the processor, a fine search for optimal equalization coefficients based on the determined optimal points.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Feroze Karim, Vishal Mehta, Hungse Cha, Hitendra Dutt, Dennis Ma
  • Publication number: 20140310664
    Abstract: A system, method, and computer program product are provided for translating a hardware design. In use, a hardware design is received that is a graph-based intermediate representation of a hardware design stored in a source database. An instance of each unique module in the source database is determined and a hardware module node is generated for each unique module. Additionally, a list of one or more instances is associated with each hardware module node and a graph-based common representation of the hardware design that includes one or more of the generated hardware module nodes is stored.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventor: Robert Anthony Alfieri
  • Patent number: 8860722
    Abstract: Early Z scoreboard tracking systems and methods in accordance with the present invention are described. Multiple pixels are received and a pixel depth raster operation is performed on the pixels. The pixel depth raster operation comprises discarding a pixel that is occluded. In one exemplary implementation, the depth raster operation is done at a faster rate than a color raster operation. Pixels that pass the depth raster operation are checked for screen coincidence. Pixels with screen coincidence are stalled and pixels without screen coincidence are forwarded to lower stages of the pipeline. The lower stages of the pipeline are programmable and pixel flight time can vary (e.g., can include multiple passes through the lower stages). Execution through the lower stages is directed by a program sequencer which also directs notification to the pixel flight tracking when a pixel is done processing.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: October 14, 2014
    Assignee: NVIDIA Corporation
    Inventors: Brian Cabral, Edward A. Hutchins, Christopher Donham
  • Patent number: 8860741
    Abstract: In contrast to a conventional computing system in which the graphics processor (graphics processing unit or GPU) is treated as a slave to one or several CPUs, systems and methods are provided that allow the GPU to be treated as a central processing unit (CPU) from the perspective of the operating system. The GPU can access a memory space shared by other CPUs in the computing system. Caches utilized by the GPU may be coherent with caches utilized by other CPUs in the computing system. The GPU may share execution of general-purpose computations with other CPUs in the computing system.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: October 14, 2014
    Assignee: NVIDIA Corporation
    Inventors: Norbert Juffa, Stuart F. Oberman
  • Patent number: 8862091
    Abstract: An efficient method and apparatus to receive broadcasted emergency alerts using portable handheld devices or mobile devices that are operable to provide a user with relevant alerts based on the user's relevant position, in a low-powered, always-on manner are presented. Using the always on partitions of both the receiver and the system on chip (SOC) of a mobile device, embodiments of the present invention are capable of determining whether or not the remainder of the circuits of a mobile device need to be powered on in order to record audio data associated with an alert, when the alert is received. Furthermore, embodiments of the present invention are operable for displaying these alerts in a manner such that a user is notified that a relevant alert has been received and placing the user in a position where the user must address the alert notification and take appropriate action.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: October 14, 2014
    Assignee: Nvidia Corporation
    Inventor: Mark Alan Overby
  • Patent number: 8860725
    Abstract: A system, method, and computer program product are provided for deterministically simulating light transport. In use, all pairs of non-negative integers are enumerated (e.g. in a predetermined order). Additionally, for each of the enumerated pairs of non-negative integers, an associated pair of a query point and a photon is identified by: identifying a query point associated with a first non-negative integer of the pair of non-negative integers using a deterministic point sequence of query points and identifying a photon associated with a second non-negative integer of the pair of non-negative integers using a deterministic point sequence of photons. Further, for each of the query points in the deterministic point sequence of query points, photons in the deterministic point sequence of photons associated with the query point are identified.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: October 14, 2014
    Assignee: NVIDIA Corporation
    Inventors: Alexander Keller, Leonhard Grünschloβ, Marc Droske
  • Patent number: 8860743
    Abstract: Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: October 14, 2014
    Assignee: Nvidia Corporation
    Inventors: Andrew Tao, Jerome F. Duluk, Jr., Jesse D. Hall, Henry Moreton
  • Patent number: 8860737
    Abstract: A processing unit includes multiple execution pipelines, each of which is coupled to a first input section for receiving input data for pixel processing and a second input section for receiving input data for vertex processing and to a first output section for storing processed pixel data and a second output section for storing processed vertex data. The processed vertex data is rasterized and scan converted into pixel data that is used as the input data for pixel processing. The processed pixel data is output to a raster analyzer.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: October 14, 2014
    Assignee: NVIDIA Corporation
    Inventors: John Erik Lindholm, Brett W. Coon, Stuart F. Oberman, Ming Y. Siu, Matthew P. Gerlach