Patents Assigned to NVidia
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Publication number: 20140098096Abstract: A graphics processing subsystem operable to efficiently render an ambient occlusion texture. In one embodiment, the graphics processing subsystem includes: (1) a memory configured to store a depth data structure according to which a full-resolution depth texture is represented by a plurality of unique reduced-resolution depth sub-textures, and (2) a graphics processing unit configured to communicate with the memory via a data bus, and, for a given pixel, execute a program to employ the plurality of unique reduced-resolution depth sub-textures to compute a plurality of coarse ambient occlusion textures, and to render the plurality of coarse ambient occlusion textures as a single full-resolution ambient occlusion texture for the given pixel.Type: ApplicationFiled: October 8, 2012Publication date: April 10, 2014Applicant: Nvidia CorporationInventor: Louis Bavoil
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Publication number: 20140097813Abstract: Embodiments are disclosed relating to an electric power conversion device and methods for controlling the operation thereof. One disclosed embodiment provides an electric power conversion device comprising a first current control mechanism coupled to an electric power source and an upstream end of an inductor, where the first current control mechanism is operable to control inductor current. The electric power conversion device further comprises a second current control mechanism coupled between the downstream end of the inductor and a load, where the second current control mechanism is operable to control how much of the inductor current is delivered to the load.Type: ApplicationFiled: October 8, 2012Publication date: April 10, 2014Applicant: NVIDIA CorporationInventor: William James Dally
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Publication number: 20140098898Abstract: Techniques for synchronizing error concealment during video decoding include determining a decoding error. A recovery point within a current frame is determined for each decoding error. The determined recovery point may be the start of the next good slice of a frame after the current frame containing the error. The number of macroblock to be concealed is also determined. The determined number of macroblocks from the recovery point may then be concealed in hardware or software. The techniques for concealing errors may also include determining available macroblocks for use in concealing the error. The techniques for concealing errors may further include selecting a given concealment mode.Type: ApplicationFiled: October 5, 2012Publication date: April 10, 2014Applicant: NVIDIA CORPORATIONInventors: Krishna Kishor Noru, Nitin Jadon, Shu-Jen Fang, Prahlad Venkatapuram, Visalakshi Vaduganathan
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Publication number: 20140098283Abstract: An efficient method and system for estimating an optimal focus position for capturing an image are presented. Embodiments of the present invention initially determine an initial lens position dataset. Then, scores are calculated for each value of the initial lens position dataset producing a plurality of scores. Embodiments of the present invention then determine an optimum focus position through interpolation and extrapolation by relating the initial lens position dataset to the score dataset, in which the score dataset comprises of the plurality of scores.Type: ApplicationFiled: October 4, 2012Publication date: April 10, 2014Applicant: NVIDIA CORPORATIONInventor: Hugh Phu Nguyen
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Publication number: 20140099090Abstract: Embodiments of the present invention initially calculate a confidence score for the image environment surrounding the subject matter in order to determine the initial number of lens positions. Once the initial lens positions are determined, a sharpness score is calculated for each determined initial lens position. Using these sharpness scores, embodiments of the present invention generate a projection used to locate an estimated optimum focus position as well as to determine an estimated sharpness score at this lens position. Embodiments of the present invention then position the lens of the camera to calculate the actual sharpness score at the estimated optimum focus position, which is then compared to the estimated optimum sharpness score previously calculated. Based on this comparison, embodiments of the present invention dynamically determine whether it has a sufficient number of lens positions to determine the optimum focus position or if additional sample lens positions are needed.Type: ApplicationFiled: October 4, 2012Publication date: April 10, 2014Applicant: NVIDIA CORPORATIONInventor: Hugh Phu Nguyen
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Publication number: 20140099994Abstract: Provided is an electronic camera. The electronic camera, in one embodiment, may include a camera chassis, as well as a shutter button coupled to the camera chassis. Further in accordance with this embodiment, the electronic camera may include a proximity sensor coupled to the camera chassis, wherein the proximity sensor is configured to pre-enable one or more camera features.Type: ApplicationFiled: October 4, 2012Publication date: April 10, 2014Applicant: NVIDIA CORPORATIONInventors: Lars Bishop, Keith Galocy, David Chait
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Patent number: 8692844Abstract: A method and system are disclosed for antialiased rendering a plurality of pixels in a computer system. The method and system comprise providing a fixed storage area and providing a plurality of sequential format levels for the plurality of pixels within the fixed storage area. The plurality of format levels represent pixels with varying degrees of complexity in subpixel geometry visible within the pixel. A system and method in accordance with the present invention provides at least the following format levels: one-fragment format, used when one surface fully covers a pixel; two-fragment format, used when two surfaces together cover a pixel; and multisample format, used when three or more surfaces cover a pixel. The method and system further comprise storing the plurality of pixels at a lowest appropriate format level within the fixed storage area, so that a minimum amount of data is transferred to and from the fixed storage area.Type: GrantFiled: September 28, 2000Date of Patent: April 8, 2014Assignee: NVIDIA CorporationInventors: Steven E. Molnar, David B. Kirk, John Stephen Montrym, Douglas A. Voorhies
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Patent number: 8694697Abstract: A system and method dispatches commands from multiple instruction streams to processing engines, allowing for some of the dispatched commands to be rescinded before they are executed by the processing engines. The dispatching enables several of the processing engines to execute commands concurrently. Dispatched commands may be rescinded to quickly switch processing from one instruction stream to another instruction stream.Type: GrantFiled: April 27, 2006Date of Patent: April 8, 2014Assignee: NVIDIA CorporationInventor: David William Nuechterlein
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Patent number: 8694750Abstract: Embodiments of the present invention are directed to a method and system for allowing data structures to be moved between storage locations of varying performance and cost without changing the application firmware. In one embodiment, rather than application firmware directly accessing memory, the application firmware requests a data structure by parameters, to which the implementation returns a pointer. The parameters can be, for example, the logical block address of a data sector, and the data structure can be mapping and associated information of that logical block address (LBA) to a location in the flash device.Type: GrantFiled: December 19, 2008Date of Patent: April 8, 2014Assignee: NVIDIA CorporationInventors: Dmitry Vyshetsky, Paul Gyugyi
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Patent number: 8694955Abstract: A technique for determining thermal design point (TDP) power efficiency for an integrated circuit is disclosed. A simulation executes a set of input vectors on a model of an integrated circuit to generate a first estimated power consumption data during a first number of clock cycles. A simulation executes the set of input vectors on a model of an integrated circuit to generate a second estimated power consumption data during a second number of clock cycles. TDP power efficiency for the integrated circuit is calculated based on the first estimated power consumption data and the second estimated power consumption data.Type: GrantFiled: September 17, 2010Date of Patent: April 8, 2014Assignee: Nvidia CorporationInventors: Robert J. Hasslen, Miodrag Vujkovic, Anish Muttreja, Kaushal Rajendra Gandhi
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Patent number: 8692837Abstract: One embodiment of the invention sets forth a technique for compressing and storing display data and optionally compressing and storing cursor data in a memory that is local to a graphics processing unit to reduce the power consumed by a mobile computing device when refreshing the screen. Compressing the display data and optionally the cursor data also reduces the relative cost of the invention by reducing the size of the local memory relative to the size that would be necessary if the display data were stored locally in uncompressed form. Thus, the invention may improve mobile computing device battery life, while keeping additional costs low.Type: GrantFiled: September 21, 2006Date of Patent: April 8, 2014Assignee: Nvidia CorporationInventors: Krishnan Sreenivas, Koen Bennebroek, Karthik Bhat, Stefano A. Pescador, David G. Reed, Brad W. Simeral, Edward M. Veeser
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Patent number: 8692829Abstract: One embodiment of the present invention sets forth a technique for computing plane equations for primitive shading after non-visible pixels are removed by z culling operations and pixel coverage has been determined. The z plane equations are computed before the plane equations for non-z primitive attributes are computed. The z plane equations are then used to perform screen-space z culling of primitives during and following rasterization. Culling of primitives is also performed based on pixel sample coverage. Consequently, primitives that have visible pixels after z culling operations reach the primitive shading unit. The non-z plane equations are only computed for geometry that is visible after the z culling operations. The primitive shading unit does not need to fetch vertex attributes from memory and does not need to compute non-z plane equations for the culled primitives.Type: GrantFiled: September 7, 2010Date of Patent: April 8, 2014Assignee: Nvidia CorporationInventors: Ziyad S. Hakura, Emmett M. Kilgariff
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Patent number: 8694688Abstract: A hardware support system for implementing accelerated disk I/O for a computer system. The system includes a bus interface for interfacing with a processor and a system memory of the computer system, a disk I/O engine coupled to the bus interface, and a device interface coupled to the disk I/O engine for interfacing the disk I/O engine with a disk drive. The disk I/O engine is configured to cause a start up of the disk drive upon receiving a disk start up command from the processor. The disk I/O engine is further configured to execute a disk transaction by processing the disk transaction information from a bypass register coupled to the disk I/O engine.Type: GrantFiled: December 28, 2007Date of Patent: April 8, 2014Assignee: NVIDIA CorporationInventors: Radoslav Danilak, Krishnaraj S. Rao
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Publication number: 20140092561Abstract: In various embodiments, a handheld mobile device and back cover for the same are provided. The back cover for a handheld mobile device comprises: a back cover body having a first surface and a second surface opposite to the first surface; and a heat dissipating plate fixed to the first surface of the back cover body; wherein a hole is provided in a region of the back cover body corresponding to the heat dissipating plate. The heat dissipating plate covers the heat-generating elements on the circuit board, and the heat dissipating plate is partly exposed to the outside via the corresponding hole in the back cover body, such that the heat dissipating plate eliminates the partial heat-generating points and dissipates heat to the outside via the hole effectively.Type: ApplicationFiled: September 24, 2013Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Qiang CHEN, Zhi TAN, Xianpeng HUANG
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Publication number: 20140092113Abstract: A system, method, and computer program product are provided for a dynamic display refresh. In use, a state of a display device is identified in which an entirety of an image frame is currently displayed by the display device. In response to the identification of the state, it is determined whether an entirety of a next image frame to be displayed has been rendered to memory. The next image frame is transmitted to the display device for display thereof, when it is determined that the entirety of the next image frame to be displayed has been rendered to the memory. Further, a refresh of the display device is delayed, when it is determined that the entirety of the next image frame to be displayed has not been rendered to the memory.Type: ApplicationFiled: September 11, 2013Publication date: April 3, 2014Applicant: NVIDIA CorporationInventors: Tom Petersen, David Wyatt, Paul van der Kouwe, Emmett M. Kilgariff, Laurence Harrison, Jensen Huang, Tony Tamasi, Gerrit A. Slavenburg, Thomas F. Fox, David Matthew Stears, Robert Jan Schutten, Ross Cunniff, Ajay Kamalvanshi, Robert Osborne, Rouslan L. Dimitrov
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Publication number: 20140095759Abstract: Techniques are disclosed for performing an auxiliary operation via a compute engine associated with a host computing device. The method includes determining that the auxiliary operation is directed to the compute engine, and determining that the auxiliary operation is associated with a first context comprising a first set of state parameters. The method further includes determining a first subset of state parameters related to the auxiliary operation based on the first set of state parameters. The method further includes transmitting the first subset of state parameters to the compute engine, and transmitting the auxiliary operation to the compute engine. One advantage of the disclosed technique is that surface area and power consumption are reduced within the processor by utilizing copy engines that have no context switching capability.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Lincoln G. GARLICK, Philip Browning JOHNSON, Rafal ZBOINSKI, Jeff TUCKEY, Samuel H. DUNCAN, Peter C. MILLS
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Publication number: 20140092102Abstract: A system and method for solving a non-linear system of equations regarding particles representing a cloth and a graphics processing subsystem incorporating the system or the method. In one embodiment, the system includes: (1) a linearization circuit configured to employ data representing a property of the particles to construct a linear system of constraints with respect to the property and (2) a solver circuit coupled to the linearization circuit and configured to compute for the particles correction components applicable to satisfy the linear system and thereby solve the non-linear system.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventor: Christian Sigg
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Publication number: 20140092555Abstract: Various embodiments in accordance with the present invention provide a housing, a support, and a heat-dissipating assembly for an electronic device. A heat-dissipating opening is disposed on a rear cover of the housing. The heat-dissipating opening is disposed in correspondence with a heat-generating means of the electronic device. A covering means is also disposed on the rear cover of the housing, and the covering means is configured to enable the heat-dissipating opening to be opened and closed. The housing for the electronic device enables the covering means to be operated according to the heat condition of the electronic device, and prevents significant heat accumulation in the electronic device.Type: ApplicationFiled: September 24, 2013Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Jun HUA, Qiang CHEN, DongMei NIU
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Publication number: 20140092150Abstract: A system, method, and computer program product are provided for modifying a pixel value as a function of a display duration estimate. In use, a value of a pixel of an image frame to be displayed on a display screen of a display device is identified, wherein the display device is capable of handling updates at unpredictable times. Additionally, the value of the pixel is modified as a function of an estimated duration of time until a next update including the pixel is to be displayed on the display screen. Further, the modified value of the pixel is transmitted to the display screen for display thereof.Type: ApplicationFiled: March 14, 2013Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Gerrit A. Slavenburg, Tom Verbeure, Robert Jan Schutten
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Publication number: 20140092209Abstract: A system and method are provided for improving video encoding using content information. A three-dimensional (3D) modeling system produces an encoded video stream. The system includes a content engine, a renderer, and a video encoder. The renderer receives 3D model information from the content engine relating and to produces corresponding two-dimensional (2D) images. The video encoder receives the 2D images and produce a corresponding encoded video stream. The video encoder receives content information from the content engine, transforms the content information into encoder control information, and controls the video encoder using the encoder control information.Type: ApplicationFiled: October 1, 2012Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Hassane S. Azar, Stefan Eckart, Dawid Pajak, Bryan Dudash, Swagat Mohapatra