Abstract: A printed circuit board assembly comprises: a printed circuit board (PCB); an integrated circuit (IC) package that is mounted on the PCB and includes a first surface and a bare IC die disposed on the first surface; and a vapor chamber coupled to the first surface of the IC package.

Abstract: Apparatuses, systems, and techniques for buffer identification of an application for post-processing. The apparatuses, systems, and techniques includes generating a buffer statistic data structure for a buffer of a plurality of buffers associated with a frame of an application; updating the buffer statistic data structure with metadata of the draw call responsive to detecting a draw call to the buffer; and determining, based on the buffer statistic data structure, a score reflecting a likelihood of the buffer being associated with a specified buffer type.

Abstract: Apparatuses, systems, and techniques to parse textual data using parallel computing devices. In at least one embodiment, text is parsed by a plurality of parallel processing units using a finite state machine and logical stack to convert the text to a tree data structure. Data is extracted from the tree by the plurality of parallel processors and stored.

Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.

Abstract: Disclosed are apparatuses, systems, and techniques that enable compressed grid-based graph representations for efficient implementations of graph-mapped computing applications. The techniques include but are not limited to selecting a reference grid having a plurality of blocks, assigning nodes of the graph to blocks of the grid, and generating a graph representation that maps directions, relative to the reference grid, of nodal connections of the graph.

Abstract: In various examples, the decoding and upscaling capabilities of a client device are analyzed to determine encoding parameters and operations used by a content streaming server to generate encoded video streams. The quality of the upscaled content of the client device may be monitored by the streaming servers such that the encoding parameters may be updated based on the monitored quality. In this way, the encoding operations of one or more streaming servers may be more effectively matched to the decoding and upscaling abilities of one or more client devise such that an increased number of client devices may be served by the streaming servers.

Abstract: A controller device includes a memory storing instructions. An interface bus is coupled to sensors and configured to operate with a multi-target interface protocol. A processor is coupled to the memory and the interface bus. The processor broadcasts initialization data, according to the multi-target interface protocol, to the sensors. The processor generates, from the initialization data, using at least one cryptographic function, an authentication tag for each sensor. Each authentication tag is specific to a corresponding sensor of the sensors. The processor also unicasts, according to the multi-target interface protocol, each authentication tag to the corresponding sensor of the sensors.

Abstract: Apparatuses, systems, and techniques are presented to generate images. In at least one embodiment, at least a first optical flow network (OFN) and at least a first reconstruction network (RN) can be used to generate one or more images based, at least in part, upon the OFN and the RN using a shared loss function.

Abstract: Apparatuses, systems, and techniques to generate a trusted execution environment including multiple accelerators. In at least one embodiment, a parallel processing unit (PPU), such as a graphics processing unit (GPU), operates in a secure execution mode including a protect memory region. Furthermore, in an embodiment, a cryptographic key is utilized to protect data during transmission between the accelerators.

Abstract: Apparatuses, systems, and techniques to receive, at one or more processors associated with an image signal processing (ISP) pipeline for a camera, an image generated using an image sensor of the camera, wherein the image comprises a plurality of channels associated with color information of the image; process, by the one or more processors, the plurality of channels of the image to generate a plurality of luminance and/or radiance values; generate, by the one or more processors, an updated version of the image using the plurality of luminance and/or radiance values; and output the updated version of the image.

Abstract: In various examples, systems and methods are disclosed relating to shape processing using parallel computing systems. A processor can map one or more combinations of a plurality of first polygons identified from a first structure and a plurality of second polygons identified from a second structure, to a grid comprising a plurality of cells. The processor can identify one or more occupied cells of the plurality of cells, to which the one or more combinations are mapped. The processor can output a data structure indicative of the plurality of occupied cells.

Abstract: Disclosed are apparatuses, systems, and techniques to render images depicting light interacting with media that have volume attenuation, using optimized spectral rendering that emulates rendering of the media in tristimulus color rendering schemes.

Abstract: Apparatuses, systems, and techniques are presented to generate ultrasound images. In at least one embodiment, use one or more neural networks are used to generate one or more ultrasound images of one or more objects based, at least in part, upon one or more acoustic properties of the one or more objects.

Abstract: Apparatuses, systems, and techniques for a compiled shader program caches in a cloud computing environment.

Abstract: One embodiment sets forth a technique for performing matrix operations. The technique includes traversing a tree structure to access one or more non-empty regions within a matrix. The tree structure includes a first plurality of nodes and a second plurality of nodes corresponding to non-empty regions in the matrix. The first plurality of nodes includes a first node representing a first region and one or more second nodes that are children of the first node and represent second region(s) with an equal size formed within the first region. The second plurality of nodes include a third node representing a third region and one or more fourth nodes that are children of the third node and represent fourth region(s) with substantially equal numbers of non-zero matrix values formed within the third region. The technique also includes performing matrix operation(s) based on the non-empty region(s) to generate a matrix operation result.

Abstract: A semi-public blockchain maintained on one or more nodes in a map cloud platform comprises data for maintaining a global map of a predetermined geographic area. The blockchain also comprises a plurality of data records, where each data record is associated with an update to a global map. When a message associated with a map update to the global map is received, the nodes of the blockchain determine a consensus by evaluating the map update, where the evaluating comprises performing a plurality of proofs including a proof of location, a proof of iterations, a proof of physical delivery and a proof of safety. When consensus is attained and the map update is validated, a data record associated with the map update is generated and added to the blockchain with a timestamp and a link to prior data records in the blockchain.

Abstract: A cold plate that is configurable and for a datacenter liquid cooling system is disclosed. The cold plate includes a first section, a second section, and an intermediate layer, which is changeable and has first channels to enable flow of a coolant through the intermediate layer, and has second channels or at least one adapted second channel to concentrate the coolant or the flow of the coolant to at least one area within the configurable cold plate corresponding to at least a heat generating feature of an associated computing device.

Abstract: Systems and methods for a self-adjusting vehicle mirror. The mirror automatically locates the face of the driver or another passenger, and orients the mirror to provide the driver/passenger face with a desired view from the mirror. The mirror may continue to reorient itself as the driver or passenger shifts position, to continuously provide a desired field of view even as he or she changes position over time. In certain embodiments, the mirror system of the disclosure can be a self-contained system, with the mirror, mirror actuator, camera, and computing device all contained within the mirror housing as a single integrated unit.

Abstract: Disclosed are apparatuses, systems, and techniques that may perform efficient deployment of machine learning for detection and classification of moving objects in streams of images. A set of machine learning models with different input sizes may be used for parallel processing of various regions of interest in multiple streams of images. Both the machine learning models as well as the inputs into these models may be selected dynamically based on a size of the regions of interest.

Abstract: In various examples, latency of human interface devices (HIDs) may be accounted for in determining an end-to-end latency of a system. For example, when an input is received at an HID, an amount of time for the input to reach a connected device may be computed by the HID and included in a data packet transmitted by the HID device to the connected device. The addition of the peripheral latency to the end-to-end latency determination may provide a more comprehensive latency result for the system and, where the peripheral latency of an HID is determined to have a non-negligible contribution to the end-to-end latency, a new HID component may be implemented, a configuration setting associated with the HID component may be updated, and/or other actions may be taken to reduce the contribution of the peripheral latency to the overall latency of the system.