Patents Assigned to NVidia
  • Patent number: 11934955
    Abstract: Systems and methods for more accurate and robust determination of subject characteristics from an image of the subject. One or more machine learning models receive as input an image of a subject, and output both facial landmarks and associated confidence values. Confidence values represent the degrees to which portions of the subject's face corresponding to those landmarks are occluded, i.e., the amount of uncertainty in the position of each landmark location. These landmark points and their associated confidence values, and/or associated information, may then be input to another set of one or more machine learning models which may output any facial analysis quantity or quantities, such as the subject's gaze direction, head pose, drowsiness state, cognitive load, or distraction state.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: March 19, 2024
    Assignee: NVIDIA Corporation
    Inventors: Nuri Murat Arar, Niranjan Avadhanam, Nishant Puri, Shagan Sah, Rajath Shetty, Sujay Yadawadkar, Pavlo Molchanov
  • Patent number: 11935194
    Abstract: Systems and methods are provided to perform constrained BSDF sampling in relation to various algorithms, and specifically in relation to ray tracing algorithms. In some embodiments, a method is provided to generate samples by: determining a spherical polygon on a unit hemisphere; determining, on a unit circle, a projected area corresponding to the spherical polygon on the unit hemisphere; determining a parameterization of the projected area of the spherical polygon on the unit circle; generating samples in the projected area based on the parameterization; and generating samples in the spherical polygon. The unit circle is abase of the unit hemisphere, and the projection of the projected area is along a vector perpendicular to the unit circle. The generated samples in the spherical polygon correspond to the samples in the projected area. The method may further include evaluating a rendering equation based on the generated samples in the spherical polygon.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: March 19, 2024
    Assignee: NVIDIA Corporation
    Inventor: Maksim Aizenshtein
  • Patent number: 11934829
    Abstract: In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: March 19, 2024
    Assignee: NVIDIA Corporation
    Inventors: Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ravi P Singh, Ching-Yu Hung
  • Patent number: 11934520
    Abstract: The disclosure provides systems and processes for applying neural networks to detect intrusions and other anomalies in communications exchanged over a data bus between two or more devices in a network. The intrusions may be detected in data being communicated to an embedded system deployed in vehicular or robotic platforms. The disclosed system and process are well suited for incorporation into autonomous control or advanced driver assistance system (ADAS) vehicles including, without limitation, automobiles, motorcycles, boats, planes, and manned and un-manned robotic devices. Data communicated to an embedded system can be detected over any of a variety of data buses. In particular, embodiments disclosed herein are well suited for use in any data communication interface exhibiting the characteristics of a lack of authentication or following a broadcast routing scheme—including, without limitation, a control area network (CAN) bus.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 19, 2024
    Assignee: NVIDIA Corporation
    Inventors: Gorkem Batmaz, Nicola DiMiscio, Mark Overby, Ildiko Pete
  • Patent number: 11936507
    Abstract: A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORP.
    Inventors: Sanquan Song, John Poulton
  • Patent number: 11936379
    Abstract: Embodiments include a memory device with an improved calibration circuit. Memory device input/output pins include delay lines for adjusting the delay in each memory input/output signal path. The delay adjustment circuitry includes digital delay lines for adjusting this delay. Further, each digital delay line is calibrated via a digital delay line locked loop which enables adjustment of the delay through the digital delay line in fractions of a unit interval across variations due to differences in manufacturing process, operating voltage, and operating temperature. The disclosed techniques calibrate the digital delay lines by measuring both the high phase and the low phase of the clock signal. As a result, the disclosed techniques compensate for duty cycle distortion by combining the calibration results from both phases of the clock signal. The disclosed techniques thereby result in lower calibration error relative to approaches that measure only one phase of the clock signal.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Ish Chadha, Virendra Kumar, Abhijith Kashyap, Vipul Katyal, Hao-Yi Wei
  • Patent number: 11928772
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
  • Patent number: 11927449
    Abstract: According to an aspect of an embodiment, operations may comprise receiving an approximate geographic location of a vehicle, accessing a map of a region within which the approximate geographic location of the vehicle is located, identifying a first region on the map within a first threshold distance of the approximate geographic location of the vehicle, identifying a second region on the map associated with one or more roads on the map, determining a search space on the map within which the vehicle is likely to be present, the search space representing an intersection of the first region and the second region, and determining a more accurate geographic location of the vehicle by performing a search within the search space.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: March 12, 2024
    Assignee: NVIDIA CORPORATION
    Inventors: Derik Schroeter, Di Zeng, Mark Damon Wheeler
  • Patent number: 11928764
    Abstract: Apparatuses, systems, and techniques to animate objects in computer-generated graphics. In at least one embodiment, one or more neural networks are trained to identify one or more forces to be applied to one or more objects based, at least in part, on training data corresponding to two or more aspects of motion of the one or more objects.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Tingwu Wang, Yun Rong Guo, Maria Shugrina, Sanja Fidler
  • Patent number: 11925860
    Abstract: This application discloses techniques for generating and querying projective hash maps. More specifically, projective hash maps can be used for spatial hashing of data related to N-dimensional points. Each point is projected onto a projection surface to convert the three-dimensional (3D) coordinates for the point to two-dimensional (2D) coordinates associated with the projection surface. Hash values based on the 2D coordinates are then used as an index to store data in the projective hash map. Utilizing the 2D coordinates rather than the 3D coordinates allows for more efficient searches to be performed to locate points in the 3D space. In particular, projective hash maps can be utilized by graphics applications for generating images, and the improved efficiency can, for example, enable a game streaming application on a server to render images transmitted to a user device via a network at faster frame rates.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Marco Salvi, Jacopo Pantaleoni, Aaron Eliot Lefohn, Christopher Ryan Wyman, Pascal Gautron
  • Patent number: 11928826
    Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Dong Zhang, Jianjun Chen, Manindra Parhy
  • Patent number: 11926346
    Abstract: In various examples, a yield scenario may be identified for a first vehicle. A wait element is received that encodes a first path for the first vehicle to traverse a yield area and a second path for a second vehicle to traverse the yield area. The first path is employed to determine a first trajectory in the yield area for the first vehicle based at least on a first location of the first vehicle at a time and the second path is employed to determine a second trajectory in the yield area for the second vehicle based at least on a second location of the second vehicle at the time. To operate the first vehicle in accordance with a wait state, it may be determined whether there is a conflict between the first trajectory and the second trajectory, where the wait state defines a yielding behavior for the first vehicle.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Fangkai Yang, David Nister, Yizhou Wang, Rotem Aviv, Julia Ng, Birgit Henke, Hon Leung Lee, Yunfei Shi
  • Patent number: 11928822
    Abstract: In various examples, live perception from sensors of a vehicle may be leveraged to detect and classify intersection contention areas in an environment of a vehicle in real-time or near real-time. For example, a deep neural network (DNN) may be trained to compute outputs—such as signed distance functions—that may correspond to locations of boundaries delineating intersection contention areas. The signed distance functions may be decoded and/or post-processed to determine instance segmentation masks representing locations and classifications of intersection areas or regions. The locations of the intersections areas or regions may be generated in image-space and converted to world-space coordinates to aid an autonomous or semi-autonomous vehicle in navigating intersections according to rules of the road, traffic priority considerations, and/or the like.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Trung Pham, Berta Rodriguez Hervas, Minwoo Park, David Nister, Neda Cvijetic
  • Patent number: 11927502
    Abstract: In various examples, sensor data recorded in the real-world may be leveraged to generate transformed, additional, sensor data to test one or more functions of a vehicle—such as a function of an AEB, CMW, LDW, ALC, or ACC system. Sensor data recorded by the sensors may be augmented, transformed, or otherwise updated to represent sensor data corresponding to state information defined by a simulation test profile for testing the vehicle function(s). Once a set of test data has been generated, the test data may be processed by a system of the vehicle to determine the efficacy of the system with respect to any number of test criteria. As a result, a test set including additional or alternative instances of sensor data may be generated from real-world recorded sensor data to test a vehicle in a variety of test scenarios—including those that may be too dangerous to test in the real-world.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: March 12, 2024
    Assignee: NVIDIA Corporation
    Inventors: Jesse Hong, Urs Muller, Bernhard Firner, Zongyi Yang, Joyjit Daw, David Nister, Roberto Giuseppe Luca Valenti, Rotem Aviv
  • Patent number: 11923853
    Abstract: A ring oscillator circuit with a frequency that is sensitive to the timing of a clock-to-Q (clk2Q) propagation delay of one or more flip-flops utilized in the ring oscillator. The clock2Q is the delay between the clock signal arriving at the clock pin on the flop and the Q output reflecting the state of the input data signal to the flop. Clk2q delay measurements are made based on measurement of the ring oscillator frequency, leading to more accurate estimates of clk2Q for different types of flip-flops and flip-flop combinations, which may in turn enable improvements in circuit layouts, performance, and area.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: March 5, 2024
    Assignee: NVIDIA CORP.
    Inventors: Tezaswi Raja, Prashant Singh
  • Patent number: 11921502
    Abstract: In various examples, systems and methods are disclosed that preserve rich spatial information from an input resolution of a machine learning model to regress on lines in an input image. The machine learning model may be trained to predict, in deployment, distances for each pixel of the input image at an input resolution to a line pixel determined to correspond to a line in the input image. The machine learning model may further be trained to predict angles and label classes of the line. An embedding algorithm may be used to train the machine learning model to predict clusters of line pixels that each correspond to a respective line in the input image. In deployment, the predictions of the machine learning model may be used as an aid for understanding the surrounding environment—e.g., for updating a world model—in a variety of autonomous machine applications.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: March 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Minwoo Park, Xiaolin Lin, Hae-Jong Seo, David Nister, Neda Cvijetic
  • Patent number: 11921997
    Abstract: User interfaces and methods are disclosed. In some embodiments, a plurality of source artifacts is displayed. A selector is operable to indicate a selected set of the source artifacts. An output artifact is displayed having an output attribute that represents a combination of source attributes from the source artifacts in the selected set. An amount of contribution to the first output attribute by respective ones of the source artifacts in the first selected set is based on a coordinate of the selector relative to coordinates of the source attributes in the first selected set.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Janne Hellsten, Tero Tapani Karras, Samuli Matias Laine
  • Patent number: 11922571
    Abstract: In various examples, to support training a deep neural network (DNN) to predict a dense representation of a 3D surface structure of interest, a training dataset is generated using a parametric mathematical modeling. A variety of synthetic 3D road surfaces may be generated by modeling a 3D road surface using varied parameters to simulate changes in road direction and lateral surface slope. In an example embodiment, a synthetic 3D road surface may be created by modeling a longitudinal 3D curve and expanding the longitudinal 3D curve to a 3D surface, and the resulting synthetic 3D surface may be sampled to form a synthetic ground truth projection image (e.g., a 2D height map). To generate corresponding input training data, a known pattern that represents which pixels may remain unobserved during 3D structure estimation may be generated and applied to a ground truth projection image to simulate a corresponding sparse projection image.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: March 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Kang Wang, Yue Wu, Minwoo Park, Gang Pan
  • Patent number: 11922533
    Abstract: A weighted average execution time associated with each execution stage of a plurality of execution stages used to process a plurality of frames in parallel is obtained. The processing of each of the plurality of frames is performed at each of the plurality of execution stages in a sequential order, starting with an initial execution stage and continuing with each subsequent execution stage. A first largest weighted average execution time associated with one of the plurality of execution stages is determined. A delay to the initial execution stage prior to processing a first next frame is applied. The delay is determined based on the first largest weighted average execution time.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: March 5, 2024
    Assignee: Nvidia Corporation
    Inventors: Sau Yan Keith Li, Seth Schneider, Cody Robson, Lars Nordskog, Charles Hansen, Rouslan Dimitrov
  • Patent number: 11922558
    Abstract: In various examples, information may be received for a 3D model, such as 3D geometry information, lighting information, and material information. A machine learning model may be trained to disentangle the 3D geometry information, the lighting information, and/or material information from input data to provide the information, which may be used to project geometry of the 3D model onto an image plane to generate a mapping between pixels and portions of the 3D model. Rasterization may then use the mapping to determine which pixels are covered and in what manner, by the geometry. The mapping may also be used to compute radiance for points corresponding to the one or more 3D models using light transport simulation. Disclosed approaches may be used in various applications, such as image editing, 3D model editing, synthetic data generation, and/or data set augmentation.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: March 5, 2024
    Assignee: NVIDIA Corporation
    Inventors: Wenzheng Chen, Joey Litalien, Jun Gao, Zian Wang, Clement Tse Tsian Christophe Louis Fuji Tsang, Sameh Khamis, Or Litany, Sanja Fidler