Abstract: There is described a method of determining an initial transmission phase offset in an NFC device configured to operate in NFC card mode only, wherein the NFC device comprises an NFC chip and a matching circuit. The method comprises: determining an initial RF matching resonance frequency of the NFC device utilizing an internal oscillator of the NFC chip; reading correction data from a non-volatile memory of the NFC chip, the correction data being indicative of a frequency offset of the internal oscillator relative to a nominal oscillator frequency; determining a corrected RF matching resonance frequency of the NFC device based on the initial RF matching resonance frequency and the correction data; and determining the initial transmission phase offset based on the corrected RF matching resonance frequency. Furthermore, a device and a method of manufacturing an NFC device are described.

Abstract: In one embodiment, a near field communication (NFC) device is provided, comprising: a communication unit configured to be communicatively coupled to an NFC reader; a processing unit configured to use a plurality of emulated cards for executing one or more applications; a profile determination unit configured to determine a polling profile of said NFC reader, wherein the polling profile represents a sequence of predefined radio frequency (RF) transmission events, and wherein the profile determination unit is configured to determine said polling profile by comparing a detected sequence of RF transmission events with one or more predetermined sequences; a card selection unit configured to select a specific one of said emulated cards for use by the processing unit in dependence on the polling profile determined by the profile determination unit. In another embodiment, a corresponding method of operating an NFC device is conceived.

Abstract: A wireless receiver wireless receiver unit (200) having a plurality of antennas comprises a spatial phase corrector circuit (234) connected to a first and second receiver (220, 222) and comprises: a computation circuit (330) configured to generate a spatial-covariance matrix, SCM, of a received first and second AM signal; a signal decomposition circuit (334) configured to generate an Eigen-value decomposition, EVD, (336) of the SCM; and a processor (340) configured to analyse the EVD of the SCM of the received first and second AM signal and select and output a principal Eigen-vector that is representative of at least a first weight (350) and a second weight (352). A combiner (240) is configured to apply the first weight (350) to the first AM signal received and apply the second weight (352) to the second AM signal received and coherently combine and output (250) the received weight-applied first and second AM signal.

Abstract: A Radio Frequency, “RF”, component and a method of making the same. The component includes a first electrically conductive signal member for conveying an RF signal and a second electrically conductive signal member for conveying an RF signal. The component also includes a barrier located between the first signal member and the second signal member electromagnetically to shield the first and second signal members from each other. The barrier includes a first row of electrically conductive shielding members spaced apart along a longitudinal axis of the first row, and a second row of electrically conductive shielding members spaced apart along a longitudinal axis of the second row. Each shielding member includes a polyhedron. The shielding members of the first row are offset with respect to the shielding members of the second row to prevent a direct line of sight between the first signal member and the second signal member.

Abstract: An apparatus comprising a first and second terminal configured to couple the apparatus to a first and second bus wire of a communication bus; a transceiver arrangement for communicating with one or more network nodes via the communication bus, the transceiver arrangement configured to provide and receive differential signalling according to a communication scheme to/from the communication bus, wherein the communication scheme defines at least a voltage to be used to provide said differential signalling; the apparatus configured to: based on a fault detection signal indicative of the occurrence of a fault in at least the communication bus, transmit a reconfiguration signal for the network nodes and wherein at least part of the reconfiguration signal has a high-voltage-level comprising a voltage higher than that defined in the communication scheme for said differential signalling; and wherein said reconfiguration signal is configured to cause the network nodes to switch single-ended signalling.

Abstract: In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: a receiver circuit configured to receive a signal; a controller configured to control said receiver circuit, wherein said controller is configured to cause said receiver circuit to operate either in a complex receiver mode or in a real receiver mode; wherein the controller is configured to cause said receiver circuit to operate in the real receiver mode until the signal is successfully acquired. In accordance with a second aspect of the present disclosure, a corresponding method of operating a communication device is conceived.

Abstract: A method and electronic device are provided for decrypting homomorphically encrypted (HE) data. The method may include generating, in the electronic device, result metadata that specifies a size of the HE data to be decrypted. The electronic device generates or collects HE input data and the result metadata. The HE input data and the encrypted result metadata are transmitted to a cloud server in a cloud environment to allow the cloud server to perform computations using the HE input data. The cloud server is enabled by the hardware device to send a result of the computations on the HE input data to a secure element (SE) for decryption. A relatively secure online connection is established to the SE in the cloud environment. The SE is enabled by the electronic device to decrypt the result of the computations on the HE input data as specified by the result metadata.

Abstract: A bootstrap switch circuit includes a transistor-based switch controlled by a first gate signal and a leakage protection transistor controlled by a second gate signal configured to reduce gate induced drain leakage in the transistor-based switch A first gate driver is included that produces a first gate signal at its output so that the first gate signal turns on the transistor-based switch during a sampling mode and turns off the transistor-based switch during a hold mode. A second gate driver is included that produces a second gate signal at its output and to receive the output signal of the bootstrap switch circuit so that the second gate signal turns on the leakage protection transistor during the sampling mode and turns off the leakage protection transistor during the hold mode and the second gate signal is based upon the output signal of the bootstrap switch circuit.

Abstract: A method for encoding data to be stored in a memory, including: encoding the data to be stored in memory with an error correcting code (ECC) as first encoded data, wherein the ECC is configured to have a minimum Hamming distance of at least 4t+1 in order to correct up to t bit errors and detect up to 3t bit errors where t?1; determining a Hamming weight of the first encoded data; encoding the determined Hamming weight, wherein for all higher Hamming weights the encoding should have at least 2t+1 bit-positions that change from 1 to 0 per Hamming weight; concatenating the first encoded data and the encoded Hamming weight as concatenated data; and storing the concatenated data in the memory.

Abstract: In an embodiment, there is provided a battery management method for a vehicle comprising a plurality of batteries. According to another embodiment there is a control unit for performing the battery management method. The battery management method comprising detecting an incoming hazard; predicting an impact of the incoming hazard from one or more sensors coupled to the vehicle; determining a course of action to be taken in response to the predicted impact; and controlling one or more batteries of the plurality of batteries according to the determined course of action.

Abstract: A semiconductor device, such as a heterojunction bipolar transistor (HBT), may include an extrinsic base region that is connected to a collector region via semiconductor material formed in an opening in one or more dielectric layers interposed between the extrinsic base region and the collector region. The extrinsic base region may be formed from monocrystalline semiconductor material, such as silicon or silicon germanium, via selective epitaxial growth. An intrinsic base region may be formed adjacent to the extrinsic base region and may be interposed directly between the collector region and an intrinsic emitter region. A HBT with such an arrangement may have reduced base-collector capacitance and reduced base resistance compared to some conventional HBTs.

Abstract: A radio frequency, RF, auto-transformer circuit (300, 700, 901) and method (1000) of constructing a RF auto-transformer are described. The RF, auto-transformer circuit (300, 700, 901) includes: an inner coil formed (1102) with a first metal layer (MT1) to create a first shunt inductor (302), wherein at least a portion of the inner coil is overlayed (1106) with a second metal layer (MT2) that creates a first series inductor (303) that exhibits inductive coupling to the first shunt inductor (302). An outer coil is formed (1104) with the first metal layer (MT1) that creates a second series inductor (304), where the outer coil is located adjacent the inner coil and provides inductive coupling between the second series inductor (304) and each of the first shunt inductor (302) and first series inductor (303).

Abstract: A fault recovery system includes various fault management circuits that form a hierarchical structure. One fault management circuit detects a fault in a functional circuit and executes a recovery operation to recover the functional circuit from the fault. When the fault management circuit fails to recover the functional circuit from the fault within a predetermined time duration, a fault management circuit that is in a higher hierarchical level executes another recovery operation to recover the functional circuit from the fault. Such a fault management circuit is required to execute the corresponding recovery operation within another predetermined time duration to successfully recover the functional circuit from the fault. The fault recovery system thus implements the hierarchical structure of fault management circuits to recover the functional circuit from the fault.

Abstract: Systems and methods for preserving a decoupling capacitor's charge during low power operation of a logic circuit. An electronic circuit may include: a main voltage regulator coupled to a supply voltage terminal and configured to apply a first regulated voltage across a capacitor coupled in parallel with a logic circuit; a low power regulator coupled to the supply voltage terminal and configured to apply a second regulated voltage across the logic circuit; and a control circuit coupled to the low power regulator. The control circuit may be configured to: during a first mode of operation, allow the main voltage regulator to apply the first regulated voltage to the logic circuit, and, during a second mode of operation, allow the low power regulator to apply the second regulated voltage to the logic circuit and decouple the capacitor from the logic circuit while the low power regulator applies the second regulator voltage.

Abstract: Embodiments of sigma-delta analog-to-digital converter (ADC) circuits and a microphone circuit are disclosed. In an embodiment, a sigma-delta ADC circuit includes a pair of operational transconductance amplifiers (OTAs), a filter connected to the pair of OTAs, a quantizer connected to the filter, a differential digital-to-analog converter (DAC) connected to the quantizer, and a bias compensation circuit configured to measure a biasing condition of a first OTA of the pair of OTAs and to apply the biasing condition of the first OTA to a second OTA of the pair of OTAs to reduce Total Harmonic Distortion Plus Noise (THD+N) in the sigma-delta ADC circuit. An output of a microphone and a differential output of the differential DAC are inputted into input terminals of the pair of OTAs.

Abstract: A method is provided for protecting a machine learning (ML) model from a side channel attack (SCA). The method is executed by a processor in a data processing system. The method includes generating a first random bit. A first weighted sum is computed for a first connection between a node of a first layer and a node of a second layer of the ML model. The first weighted sum for the first connection is equal to a multiplication of the weight of the first connection multiplied by an input to the selected node. In the multiplication, one of the weight or the input is negated conditioned on a value of the random bit. A first output including the computed first weighted sum is provided to one or more nodes of a second layer of the plurality of layers.

Abstract: An attenuation device for a CAN transceiver comprises two device output nodes configured to electrically couple the attenuation device via the device output nodes between two transceiver terminals of the CAN transceiver. The attenuation device is configured to change from a first device state to a second device state when a common mode voltage is applied to the device output nodes that is either greater than a first reference voltage or less than a second reference voltage that is less than the first reference voltage. The attenuation device causes a first electrical output resistance at each device output node during the first device state and causes a second electrical output resistance at each device output node during the second device state in which the second output resistance is less than the first output resistance.

Abstract: The disclosure relates to a transceiver device for communicating between a network protocol controller and a network bus, the transceiver device comprising: transceiver circuitry configured to transmit and receive data on the network bus using a first physical layer protocol; and monitoring circuitry configured to determine a measured property of the network bus, in which the transceiver device is configured to: determine whether the measured property indicates an error condition; and reconfigure the transceiver circuitry to transmit and receive data on the network bus using a second physical layer protocol in response to determining the error condition.

Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.

Abstract: An aspect of the invention is directed towards a data processing system and method including a transaction scheduler configured to process transactions, a tag control circuit coupled to the transaction scheduler configured to detect a fault by comparing output signals, and a controller coupled to the tag control circuit. The controller is configured to receive a transaction request identifying a transaction, generate a unique tag value for the transaction request, load the unique tag value into the transaction scheduler, determine a current unique tag value associated with the transaction being executed, and generate a fault. The system is further configured to generate fault when: (i) the current unique tag value is not found, or (ii) the transactions timeout after a predetermined number of cycles.