Abstract: There is disclosed herein an SOI IC comprising an integrated capacitor comprising a parallel arrangement of a metal-insulator-metal, MIM, capacitor, a second capacitor, a third capacitor, and a fourth capacitor: wherein the second capacitor comprises as plates the substrate and a one of a plurality of semiconductor layers having an n-type doping, and comprises the buried oxide layer as dielectric; the third capacitor comprises as plates the polysilicon layer and a further one of a plurality of semiconductor layers having an n-type doping, and comprises an insulating layer between the plurality of semiconductor layers and the metallisation stack as dielectric; and the fourth capacitor comprises as plates the polysilicon plug and at least one of the plurality of semiconductor layers and comprises the oxide-lining as dielectric, wherein the oxide lining and the polysilicon plug form part of a lateral isolation (DTI) structure.

Abstract: A method for multi-antenna processing in multi-link wireless communication systems includes transmitting by a first MLD, a first capability defining a first number of Spatial Streams (SS) supported by the first MLD for a single link exchange over one of a subset of links from a plurality of links between the first MLD and a second MLD. A second capability is transmitted by the first MLD defining a second number of SS supported by the first MLD for each link of a multi-link exchange. At least one Radio Frequency (RF) chain of the first MLD is configured to enable communication over the subset of links from the plurality of links.

Abstract: A mechanism is provided to maximize utilization of internal memory for packet queuing in network devices, while providing an effective use of both internal and external memory to achieve high performance, high buffering scalability, and minimizing power utilization. Embodiments initially store packet data received by the network device in queues supported by an internal memory. If internal memory utilization crosses a predetermined threshold, a background task performs memory reclamation by determining those queued packets that should be targeted for transfer to an external memory. Those selected queued packets are transferred to external memory and the internal memory is freed. Once the internal memory consumption drops below a threshold, the reclamation task stops.

Abstract: Exemplary aspects for a specific example concern a radar system having sensor circuitry including multiple radar sensors to provide sensor data via multiple virtual channels and multiple data types, a memory circuit with memory buffers, and a bus-interface circuit to control bus interconnects for bus communications involving a radar signal transmitter and the memory circuit. Radar signals are received and processed, via data acquisition path circuitry in multiple circuit paths and via streams of data in response to and to accommodate the operations of the sensor circuitry. A master controller conveys data, via the bus-interface circuit, to the buffers for the sensor data, and generates selectable-type transactions to be linked in selected ones of the buffers, in response to the data provided from the sensor circuitry and based on the sensor data being provided via different ones of the multiple virtual channels and of the multiple data types.

Abstract: Embodiments of a method and an apparatus for multi-link data transmission are disclosed. In an embodiment, a method for communications involves at a first device, transmitting, to a second device, a trigger frame that solicits at least one Physical layer Protocol Data Unit (PPDU) for uplink transmission, wherein the trigger frame includes a standard-compatible common info field that includes a trigger type field and a standard-compatible user info list field that includes at least one user info field, wherein the trigger frame includes a solicited Trigger-Based (TB) type indicator in a field in the trigger frame other than the trigger type field, and receiving, at the first device, at least one PPDU from the second device in response to the solicited TB type indicator that was transmitted in the trigger frame by the first device.

Abstract: A defrosting system includes an RF signal source, an electrode proximate to a cavity within which a load to be defrosted is positioned, and a transmission path between the RF signal source and the electrode. The system also includes power detection circuitry coupled to the transmission path and configured repeatedly to take forward and reflected RF power measurements along the transmission path. A system controller repeatedly determines, based on the forward and reflected RF power measurements, a calculated rate of change, and repeatedly compares the calculated rate of change to a threshold rate of change. When the calculated rate of change compares favorably with the threshold rate of change, the RF signal source continues to provide the RF signal to the electrode until a determination is made that the defrosting operation is completed, at which time the RF signal source ceases to provide the RF signal to the electrode.

Abstract: Various embodiments relate to a protection circuit, comprising: a pad configured to input an external voltage from a connector; a first circuit branch connected to the pad and configured to receive a fast ramp-up over voltage at the pad; a second circuit branch connected to the pad and configured to receive a ramp-up over voltage at the pad; a third circuit branch connected to the pad and configured to output an over voltage detection signal when an over voltage is received at the pad, wherein the third circuit branch includes a voltage divider with a variable resistor with a variable voltage node and an enable switch; and a logic circuit including an enabling transistor configured to control the variable resistor and the enable switch.

Abstract: Various embodiments relate to a current loop controller configured to control a boost converter, including: an amplifier configured to scale a measured current; a subtractor configured to subtract the scaled measured current from a desired current and to output an error signal; a controller including an integral part and a proportional part configured to produce a control signal based upon the difference signal and a gain value, wherein the gain value is based upon a measured value tps, wherein tps is the on-time plus the secondary time of the boost converter; and a switch signal generator configured to produce a gate signal based upon the control signal, wherein the gate signal controls the boost converter.

Abstract: A mechanism is provided to remove heat from an integrated circuit (IC) device die by directing heat through a waveguide to a heat sink. The waveguide is mounted on top of a package containing the IC device die. The waveguide is thermally coupled to the IC device die. The waveguide transports the heat to a heat sink coupled to the waveguide and located adjacent to the package on top of a printed circuit board on which the package is mounted. Embodiments provide both thermal dissipation of the generated heat while at the same time maintaining good radio frequency performance of the waveguide.

Abstract: One example discloses a multi-radio device, including: a controller configured to be coupled to a radio; wherein the controller is configured to receive a request to communicate a signal with an initial communication priority from the radio; wherein the controller includes a priority offset module configured to, adjust the initial communication priority by a first offset; and wherein the controller includes a priority escalator module configured to, adjust the initial communication priority by a second offset.

Abstract: A semiconductor device includes a substrate having opposed first and second major surface, an active area, and a termination area. Insulated trenches extend from the first major surface toward the second major surface, each of the insulated trenches including a conductive field plate and a gate electrode overlying the conductive field plate, the gate electrode being separated from the field plate by a gate-field plate insulator. The field plate extends longitudinally in both of the active and termination areas and the gate electrode is absent in the termination area. A body region of a first conductivity type extends laterally between pairs of the insulated trenches. First and second spacer regions of a second conductivity type extend laterally between the pairs of the insulated trenches at the termination area to produce segments of the first conductivity type between the first and second spacer regions that are isolated from the body region.

Abstract: Various embodiments relate to a current loop controller configured to control a boost converter, including: an amplifier configured to scale a measured current; a subtractor configured to subtract the scaled measured current from a desired current and to output an error signal; a controller including an integral part and a proportional part configured to produce a control signal based upon the error signal; a measuring circuit configured to measure the actual switching period of the boost converter; and a switch signal generator configured to produce a switching signal based upon the control signal and the measured actual switching period, wherein the switch signal controls the boost converter.

Abstract: Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

Abstract: A device includes a semiconductor die including a transistor. The transistor includes a plurality of parallel transistor elements. Each transistor element includes a drain region, a source region, and a gate region. The semiconductor die includes a first temperature sensor between a first transistor element in the plurality of transistor elements and a second transistor element in the plurality of transistor elements. The first temperature sensor is configured to generate a first output signal having a magnitude that is proportional to a temperature of the first temperature sensor.

Abstract: Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

Abstract: A method for estimating a time-of-arrival of a packet received by a receiver includes storing a reference bit-pattern and receiving a plurality of samples in a samples-buffer. In a bit-pattern detector, a matching group of samples having a bit-pattern which matches the reference bit-pattern is identified. In a correlator, a group of three correlation values is determined from the matching group of samples, including a local maximum correlation value, P0, an immediately preceding correlation value, Pm, and an immediately succeeding correlation value Pp. In an estimation unit, a polynomial function f(?) of the difference, ?, between Pm and Pp is used to estimate a timing offset Tfrac, between the local maximum correlation value and a correlation peak. The time-of-arrival is estimated from a time of the local maximum correlation value P0, and Tfrac.

Abstract: A device includes an antenna configured to be disposed within a cavity of an appliance. The appliance includes an electrode and the antenna includes a sheet of conductive material having a surface area that is equal to or greater than a surface area of the electrode. The device includes a voltage sensor coupled to the antenna, an output device, and a controller coupled to the voltage sensor and the output device. The controller is configured to generate an output at the output device. The output is determined by a voltage of the antenna.

Abstract: Apparatus and methods of providing digital varying output, such as sinusoidal, pulse width modulation, SPWM, control for an inverter comprising at least a first switch and a second switch are disclosed. The method comprising: generating a first binary control signal at a system modulation frequency; generating a second binary control signal at an M-times higher carrier frequency; wherein generating the second binary control signal comprises: providing a periodic counter having a K-times higher reset frequency; calculating M switch-off moments; determining for each, a corresponding switch-off counter value and a corresponding counter sequence value; storing each switch-off counter value in a respective memory location corresponding to the respective counter sequence and dummy values in the remaining memory locations; and sequentially and periodically transferring the contents of the memory locations to at least one PWM value register.

Abstract: A bandgap reference correction circuit comprising a bandgap reference circuit comprising a first resistor; a first oscillator comprising a second resistor, wherein a frequency of a first oscillator output signal of the first oscillator depends on a resistance of the second resistor; and a compensation module configured to: receive the first oscillator output signal from the first oscillator and a reference frequency signal from a reference oscillator; determine the frequency of the first oscillator output signal using the reference frequency signal; and set a resistance of the first resistor based on the frequency of the first oscillator output signal.

Abstract: A substrate is described with a thermal dissipation structure sintered to thermal vias. In one example, a microelectronic module includes a recess between first and second substrate surfaces. One or more thermal vias extend between the first substrate surface and the interior recess surface, wherein each of the thermal vias has an interior end exposed at the interior recess surface. A sintered metal layer is in the recess and in physical contact with the interior end of the thermal vias and a thermal dissipation structure is in the recess over the sintered metal layer. The thermal dissipation structure is attached to the substrate within the recess by the sintered metal layer, and the thermal dissipation structure is thermally coupled to the thermal vias through the sintered metal layer.