Patents Assigned to NXP USA, INC.
  • Patent number: 11749639
    Abstract: Die-substrate assemblies having sinter-bonded backside via structures, and methods for fabricating such die-substrate assemblies, are disclosed. In embodiments, the method includes obtaining an integrated circuit (IC) die having a backside over which a backmetal layer is formed and into which a plated backside via extends. The IC die is attached to an electrically-conductive substrate by: (i) applying sinter precursor material over the backmetal layer and into the plated backside via; (ii) positioning a frontside of the electrically-conductive substrate adjacent the plated backmetal layer and in contact with the sinter precursor material; and (iii) sintering the sinter precursor material to yield a sintered bond layer attaching and electrically coupling the IC die to the frontside of the electrically-conductive substrate through the backmetal layer and through the plated backside via. The sintered bond layer contacts and is metallurgically bonded to the backside via lining.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: September 5, 2023
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
  • Patent number: 11750329
    Abstract: Embodiments of an apparatus and method are disclosed. In an embodiment, a method of executing block acknowledgement operations in a multi-link communications system comprises transmitting a request for block acknowledgement response from a first multi-link device to a second multi-link device, wherein the request is either in quality of service (QoS) data frames of aggregated-media access control (MAC) protocol data unit (A-MPDU) or a block acknowledgement request, and receiving a block acknowledgment from the second multi-link device by the first multi-link device.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: September 5, 2023
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang, Hui-Ling Lou
  • Patent number: 11747372
    Abstract: One example discloses a differential-signal-detection circuit, comprising: an input stage configured to receive a differential input signal and to output a first differential output signal and a second differential output signal; a first comparator coupled to receive the first differential output signal and generate a first comparator output signal; a second comparator coupled to receive the second differential output signal and generate a second comparator output signal; and an output stage configured to receive the first and second comparator output signals and generate a differential-signal-detection signal.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: September 5, 2023
    Assignee: NXP USA, Inc.
    Inventors: Xiaoqun Liu, Siamak Delshadpour
  • Patent number: 11751191
    Abstract: Various embodiments relate to a method performed by a station to identify the maximum allowed transmit power spectral density (PSD) of a basic service set (BSS), including: receiving, by the station, a first field from an access point (AP) of the BSS, wherein the first field indicates that the BSS bandwidth is set to M times a unit channel bandwidth; receiving, by the station, a set of second fields from the AP, wherein the set of second fields includes K fields corresponding to K channels and wherein each of the K second fields indicates the maximum allowed transmit PSD for the K channels and the bandwidth of the channel is the unit channel bandwidth; and identifying, by the station, the maximum allowed transmit PSD of the M channels of the BSS bandwidth from the first M consecutive second fields.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: September 5, 2023
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Yi-Ling Chao, Hongyuan Zhang, Huiling Lou, Young Hoon Kwon, Rui Cao
  • Publication number: 20230273895
    Abstract: Digitally controllable elements capable of influencing operation of a power amplifier module are coupled in parallel to a serial data interface. Each digitally controllable element includes address control logic that decodes an address presented on the serial data interface as well as a device specific ID. In response to the decoding, physical registers in different digitally controllable elements are written in an interleaved order according to an interleaved register address map. Banks of registers within the digitally controllable elements may be select to influence or modify operation of the power amplifier module.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Applicant: NXP USA, Inc.
    Inventor: Nicholas Justin Mountford Spence
  • Publication number: 20230273894
    Abstract: Digitally controllable elements capable of influencing operation of a power amplifier module are coupled to an interface gateway device using a first serial data interface that communicates using a first serial protocol. The interface gateway device receives serial data on multiple external serial data interfaces that utilize various serial protocols, and converts the various serial protocols to the first serial protocol. Each digitally controllable element includes address control logic that decodes an address presented on the first serial data interface as well as a device specific ID. In response to the decoding, physical registers in different digitally controllable elements are written.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Applicant: NXP USA, Inc.
    Inventor: Nicholas Justin Mountford Spence
  • Patent number: 11742809
    Abstract: Embodiments of a device and method are disclosed. In an embodiment, a current sensing circuit includes first and second integrated resistors on a semiconductor die, a controllable current source configured to provide a reference current, and a current determination circuit. A resistance value of the second integrated resistor is a factor n larger than a resistance value of the first integrated resistor. A current drawn by a target circuit is configured to flow through the first integrated resistor, and the reference current is configured to flow through the second integrated resistor. The current determination circuit is configured to determine a value of the current drawn by the target circuit based on the value of the reference current when a first voltage at a terminal of the first integrated resistor is approximately equal to a second voltage at a terminal of the second integrated resistor.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: August 29, 2023
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Xu Jason Ma
  • Patent number: 11742790
    Abstract: The internal temperate of a transistor is determined by detecting a voltage though a terminal of an integrated circuit that is also used by an overcurrent detection circuit of the integrated circuit for detecting an overcurrent condition of the system. The overcurrent detection circuit is coupled to a current electrode of the transistor through the terminal of the integrated circuit. A determination of internal temperature is based on a voltage measurement taken from the terminal during an on phase of the transistor. The voltage measurement is converted to a digital value and is used to determine an internal temperature of the transistor.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: August 29, 2023
    Assignee: NXP USA, INC.
    Inventor: Pierre Philippe Calmes
  • Patent number: 11742897
    Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method for wireless communications involves assigning subcarriers of a first access point (AP) and a second AP to a subcarrier set of a virtual AP, generating, by the virtual AP, a packet that includes a signal for a station (STA) and that is transmitted using the subcarrier set, where generating the packet includes: encoding a preamble portion of the packet on the assigned subcarriers included in the subcarrier set, nulling the preamble portion of the packet for unassigned subcarriers of the first AP and the second AP, encoding a subsequent portion of the packet according to a Distributed Multiple-Input Multiple-Output (DMIMO) transmission, and transmitting the packet to the STA.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: August 29, 2023
    Assignee: NXP USA, Inc.
    Inventors: Hari Ram Balakrishnan, Sudhir Srinivasa
  • Patent number: 11743016
    Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method for wireless communications involves operating an Access Point (AP) using feedback subcarrier indices for a bandwidth up to 320 MHz, signaling, by the AP, to a client, a subcarrier location set on which a feedback report is solicited, signaling, by the AP, to a client, a feedback type solicited on the subcarrier location, and indicating, by the client, feedback subcarrier indices for the subcarrier location set via the feedback report solicited by the AP.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: August 29, 2023
    Assignee: NXP USA, Inc.
    Inventors: Young Hoon Kwon, Rui Cao, Liwen Chu, Hongyuan Zhang, Hari Ram Balakrishnan, Sudhir Srinivasa, Sayak Roy, Xiayu Zheng
  • Patent number: 11742012
    Abstract: A memory includes read circuitry for reading values stored in memory cells. The read circuitry includes flipped voltage followers for providing bias voltages to nodes of current paths coupled to sense amplifiers during memory read operations.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 29, 2023
    Assignee: NXP USA, INC.
    Inventors: Karthik Ramanan, Jon Scott Choy, Padmaraj Sanjeevarao
  • Patent number: 11737133
    Abstract: Various embodiments relate to a method performed by a first wireless device for providing a high priority communication service for a high priority traffic class between a first wireless device and a second wireless device, including: announcing support for the high priority communication service; receiving an association request from the second wireless device for the transmission of high priority traffic using the high priority communication service; accepting the received association request; and negotiating a restricted target wakeup time (TWT) service period (SP) for the high priority communication service between the first wireless device and the second wireless device, wherein higher priority is given for the transmission of high priority frames using the high priority traffic service.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: August 22, 2023
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang, Huiling Lou
  • Patent number: 11736939
    Abstract: Embodiments of an apparatus and method are disclosed. In an embodiment, a method of executing multi-link operations in a multi-link communications system comprises performing a single frame exchange between a first multi-link device and a second multi-link device to execute a multi-link operation for multiple links between the first and second multi-link devices using a frame transmitted on a first link among the multiple links, wherein the frame includes an element that carries other link information on at least one link of the multiple links other than the first link, wherein the frame includes per-link value information that has different values for different links of the multiple link, and wherein successful execution of the single frame exchange completes the multi-link operation for at least two links of the multiple links between the first and second multi-link devices.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: August 22, 2023
    Assignee: NXP USA, Inc.
    Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang, Hui-Ling Lou
  • Patent number: 11728285
    Abstract: A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: August 15, 2023
    Assignee: NXP USA, INC.
    Inventors: Vivek Gupta, Michael B. Vincent, Scott M. Hayes, Richard Te Gan, Zhiwei Gong
  • Patent number: 11728336
    Abstract: Embodiments are provided for a capacitive array including: a first row of alternating first fingers and second fingers formed in a first conductive layer, wherein each first and second finger has a uniform width in a first direction and a uniform length in a second direction perpendicular to the first direction, the first row of alternating first and second fingers include a same integer number of first fingers and second fingers, and the first and second fingers are interdigitated in the first direction; and a first compensation finger formed in the first conductive layer at an end of the first row of alternating first and second fingers nearest a first outer boundary of the capacitive array, the first compensation finger configured to have an opposite polarity as a neighboring finger on the end of the first row.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: August 15, 2023
    Assignee: NXP USA, Inc.
    Inventors: Robert S. Jones, III, Xiankun Jin
  • Patent number: 11726107
    Abstract: A sensor system includes a transducer for sensing a physical stimulus along at least two orthogonal axes and an excitation circuit. The transducer includes a movable mass configured to react to the physical stimulus and multiple differential electrode pairs of electrodes. Each of the electrode pairs is configured to detect displacement of the movable mass along one of the orthogonal axes. The excitation circuit is connectable to the electrodes in various electrode connection configurations, with different polarity schemes, that enable excitation and sampling of each of the orthogonal axes during every sensing period. For each sensing period, a composite output signal is produced that includes the combined information sensed along each of the orthogonal axes. The individual sense signals for each orthogonal axis may be extracted from the composite output signals.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: August 15, 2023
    Assignee: NXP USA, Inc.
    Inventors: Andrew C McNeil, Jerome Romain Enjalbert, Joel Cameron Beckwith, Jun Tang
  • Patent number: 11728853
    Abstract: A wireless communication device includes first and second links. The first and second links respectively include first and second sets of antennae having an arrangement that renders a null space of a channel matrix between the first and second links non-zero. When the first and second links operate on a first frequency band, the first link obtains first channel state information that indicates a first channel measurement of a first set of channels observed from the second link to the first link. Based on the first channel state information, the first link determines a spatial mapping matrix that facilitates null steering of a signal transmission from the first link in a direction of the second link. The first link transmits to a remote device, a wireless signal on the first frequency band based on the spatial mapping matrix.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: August 15, 2023
    Assignee: NXP USA, Inc.
    Inventors: Ankit Sethi, Sayak Roy, Sudhir Srinivasa
  • Patent number: 11723121
    Abstract: A system includes a radio frequency (RF) signal source configured to supply an RF signal. An electrode is coupled to the RF signal source and a transmission path is between the RF signal source and the electrode. The transmission path is configured to convey the RF signal from the RF signal source to the electrode to cause the electrode to radiate RF electromagnetic energy into a cavity. Power detection circuitry is coupled to the transmission path and configured to repeatedly measure RF power values including at least one of forward RF power values and reflected RF power values along the transmission path. A controller is configured to determine that a load in the cavity is a low-loss load based on a rate of change of the RF power values, and cause the RF signal source to supply the RF signal with the one or more desired signal parameters.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: August 8, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jamison Michael McCarville, Lionel Mongin, Pierre Marie Jean Piel, Hung Hoa Tran
  • Patent number: 11721642
    Abstract: A packaged semiconductor device is provided. The packaged semiconductor device includes a semiconductor die affixed to a package substrate. A conductive connector is affixed to the package substrate. A collar is formed around a perimeter of the conductive connector at a conductive connector to package substrate transition. A reinforcement structure is embedded in the collar. The reinforcement structure substantially surrounds the conductive connector at the conductive connector to package substrate transition.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: August 8, 2023
    Assignee: NXP USA, INC.
    Inventor: Kabir Mirpuri
  • Patent number: 11722354
    Abstract: In an 802.11be wireless system, a receiving station device signals a packet padding capability in a wireless area network in accordance with an Extremely High Throughput (EHT) communication protocol by constructing a MAC control management frame to include an EHT capability element indicating whether a packet extension value longer than 16 ?s is supported by the receiving station device, where one or more fields in the EHT capability element include (1) a common nominal packet padding field having a plurality of values to signal different packet extension values for use with all transmission constellations, spatial streams Nss, and resource unit (RU) allocations supported by the first STA device, including at least one packet extension value longer than 16 ?s; and/or (2) a PHY packet extension threshold (PPET) field comprising a plurality of PPET values to signal packet extension values including at least one packet extension value longer than 16 ?s.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: August 8, 2023
    Assignee: NXP USA, Inc.
    Inventors: Rui Cao, Sudhir Srinivasa, Hongyuan Zhang, Liwen Chu