Patents Assigned to NXP
  • Patent number: 10102828
    Abstract: There is provided a multimedia computing apparatus for processing and displaying video data with overlay graphic data, said multimedia computing apparatus comprising a compression unit arranged to compress graphic overlay data prior to storage of said compressed overlay graphic data in a compressed display buffer, and a control unit arranged to determine when to compress the overlay graphic data dependent upon a refresh parameter of the overlay graphic data. There is also provided a method of adaptively compressing graphics data in a multimedia computing system comprising dynamically controlling compression of graphic overlay data in a display buffer dependent upon a refresh parameter of the graphic overlay data.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: October 16, 2018
    Assignee: NXP USA, Inc.
    Inventors: Michael Priel, Ran Ferderber, Michael Zarubinsky
  • Patent number: 10104784
    Abstract: A method for making an electronic product. The method includes processing a flexible substrate (e.g., a web) with the use of a tensioner having a vacuum plate and an indexer that intermittently moves the flexible substrate for processing. While a designated location of the flexible substrate is stopped at a processing location, a process is performed on the designated location. Wherein while the designated location is stopped at the processing location, the vacuum plate of the tensioner moves in an opposite direction of the transport direction.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: October 16, 2018
    Assignee: NXP B.V.
    Inventors: Jozep Petrus Wilhelmus Stokkermans, Thomas Markus Kampschreur, Theodorus Ter Steeg, Patrick J. M. Houben
  • Patent number: 10102329
    Abstract: A method and apparatus of validating a test pattern for at-speed testing of at least one integrated circuit, IC, design. The method comprises calculating at least one weighted rise activity, WRA, value for at least one region of the IC design based at least partly on rising gate transitions within the at least one region of the IC design when the test pattern is applied thereto, calculating at least one weighted fall activity, WFA, value for the at least one region of the IC design based at least partly on fall gate transitions within the at least one region of the IC design when the test pattern is applied thereto, and validating the test pattern based at least partly on the WRA value and the WFA value.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: October 16, 2018
    Assignee: NXP USA, INC.
    Inventors: Yoav Miller, Asher Berkovitz, Sergey Sofer
  • Patent number: 10103740
    Abstract: A method of calibrating a digitally controlled oscillator (DCO). The method comprises configuring a fine tuning capacitive component of the DCO into a minimum capacitance configuration therefor, configuring a coarse tuning capacitive component of the DCO into a first configuration therefor and determining a resulting first output frequency of the DCO.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: October 16, 2018
    Assignee: NXP USA, Inc.
    Inventors: Cristian Pavao Moreira, Olivier Vincent Doare, Birama Goumballa, Didier Salle
  • Publication number: 20180293198
    Abstract: Embodiments of methods and devices for Universal Serial Bus (USB) communication are described. In an embodiment, a method for USB communication involves processing received USB data, including searching for a predefined symbol in a version of the received USB data, outputting predefined USB data during the processing of the received USB data and switching from outputting the predefined USB data to outputting recovered USB data in response to a finding of the predefined symbol in the version of the received USB data. The recovered USB data is derived from the received USB data. Other embodiments are also described.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 11, 2018
    Applicant: NXP B.V.
    Inventor: Bart Vertenten
  • Patent number: 10095634
    Abstract: Embodiments of a device and method are disclosed. In an embodiment, an IVN transceiver is disclosed. The IVN transceiver includes an IVN bus interface, a microcontroller communications interface, and a security module connected between the IVN bus interface and the microcontroller communications interface and configured to perform a security function.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventor: Vibhu Sharma
  • Patent number: 10094873
    Abstract: A wafer structure has a plurality of semiconductor die. Each semiconductor die includes circuitry, a test pad for use in testing the circuitry, and a plurality of external pins. The test pad includes first, second, third, and fourth metal lines, a via, and a metal cover that receives a probe. The first and second metal lines are in a first metal layer and run in parallel, are insulated from each other, and are adjacent. The third and fourth metal lines are in a second metal layer run in parallel, are insulated from each other, and run orthogonal to the first and second metal lines. The first via is coupled to the first metal line and the third metal line. One or more external pins are connected to the metal cover.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: October 9, 2018
    Assignee: NXP USA, Inc.
    Inventors: David R. Tipple, Alistair J. Gorman, Anis M. Jarrar
  • Patent number: 10095567
    Abstract: A micro controller unit including an error indicator hardware module, the error indicator module being arranged to respond to event signals representative of internal and external fault and error events perturbing the micro controller unit function by registering in non-volatile memory a record of the nature of each of the events, wherein the record of the events is inaccessible to alteration.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: October 9, 2018
    Assignee: NXP USA, Inc.
    Inventors: Norbert Pickel, Axel Bahr, Derek Beattie, Andrew Birnie, Carl Culshaw
  • Patent number: 10097162
    Abstract: Embodiments of an apparatus are disclosed. In an embodiment, a power receiver unit is disclosed. The power receiver unit includes a power pick-up unit, a communication modulator, and a filter. The power pick-up unit receives a wireless power signal. The communication modulator applies a modulation to the received wireless power signal. The filter suppresses a load signal from a load of the wireless charge receiver to prevent interference with the modulation.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Patrick Niessen, Rene Geraets
  • Patent number: 10095186
    Abstract: A wrist watch and method of activating a user interface of the wrist watch are described. The wrist watch comprises a display for providing a user interface for a user when wearing the wrist watch on a wrist, a first motion sensor arranged to detect motion of the wrist watch and a proximity detector arranged to detect the proximity of a hand of the user when wearing the wrist watch. A data processor is configured to activate the user interface when the first motion sensor detects that the wrist of the user has been raised and the proximity detector detects that the hand of the user has moved toward the wrist watch.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Arjen Helder, Ko-Min Chang, Sammy Geeraerts
  • Patent number: 10098159
    Abstract: A network node for a wireless network and corresponding methods for reducing false collisions in a wireless network, a wireless network, a wireless sensor network and a smart building including a wireless sensor network. The network node includes a processor, memory and an antenna. The network node is operable promiscuously to monitor and maintain a record of transmissions and acknowledgements received by the network node. The network node is also operable to send information relating to the record to another node in the network for use by the other node in determining that a further node to which the other node sends transmissions is hidden from the network node. In another aspect the network node is operable to determine from information received from a second other network node, that a first other network node is hidden from the second other network node.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventor: Petr Kourzanov
  • Patent number: 10097382
    Abstract: A receiver for a modulated signal of a communication system is disclosed. The receiver includes a demodulator to demodulate the received modulated symbols of a received signal into received soft-bits. The receiver also includes a hard-decision decoder that is configured to decode the received soft-bits into decoded bits. A feedback loop is included to provide feedback from the hard decision decoder to the demodulator. The feedback loop is configured to re-encode the decoded bits from the hard-decision decoder into re-encoded bits. The demodulator is further configured to iteratively demodulate the received modulated signal using an output of the feedback loop.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Semih Serbetli, Nur Engin, Alessio Filippi
  • Patent number: 10098146
    Abstract: A processor is disclosed. The processor includes a first-receiver-node for receiving a first-receiver-signal, a second-receiver-node for receiving a second-receiver-signal, a first-output-node for coupling to a digital-baseband-processor, a second-output-node for coupling to the digital-baseband-processor and a first-active-data-pipe extending between the first-receiver-node and the first-output-node. The first-active-data-pipe includes a first-analog-to-digital-converter comprising a first-ADC-input coupled to the first-receiver-node and a first-ADC-output coupled to the first-output-node. The first-analog-to-digital-converter is configured to provide a first-digital-signal to the first-output-node. The processor comprises a first-reference-node and a configurable-data-pipe extending between the second-receiver-node and the second-output-node.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Jan Niehof, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Lucien Johannes Breems, Johannes Hubertus Antonius Brekelmans
  • Patent number: 10097287
    Abstract: Embodiments are provided for a radar device and a method of operating a radar device, the radar device having a transmitter and a receiver, the method including: generating a chirp signal based on a local oscillator (LO) signal, wherein the LO signal is a frequency-modulated continuous-wave (FMCW) signal; secondary modulating the chirp signal to produce an output signal; transmitting the output signal on a transmitting antenna of the radar device; receiving an echo signal on a receiving antenna of the radar device; downmixing an amplified version of the echo signal with the LO signal to produce a low frequency signal; and outputting an error detection signal based on spectral components of the low frequency signal, wherein the spectral components correspond to the secondary modulating.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Patent number: 10097140
    Abstract: Embodiments of a method for amplifier calibration and an amplifier system are described. In one embodiment, a method for amplifier calibration involves amplifying an input signal using a first amplifier connected between an input terminal and an output terminal to generate an output signal and digitally performing offset calibration on a second amplifier coupled in parallel with the first amplifier between the input terminal and the output terminal while amplifying the input signal using the first amplifier. Other embodiments are also described.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Klaas Wortel, Henri Verhoeven, Theo Thurlings
  • Patent number: 10097342
    Abstract: A method for a keyed cryptographic operation by a cryptographic system mapping an input message to an output message, including: receiving input data for the keyed cryptographic operation; calculating a first mask value based upon the input data; and applying the first mask value to a first intermediate value of the keyed cryptographic operation.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Wil Michiels, Jan Hoogerbrugge, Philippe Teuwen
  • Patent number: 10096555
    Abstract: Consistent with an example embodiment, a semiconductor device comprises a device die having bond pads providing connection to device die circuitry and a QFN half-etched lead frame with a package boundary; the QFN half-etched lead frame has a top-side surface and an under-side surface. The QFN half-etched lead frame includes a sub-structure of I/O terminals and a die attach area, the die attach area facilitating device die attachment thereon and the terminal I/O terminals providing connection to the device die bond pads and additional terminals located about the corners of the sub-structure. An envelope of molding compound encapsulates the device die mounted on the top-side surface of the QFN half-etched lead frame. A RF (radio-frequency) shield layer is on the envelope of the molding compound, the RF shield electrically connected to the additional terminals via conductive connections defined in corresponding locations on the envelope of the molding compound.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Jan Gulpen, Leonardus Antonius Elisabeth van Gemert
  • Patent number: 10097138
    Abstract: Embodiments of a Doherty amplifier device are provided, including a first amplifier stage having a first gain; a second amplifier stage having a second gain that is less than the first gain; and an input power splitter coupled to inputs of the first and second amplifier stages, wherein the input power splitter includes either an inductive element, a capacitive element, or both coupled between the inputs of the first and second amplifier stages, and a resistive element coupled to the input of the second amplifier stage, the input power splitter respectively delivers first and second power levels to inputs of the first and second amplifier stages, and the resistive element is configured to tune gain linearity of the Doherty amplifier device by increasing the second power level to be greater than the first power level, based on a ratio of the second gain to the first gain.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: October 9, 2018
    Assignee: NXP USA, Inc.
    Inventor: Igor Blednov
  • Patent number: 10097184
    Abstract: One example discloses A differential receiver, including: a set of high voltage differential inputs configured to receive a first range of differential voltages; a first level shifter configured to generate a second range of differential voltages that are less than the first range of differential voltages; and a first low voltage differential comparator coupled to the first level shifter and configured to generate a first differential receiver output based on the second range of differential voltages.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: October 9, 2018
    Assignee: NXP USA, Inc.
    Inventors: Xiaowen Wu, Lei Tian, Yongqin Liang
  • Patent number: 10097029
    Abstract: A wireless charging transmitter has a rectifier circuit, a transmitter coil, a transmitter coil driving circuit, and a control circuit. The rectifier circuit receives an alternating current (AC) mains input voltage and provides a rectified mains voltage. The transmitter coil is provided for inductively coupling with a receiver coil on a device having a battery to be charged. The transmitter coil driving circuit directly receives the rectified mains voltage, and for providing a time-varying driving signal to the transmitter coil. The control circuit is coupled to the transmitter coil to receive charging information from a receiver battery inductively coupled to the transmitter coil through load modulation. In response, the control circuit controls a frequency and duty cycle of the time-varying driving signal based at least in part on the charging information.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventor: Arjan van den Berg