Abstract: Various exemplary embodiments relate to a method for determining the velocity of an object using radar system having a processor, including: receiving, by a processor, a first digital signal corresponding to a first transmit signal; receiving, by the processor, a second digital signal corresponding to a second transmit signal; processing the first digital signal to produce a first range/relative velocity matrix; detecting objects in the first range/relative velocity matrix to produce a first detection vector; unfolding the first detection vector; processing the second digital signal to produce a second range/relative velocity matrix; interpolating the second range/relative velocity matrix in the relative velocity direction wherein the interpolated second range/relative velocity matrix has a frequency spacing corresponding to the frequency spacing of the first range/relative range velocity matrix in the relative velocity direction; detecting objects in the second range/relative velocity matrix to produce a sec

Abstract: A noise detection circuit 100 for a power supply, the noise detection circuit 100 comprising: an impedance element 110 connected to a line 104 for carrying a power supply current having a noise signal component, the noise signal comprising a common mode noise signal and a differential mode noise signal; a filter element 112 coupled to the impedance element 110 and configured to suppress the differential mode noise signal in the noise detection circuit 110; and an evaluation circuit 140 coupled to the impedance element 110 or the filter element 112 and arranged to sense the common mode noise signal and provide an output representative of the common mode noise signal.

Abstract: A multi-bit clock gating cell is used in an integrated circuit (IC) in place of single bit clock gating cells to reduce power consumption. A physical design method is used to form a clock tree of the IC. Initial positions of clock gating cells are defined with respective initial clock input paths. Selected clock gating cells are moved to modified positions in which they may be adjoining. Adjoining cells are merged by substituting a multi-bit clock gating cell having multiple gating signal inputs, corresponding gated clock outputs, and a common clock input path. A net reduction is obtained for the overall capacitance of the clock path due to reduction of the upstream capacitance of the clock path and of the resulting multi-bit clock gating cell itself, compared with the aggregate capacitance of the clock paths of the corresponding clock gating cells before moving and merging.

Abstract: Various aspects of the present disclosure are directed toward methods and apparatus that include a lead frame with a fixed external pin pitch. A differential signal path is provided that is characterized by bond-pad pitch range, wire length and wire diameter. The differential signal path carries signals in a frequency range between 5 GHz and 16.1 GHz with less than about 25 dB differential return loss (DDRL). Further, the signals are processed at a signal-processing node that is electrically coupled to the differential signal path by using the differential signal path to carry signals in a frequency range between 5 GHz and about 16.1 GHz.

Abstract: A drive circuitry for a vibration gyroscope is described. The drive circuitry comprises a digital phase shifter, a variable gain amplifier and a pulse signal generator arranged to generate a digital pulse signal having a frequency substantially equal to a drive frequency of the vibration gyroscope. A controller is arranged to connect drive actuation units of the vibration gyroscope to outputs of the pulse signal generator during a first start-up time period, to outputs of the digital phase shifter during a second start-up time period, and to outputs of the variable gain amplifier during a measurement time period. Furthermore, a vibration gyroscope device and a method of driving a vibration gyroscope are described.

Abstract: Systems, methods, and circuits for determining one or more switch statuses are disclosed herein. In one example embodiment, such a system includes a first port configured to be coupled to a switch, a capacitor, a comparator having first and second input ports and an output port, a current source coupled to the first input port, and a control component. The first input port is coupled to the first port and a threshold voltage if applied to the second input port. The control component is configured so that, in at least one circumstance, it causes the current source to cease driving the current in response to receiving an indication from the output port indicating that an additional voltage applied to the first input port has changed from being less than the threshold voltage to being greater than that voltage, the indication being indicative of the switch status.

Abstract: A method of generating an instrumented code from a program code executable on a programmable target is described. The method comprises analyzing the program code to detect a loop nest with regular memory access in the program code, providing a record of static memory address information associated with the loop nest, and instrumenting the program code to provide an instrumented code corresponding to the program code supplemented with an instrumentation instruction to output an information message comprising a dynamic memory address information field formatted to store a dynamic memory address information associated with the loop nest.

Abstract: A semiconductor product comprising: a first semiconductor electrode, a second semiconductor electrode and an interconnecting semiconductor electrode defining a third semiconductor electrode; a first switch, between the first semiconductor electrode and the third semiconductor electrode, provided by a first vertical insulated-gate field-effect-transistor; and a second switch, between the second semiconductor electrode and the third semiconductor electrode, provided by a second vertical insulated-gate field-effect-transistor, wherein the interconnecting semiconductor electrode interconnects the first vertical insulated gate field-effect-transistor and the second vertical insulated gate field-effect-transistor.

Abstract: A regulation circuit for powering a device while charging a battery is provided. The regulation circuit includes at least one analog feedback loop, and a digitally controlled feedback loop. The digitally controlled feedback loop includes first and second comparators. The first and second comparators compare an input power supply voltage to first and second threshold voltages, respectively. The second threshold voltage is lower than the first threshold voltage. In response to the comparisons, the digitally controlled feedback loop controls a charging current for charging a battery while also regulating a current to power circuits of the device. If the input power supply voltage drops, the digitally controlled feedback loop responds faster than the analog feedback loop, reducing the risk that to supply voltage will drop too much to reliably power to the device circuits. A method for digitally regulating an output current to charge a battery is also provided.

Abstract: Embodiments of systems and methods for blending multi-channel signals are described. In one embodiment, a method for blending multi-channel signals involves computing component signals from the multi-channel signals, cross-fading the component signals based on different temporal rates to generate cross-faded component signals and generating a blended multi-channel signal based on the cross-faded component signals. Other embodiments are also described.

Abstract: A resource domain controller in a data processing system stores information that is used to group various resources, such as bus masters and peripherals, into common domains. Each group can be referred to as a resource domain and can include one or more data processor and peripheral devices. The resource domain information is then used to determine whether a particular access request from a data processor is authorized to access its intended target, e.g., one of the peripheral devices, by determining whether the access request and the intended target each belong to a common resource domain. If so, the access request is allowed, otherwise the access request is prevented from being successfully completed.

Abstract: A differential capacitive output pressure sensor device includes a pressure sensor diaphragm layer comprising a pressure sensing diaphragm portion, a movable electrode on the pressure sensing diaphragm portion, a fixed electrode, and a device layer electrode. The pressure sensor device further includes a device layer including a fixed element connected to the device layer electrode and a movable element connected to the movable electrode. As the pressure changes, the pressure sensing diaphragm portion including the movable electrode and the movable element move. This changes the capacitance between the movable electrode and the fixed element inversely to the change in capacitance between the fixed electrode and the moveable element. Accordingly, a differential capacitive output is provided that has improved linearity with respect to the pressure change and increased sensitivity allowing the change in pressure to be measured readily and accurately.

Abstract: A transponder (1) comprises at least one memory (MEM1, MEM2) for storing encrypted information (E_k(EPC, PI)) that has been encrypted by use of a key (k) and for storing the key (k) associated with the encrypted information (E_k(EPC, PI)). The transponder (1) is adapted to send the key (k) slower response than the encrypted information (E_k(EPC, PI)) in response to queries of a reading device (2), which is preferably done by delaying the transmission of the key (k) or by limiting the response rate at which the key (k) is transmitted. In particular the invention is related to RFID systems.

Abstract: A device includes a first amplifier coupled to a first signal conduction path and a second amplifier coupled to a second signal conduction path. A first coupler is coupled to the first signal conduction path. The first coupler is configured to produce an output signal based on a first signal carried by the first signal conduction path. A delay element is configured to impose a phase delay on the output signal of the first coupler to generate a delayed output signal. The device includes a second coupler coupled to the second signal conduction path. The second coupler is connected to the delay element and configured to inject the delayed output signal into the second signal conduction path.

Abstract: An electrostatic protection includes a buried layer having an outer region and an inner region which are heavily doped regions of a first conductivity type. The inner region is surrounded by an undoped or lightly doped ring region. The ring region is surrounded by the outer region. The device further includes a semiconductor region over the buried layer, a first well of the first conductivity type in the semiconductor region, a first transistor in the semiconductor region, and a second transistor in the semiconductor region. The first well forms a collector of the first transistor and a collector of the second transistor.

Abstract: A biosensor device for detecting biological particles, the biosensor device comprising a substrate, a regular pattern of pores formed in the substrate, and a plurality of sensor active structures each of which being arranged on a surface of a corresponding one of the pores, wherein each of the plurality of sensor active structures is sensitive to specific biological particles and is adapted to modify electromagnetic radiation interaction properties in the event of the presence of the respective biological particles.

Abstract: A method for generating a public key for an electronic device is provided, wherein the method comprises generating a public key 103 based on a private key and a unique identifier associated with the electronic device 200.

Abstract: Disclosed is a power converter including a generator configured to generate a sequence of output voltage waveforms, a resonant tank connected to the generator comprising at least one capacitor and at least one inductor, a transformer including a primary side connected in series with said series inductor and, the primary side being configurable to use at least one primary winding tap and a secondary side for connecting to a rectifying circuit for providing a rectified DC voltage to an output load circuit, a first switch and a second switch on the primary side connected to the primary winding, wherein the at least one primary winding is selected by the first switch or the second switch to select a different reflected output voltage by closing the first switch or the second switch.

Abstract: A technique for providing access to a first storage structure of a system includes exposing a first key of a plurality of first keys stored in a second storage structure in response to a select code based on a plurality of corresponding select records stored in one-time programmable storage elements of the second memory structure. The technique includes providing the first key as a current first key of a memory access controller. Only one of the plurality of first keys stored in the second storage structure may be exposed at a time and other first keys of the plurality of first keys stored in the second storage structure are inaccessible from the second storage structure at the time.

Abstract: Electrostatic discharge (ESD) protection devices and methods. The ESD protection devices include a semiconductor substrate, a buried semiconducting layer, and an overlying semiconducting layer. The ESD protection devices also include a first bipolar device that includes a first bipolar device region, a first device base region, and a first device emitter region. The ESD protection devices also include a second bipolar device that includes a second bipolar device region, a second device well, a second device base region, and a second device emitter region. The ESD protection devices further include a sinker well that electrically separates the first bipolar device from the second bipolar device. The ESD protection devices are configured to transition from an off state to an on state responsive to receipt of greater than a threshold ESD voltage by the first device base region. The methods include methods of forming the ESD protection device.