Abstract: A communication partner appliance is implemented within a near field communication system. The communication partner appliance includes a receiver, a detector, and a processor. The receiver receives a NFC command signal from another communication partner appliance. The detector detects whether a carrier signal from the other communication partner appliance is present at the receiver at a time other than during a transmission of the NFC command signal from the other communication partner appliance to the receiver. The processor controls a power supply element based on a determination by the detector whether the carrier signal from the other communication partner appliance is present at the receiver. The power supply element is configured to establish a connection to either a first power supply or a second power supply. The first power supply is dependent on the carrier signal, and the second power supply is independent of the carrier signal.

Abstract: There is disclosed an integrated circuit comprising a management unit for managing the occurrence of predetermined events in the integrated circuit. The management unit comprises: a processing unit adapted to determine the occurrence of a predetermined event in the integrated circuit; a data storage unit adapted to store information regarding the determined event occurrence; an output interface adapted to output a signal based on the stored information regarding the determined event occurrence; and an output generating unit adapted to analize the stored information and to generate a signal to be output by the output interface based on results of the analysis.

Abstract: A phase-frequency detector (PFD) circuit is disclosed. The PFD circuit includes a PFD portion adapted to detect frequency and phase difference of two input signals and to generate control signals according to the detected frequency and phase difference and a delay and reset portion adapted to delay the generated control signals, to generate reset signals for resetting the PFD portion based on a combination of the control signals and the delayed control signals, and to provide the generated reset signals to the PFD portion.

Abstract: Various aspects of the present disclosure are directed apparatuses and methods including a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates a PLL-PLL control signal. The second PLL circuit receives a stable reference-oscillation signal, and, in response to the PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the second PLL circuit. The first PLL circuit and the second PLL circuit are configured to produce an output frequency signal that is synchronous to the carrier signal.

Abstract: Various aspects of the disclosure are directed to methods and apparatuses involving communications. As consistent with one or more embodiments, first and second sets of multiple current drivers are implemented respectively in a high-side and a low-side circuit. Current is driven via an output port in the high-side circuit by activating the first set of multiple current drivers until a steady-state high voltage is detected, and by deactivating one of the current drivers in the first set when the steady-state high voltage is detected. Current is driven in the low-side circuit by activating the second set of multiple current drivers until a steady-state low voltage is detected, and by deactivating one of the current drivers in the second set when the steady-state low voltage is detected.

Abstract: In a method of producing a transponder, a substrate is provided. The substrate comprises a first area, a second area adjacent to the first area, and a first electric contact adjacent to the second area. An electric device is placed in or on the first area, preferably without touching the first electric contact. Subsequently, a conductive glue is applied on the second area and on the first electric contact so that the conductive glue electrically couples the first electric contact with the electric device.

Abstract: A method of controller an AC/DC to converter is disclosed, the converter having a power factor correction stage and a signal indicative of a required power and operating with a switching cycle having a switching frequency being the inverse of a switching period. The method comprises switching on the PFC stage, in response to a signal indicative of an average switching frequency rising above a first threshold. The method further comprises switching off the PFC stage, in response to the signal indicative of an average switching frequency falling below a second threshold. The method may further comprise switching on the PFC stage, in response to a positive step change in the signal indicative of a required power, and switching off the PFC stage, in response to indicative step change in the signal indicative of a required power. A controller and an AC/DC converter operable according to such a method are also disclosed as is an LED lighting system comprising such a controller.

Abstract: Packaged semiconductor product (2) including a first semiconductor device (4A) and a packaging structure with a protective envelope (6) and a first and second external electrode (8,10). The first semiconductor device (4A) has a first substrate (11A) and is provided with a first passivation layer (12A) and a first electronic structure. The first substrate has a first main surface (14). The first substrate (11A) is embedded in the protective envelope (6) and the first main surface (14) faces a first opening (23) of the protective envelope (6). The first electronic structure has a first and a second contact region (20, 22) for electrically contacting the first electronic structure. The first passivation layer (12A) substantially covers the first main surface (14) and the first electronic structure. The protective envelope (6) extends between the first passivation layer (12A) and the first external electrode (8) towards the first contact region (20).

Abstract: Various embodiments relate to a tamper-proof vehicle sensor system and a related method for sending secure packets between components. A sensing unit may include an angular sensor, such as an anisotropic magnetoresistive (AMR) sensor, which determines the angular position of a magnetic field and produces related angle sensor data. The sensing unit may place the angle sensor data in a packet and may encrypt the packet using a selected encryption key. The sensor may append an encryption key identifier (ID) associated with the selected encryption key onto the packet and send the secure, unidirectional packet to an electrical control unit (ECU). The ECU may then use the appended encryption key ID to retrieve the selected encryption key to decrypt the packet. The ECU may then extract the angle sensor data from the packet to modify the configuration of the vehicle.

Abstract: A tunnel field effect transistor and a method of making the same. The transistor includes a semiconductor substrate. The transistor also includes a gate located on a major surface of the substrate. The transistor further includes a drain of a first conductivity type. The transistor also includes a source of a second conductivity type extending beneath the gate. The source is separated from the gate by a channel region and a gate dielectric. The transistor is operable to allow charge carrier tunnelling from an inversion layer through an upper surface of the source.

Abstract: Consistent with an example embodiment, a GaN heterojunction structure has a three-layer dielectric structure. The lowermost and middle portions of the gate electrode together define the gate foot, and this is associated with two dielectric layers. A thinner first dielectric layer is adjacent the gate edge at the bottom of the gate electrode. The second dielectriclayer corresponds to the layer in the conventional structure, and it is level with the main portion of the gate foot.

Abstract: A power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.

Abstract: A process for forming a single crystal layer of one material type such as III-V semiconductor) onto a substrate of a different material type such as silicon. A substrate of a first material type is provided. At least one discrete region of catalyst material is deposited onto the substrate, the discrete region defining a seed area of the substrate. A second material type such as III-V semiconductor is grown as a single crystal nanowire onto the substrate between the substrate and catalyst material, the nanowire of second material type extending upward from the substrate with lateral dimensions not substantially exceeding the seed area. After growth of the nanowire, growth conditions are changed so as to epitaxially grow the second material type laterally from the single crystal nanowire in a direction parallel to the substrate surface.

Abstract: A programmable variable admittance circuit may be used in a programmable filter or a variable gain amplifier in a number of different applications including tuners and other RF receiver circuits. A variable admittance circuit and operation is described including a number of switchable admittance elements arranged in parallel branches. The variable admittance circuit requires fewer transitions to change between successive admittance values than a binary weighted circuit and fewer branches for implementation then a thermometry admittance circuit.

Abstract: A method of controlling a switched mode converter is disclosed in which the switching frequency varies in proportion to the square of the sine of the phase of the input AC supply. Thus the switching frequency is a maximum, and the respective on period of the switch is a minimum, when the mains voltage is a maximum. Conversely, the switching frequency is reduced, and the respective on time of the switch is increased, when the mains voltage is reduced. Such a switching method provides for a high power factor. Implementation by means of a phase locked loop and a comparator may prevent the need for complex circuitry, and may provide for direct use of a digital controller or digital signal processing through a counter output in the phase locked loop. A controller configured to operate such a method, together with an AC/DC converter embodying such a controller are also disclosed.

Abstract: Embodiments of a method for processing a baseband signal in a Direct Current (DC)-suppressed system, a system for processing a baseband signal in a DC-suppressed system, and a smart card are described. In one embodiment, a method for processing a baseband signal in a DC-suppressed system involves processing the baseband signal in the analog domain with a first high pass filter (HPF), converting the processed baseband signal to a digital signal, and processing the digital signal in the digital domain with a second HPF to provide a discrete-time differentiation of the baseband signal. Other embodiments are also described.

Abstract: A capacitive sensor for detecting the presence of a substance includes a plurality of upstanding conductive pillars arranged within a first layer of the sensor, a first electrode connected to a first group of the pillars, a second electrode connected to a second, different group of the pillars, and a dielectric material arranged adjacent the pillars, for altering the capacitance of the sensor in response to the presence of said substance.

Abstract: Consistent with an example embodiment, a method of tracking a maximum power point (MPP) of a PV (photovoltaic) system comprises a circuit with a controller controlling a DC voltage-DC voltage converter for converting an output current of the PV system; the controller further comprises a memory. The method comprises measuring a first value of a PV system voltage at an initial MPP; storing said first value in said memory; periodically sampling a power output level of said PV system, and upon detecting a change in said power output level exceeding a first threshold, reading the first value from the memory; and adjusting a duty cycle of the DC voltage-DC voltage converter until the circuit voltage matches said first value; the method further comprising fine-tuning the duty cycle of the DC voltage-DC voltage converter to a further MPP following detecting a change in said power output level exceeding a first threshold.

Abstract: Systems and methods for encoding a slot table for a communications controller of a communications network are described. In one embodiment, a method for encoding a slot table for a communications controller of a communications network includes classifying branches of the communications network that are connected to the communications controller into at least one group, where each of the at least one group includes multiple branches, and generating a slot table entry for a time slot for accessing the communications network through the communications controller based on the at least one group. Other embodiments are also described.

Abstract: A circuit is disclosed for driving a plurality of LED strings from an AC supply and arranged to, in use, drive current through a series arrangement of a plurality N of the LED strings when the AC voltage is sufficient to drive the plurality N of the LED strings: the circuit comprising a first current source configured to be switchably connected to a one end of said series arrangement of N LED strings; a series combination of a second current source and a heat dissipater, wherein the series combination of the second current source and the heat dissipater is arranged in parallel with the first current source; and a current balancer for balancing the current through the first current source and the second current source. A driver for such a circuit is also disclosed.