Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.
Type:
Application
Filed:
May 22, 2014
Publication date:
November 27, 2014
Applicant:
NXP B.V.
Inventors:
Viet Thanh Dinh, Godefridus Adrianus Maria Hurxk, Tony Vanhoucke, Jan Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
Abstract: A voltage regulator circuit is provided that includes a pass circuit including a field effect transistor (FET) having a gate coupled to the output of a comparison circuit. The comparison circuit is configured to provide a signal to the pass circuit that is based on a comparison of a first input coupled to a reference voltage and a second input. The voltage regulator includes a feedback path configured and arranged to provide feedback from an output of the pass circuit to a second input of the comparison circuit. The voltage regulator also includes a current adjustment circuit configured and arranged to adjust current consumed by the comparison circuit based on a current passed by the pass circuit.
Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
Type:
Application
Filed:
May 23, 2014
Publication date:
November 27, 2014
Applicant:
NXP B.V.
Inventors:
Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
Abstract: A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth.
Abstract: A vehicle positioning system (200) comprising a receiver (206) configured to receive information representative of signals (222) transmitted by one or more other vehicles (220), wherein each signal (222) comprises data relating to the position of the associated other vehicle (220); and a processor (207) configured to process the data relating to the position of each other vehicle to determine an estimate of the position of the vehicle positioning system.
Abstract: The invention provides an antenna which has two feed ports and two conductor areas. Where the two areas face each other, there is a set of interdigitated arms and slots. These define a shape with two open slots (one on each side) extending from the two feed points, and a central closed slot.
Abstract: A reference output device includes a low side selector configured to select a first voltage level as an output signal. The output signal is a reference voltage. The reference output device also includes a high side selector configured to select a second voltage level as the output signal. The reference output device also includes a slew rate control configured to switch the output signal between the first voltage level and the second voltage level at a constant slew rate.
Type:
Application
Filed:
December 11, 2013
Publication date:
November 27, 2014
Applicant:
NXP B.V.
Inventors:
Hok-tung Wong, Yang Zhao, Brad Gunter, Alma Anderson, James Caravella
Abstract: A voltage level translator includes an inverter circuit configured to switch an output of the inverter circuit between a first voltage level and a second voltage level. The voltage level translator also includes a capacitor connected to the output of the inverter circuit. The voltage level translator also includes a load connected to the capacitor. The capacitance of the capacitor is approximately 10 times larger than a capacitance of the load. An output signal of the voltage level translator has at least one of a different voltage swing and a different voltage domain than an input signal to the inverter circuit.
Abstract: Various exemplary embodiments relate to an integrated circuit (IC) including: an inventoried flag configured to indicate whether the integrated circuit has been inventoried in a current inventory round; and an event detector configured to detect a tag event at the integrated circuit and reset the inventoried flag based on the tag event. In various embodiments, the IC further includes a timer circuit configured to measure a predetermined time since the inventoried flag was set and to prevent the reset of the inventoried flag until the predetermined time has expired.
Abstract: A ramp output control device includes a driver configured to receive at least two inputs from a microcontroller. The driver includes a time duration register configured to store a current clock count until a preset time duration is reached. The driver also includes a ramp output register configured to store a current output value at an output of the device. The driver also includes a calculation block configured to determine whether to increase the current output value at the output based on the at least two inputs.
Abstract: A method of determining the dominant output wavelength of an LED, includes determining an electrical characteristic of the LED which is dependent on the voltage-capacitance characteristics, and analyzing the characteristic to determine the dominant output wavelength.
Type:
Grant
Filed:
February 9, 2009
Date of Patent:
November 25, 2014
Assignee:
NXP B.V.
Inventors:
Radu Surdeanu, Viet Nguyen Hoang, Benoit Bataillou, Pascal Bancken, David Van Steenwinckel
Abstract: A circuit device is configured with robust circuit connectors. In connection with various example embodiments, an integrated circuit device includes one or more via network layers below a bond pad contact, connecting the bond pad contact with one or more underlying metal layers. Each via network layer includes a plurality of via strips extending about parallel to the bond pad contact and in different directions to structurally support the bond pad contact.
Type:
Grant
Filed:
April 4, 2011
Date of Patent:
November 25, 2014
Assignee:
NXP B.V.
Inventors:
Yuan Li, Som Nath, Maarten Jeroen Van Dort
Abstract: Consistent with an example embodiment, there is a method for assembling a wafer level chip scale processed (WLCSP) device from a wafer substrate, the method comprises grinding the back-side of the wafer substrate to a prescribed thickness. A plurality of trenches is sawed along a plurality of device die boundaries on a back-side surface of the wafer, the trenches having a bevel profile. The plurality of trenches is etched until the bevel profile of the plurality of trenches is rounded.
Type:
Grant
Filed:
March 15, 2013
Date of Patent:
November 25, 2014
Assignee:
NXP B.V.
Inventors:
Hartmut Buenning, Sascha Moeller, Guido Albermann, Thomas Rohleder, Michael Zernack
Abstract: Disclosed is an integrated circuit comprising a substrate including at least one light sensor; an interconnect structure over the substrate; at least one passivation layer over the interconnect structure, said passivation layer including a first area over the at least one light sensor; and a gas sensor such as a moisture sensor at least partially on a further area of the at least one passivation layer, wherein the gas sensor comprises a gas sensitive layer in between a first electrode and a second electrode, the gas sensitive layer further comprising a portion over the first area. A method of manufacturing such an IC is also disclosed.
Type:
Grant
Filed:
January 21, 2013
Date of Patent:
November 25, 2014
Assignee:
NXP B.V.
Inventors:
Youri Victorovitch Ponomarev, David Tio Castro, Roel Daamen
Abstract: An apparatus is provided that includes first and second ICs configured to communicate using a plurality of differential signal lines. The apparatus includes a common mode suppression circuit having a plurality of common mode voltage adjustment circuits, each configured to provide a low impedance path for common mode signals and a high impedance path for differential AC signaling, thereby suppressing the effect of common mode transients between the voltage domains. The plurality of common mode voltage adjustment circuits each have components that are impedance matched up to an impedance-tolerance specification. The common mode suppression circuit also includes an AC coupling circuit configured to be less dependent on impedance mismatch, beyond the impedance-tolerance specification, by cross coupling the impedance differentials from each of the differential signal lines through the AC coupling circuit and to one of the common mode voltage adjustment circuits.
Abstract: Presented is an integrated circuit packaged at the wafer level wafer (also referred to as a wafer level chip scale package, WLCSP), and a method of manufacturing the same. The WLCSP comprises a die having an electrically conductive redistribution layer, RDL, formed above the upper surface of the die, the RDL defining a signal routing circuit. The method comprises the steps of: depositing the electrically conductive RDL so as to form an electrically conductive ring surrounding the signal routing circuit; and coating the side and lower surfaces of the die with an electrically conductive shielding material.
Type:
Grant
Filed:
April 4, 2013
Date of Patent:
November 25, 2014
Assignee:
NXP B.V.
Inventors:
Tonny Kamphuis, Leonardus Antonius Elisabeth van Gemert, Caroline Catharina Maria Beelen-Hendrikx
Abstract: According to an aspect of the invention, an electronic lock is conceived, being adapted to harvest energy from a radio frequency (RF) connection established between a mobile device and said electronic lock, further being adapted to use the harvested energy for processing an authorization token received via said RF connection from the mobile device, and further being adapted to use the harvested energy for controlling an unlocking switch in dependence on a result of said processing.
Type:
Application
Filed:
April 22, 2014
Publication date:
November 20, 2014
Applicant:
NXP B.V.
Inventors:
Piotr Polak, Wilhelmus Hubertus Chretien Knubben, Hauke Meyn
Abstract: A true ground amplifier circuit in which a voltage sensor senses the output voltage and generates a binary output which indicates whether the output is above or below a threshold. A variable gain feedback system generates a feedback signal for combination with the digital input, thereby to provide offset cancellation. The variable gain is reduced over time to provide offset cancellation during an initial period of time of operation of the amplifier circuit. This provides offset cancellation during a start-up period, for example.
Type:
Application
Filed:
April 22, 2014
Publication date:
November 20, 2014
Applicant:
NXP B.V.
Inventors:
Han Martijn Schuurmans, Maarten van Dommelen
Abstract: A differential pressure sensor comprises a cavity having a base including a base electrode and a membrane suspended above the base which includes a membrane electrode, wherein the first membrane is sealed with the cavity defined beneath the first membrane. A first pressure input port is coupled to the space above the sealed first membrane. A capacitive read out system is used to measure the capacitance between the base electrode and membrane electrode. An interconnecting channel is between the cavity and a second pressure input port, so that the sensor is responsive to the differential pressure applied to opposite sides of the membrane by the two input ports.
Type:
Application
Filed:
April 30, 2014
Publication date:
November 20, 2014
Applicant:
NXP B.V.
Inventors:
Willem Frederik Adrianus Besling, Iris Bominaar-Silkens, Remco Henricus Wilhelmus Pijnenburg, Marten Oldsen
Abstract: A transconductance amplifier comprises a set of amplifier stages. The last stage of the amplifier is split with a certain ratio whereby one part is used to deliver output current and other part to deliver feedback current to the input.