Patents Assigned to NXP
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Patent number: 8913975Abstract: An adaptive stepped gain amplifier, for example for use in broadband receivers, has a step size which is dynamically compensated (for each received frequency) to cope with step error caused by frequency dependence of the amplifier performance.Type: GrantFiled: August 13, 2013Date of Patent: December 16, 2014Assignee: NXP B.V.Inventors: Fabien Laurent Michel Deforeit, Sebastien Robert, Sebastien Amiot
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Patent number: 8912966Abstract: A dual-band antenna (100) for transmitting or receiving radio frequency signals in a lower and a higher frequency band, comprises a conductive plane (120), a slot (110) in the conductive plane (120), the slot (110) having first, second and third branches (103, 104, 105) emanating from a common point within the conductive plane (120). The first branch (103) has an end (113) open at an edge of the conductive plane (120) and the second and third branches (104, 105) each have a closed end (114, 115).Type: GrantFiled: October 16, 2008Date of Patent: December 16, 2014Assignee: NXP, B.V.Inventor: Anthony Kerselaers
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Patent number: 8912478Abstract: The light dose received by perishable goods is an important parameter in determining the lifetime of those goods. A light sensor is described having a photosensitive element which changes its material property according to the light dose received. This change can be detected electrically by electrodes in the light sensor. Because the change in material property is permanent, this removes the need for a memory to store a value representing the light dose received by the light sensor.Type: GrantFiled: June 9, 2011Date of Patent: December 16, 2014Assignee: NXP, B.V.Inventors: David Tio Castro, Aurelie Humbert
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Publication number: 20140361394Abstract: Disclosed is an integrated sensor chip package comprising an integrated sensor chip enveloped in a packaging layer (30), the integrated circuit comprising a substrate (10) having a major surface; and a light sensor comprising a plurality of photodetectors (12a-d) on a region of said major surface; the packaging layer comprising an opening (32) exposing said region, the integrated sensor chip package further comprising a light blocking member (20) over said opening, the light blocking member defining an aperture (22) exposing a first set of photodetectors to light from a first range of directions and exposing a second set of photodetectors to light from a second range of directions, wherein the first range is different to the second range. An apparatus including such an integrated sensor chip package and a method of manufacturing such an integrated sensor chip package are also disclosed.Type: ApplicationFiled: June 9, 2014Publication date: December 11, 2014Applicant: NXP B.V.Inventors: Zoran Zivkovic, Coenraad Cornelis Tak
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Patent number: 8909834Abstract: Central bus guardians (CBGs) and methods for operating a CBG are described. In one embodiment, a method for operating a CBG includes performing race arbitration among the buses connected to the CBG to select a winner bus for a time slot, and selectively forwarding data received at the CBG from the winner bus to a destination bus in the time slot based on whether the winner bus or the destination bus has a connection to an external network with respect to the application network and whether a communications device connected to the winner bus or the destination bus performs a critical function. Other embodiments are also described.Type: GrantFiled: September 21, 2011Date of Patent: December 9, 2014Assignee: NXP B.V.Inventors: Abhijit Kumar Deb, Hubertus Gerardus Hendrikus Vermeulen, Sujan Pandey
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Patent number: 8909971Abstract: The present invention relates to a clock supervision unit (100) and an electronic system clocked by at least one clock (c*) and using the clock supervision unit (100). The clock supervision unit (100) analyzes the at least one clock (c*) based on a monitor clock (m*) provided together with the at least one clock (c*) or separately to the clock supervision unit (100). The clock supervision unit (100) at least comprises an activity unit (210), a deviation unit (220) and an auxiliary clock generator (240). The auxiliary clock generator (240) outputs an auxiliary clock (a*). The activity unit (210) detects the presence of the monitor clock (m*) based on the auxiliary clock (a*) and the presence of the auxiliary clock (a*) based on the monitor clock (m*). The deviation unit (220) detects clock faults in the monitor clock (m*) based on the auxiliary clock (a*).Type: GrantFiled: August 20, 2008Date of Patent: December 9, 2014Assignee: NXP B.V.Inventors: Manfred Zinke, Peter Fuhrmann, Markus Baumeister
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Patent number: 8908994Abstract: A method (and system) of processing image data in which a depth map is processed to derive a modified depth map by analyzing luminance and/or chrominance information in respect of the set of pixels of the image data. The depth map is modified using a function which correlates depth with pixel height in the pixelated image and which has a different correlation between depth and pixel height for different luminance and/or chrominance values.Type: GrantFiled: January 9, 2013Date of Patent: December 9, 2014Assignee: NXP B.V.Inventor: Francois Martin
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Patent number: 8907760Abstract: Aspects of the present disclosure are directed toward a system in which a three-dimensional low-frequency (3D-LF) antenna and a high frequency (HF) antenna are used. The 3D-LF antenna includes three coils each oriented relative to X, Y and Z axes that define a Cartesian coordinate system for a three-dimensional space. The HF antenna is oriented along one of the axes of the LF coils and in the same antenna package as the 3D-LF antenna. The 3D-LF antenna is configured to be used in connection with an LF signal of between 3 kHz and 300 kHz. The HF antenna is configured to be used in connection with an HF signal between 3 MHz and 30 MHz.Type: GrantFiled: September 9, 2010Date of Patent: December 9, 2014Assignee: NXP B.V.Inventor: Juergen Nowottnick
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Publication number: 20140359788Abstract: A processing system is disclosed. The system comprises: a processing unit; a memory adapted to store firmware code and application code for execution by the processor; and a memory access control unit adapted to control access of the processing unit to firmware code and application code stored in the memory. The memory access control unit is adapted to disable access to firmware code when access to application code is enabled, and to disable access to application code when access to firmware code is enabled.Type: ApplicationFiled: April 22, 2014Publication date: December 4, 2014Applicant: NXP B.V.Inventors: Nicolas LAINE, Andre LEPINE
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Patent number: 8903457Abstract: In accordance with various example embodiments, a vehicle base station wirelessly communicates data with a remote transceiver circuit. The remote transceiver circuit intermittently transitions a data-receiving circuit of the remote transceiver circuit between on and off states. The vehicle base station intermittently polls the remote transceiver circuit with a series of data packets, at least one of which the data-receiving circuit of the remote transceiver circuit will receive while in the on state. The remote transceiver circuit, upon receiving the data packet, will reset a state counter to enable the remote transceiver circuit to receive a wake-up data packet while operating in the on state; in response, transmitting response data to the vehicle base station. The data communication is carried out to facilitate authentication of the remote transceiver. Exemplary embodiments include a system for passive keyless go and passive keyless entry in a vehicle.Type: GrantFiled: June 19, 2013Date of Patent: December 2, 2014Assignee: NXP B.V.Inventor: Sven Simons
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Patent number: 8902953Abstract: Digital spur reduction in which spurs are kept outside selected channels of interest. An integrated radiofrequency transceiver circuit has digital and analogue components, the circuit includes a radiofrequency signal receiver having a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.Type: GrantFiled: April 28, 2011Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Vincent Fillatre, Jean-Robert Tourret
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Patent number: 8901638Abstract: A trench-gate semiconductor device is disclosed, in which the player (10,6) which forms the body region (in a n-channel device) extends adjacent the trench (4) deeper into the device, to lie adjacent a lower trench electrode (3b, 3c). Since the p-layer extension (6) forms part of the channel, it must be very low doped, in order not to increase unduly the channel resistance in the on-state. The replacement of some of the out-diffusion resistance in the drift region by the (smaller) channel resistance results in a lower over-all Rdson. In the off-state, the p-layer forms, together with the underlying n-drift layer, a non-abrupt function, so that the depletion region in the off-state extends closer to the top surface (2) than for a conventional RSO trench-MOS, being split between the p- and n-layers, rather than all being in the n-drift region.Type: GrantFiled: July 27, 2009Date of Patent: December 2, 2014Assignee: NXP B.V.Inventors: Steven Thomas Peake, Phil Rutter
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Patent number: 8901682Abstract: A MEMS device, such as a microphone, uses a perforated plate. The plate comprises an array of holes across the plate area. The plate has an area formed as a grid of polygonal cells, wherein each cell comprises a line of material following a path around the polygon thereby defining an opening in the center. In one aspect, the line of material forms a path along each side of the polygon which forms a track which extends at least once inwardly from the polygon perimeter towards the center of the polygon and back outwardly to the polygon perimeter. This defines a meandering hexagon side wall, which functions as a local spring suspension.Type: GrantFiled: April 12, 2013Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Klaus Reimann, Iris Bominaar-Silkens, Twan Van Lippen, Remco Henricus Wilhelmus Pijnenburg
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Patent number: 8901669Abstract: A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.Type: GrantFiled: July 27, 2012Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Hans Mertens, Johannes Theodorus Marinus Donkers, Evelyne Gridelet, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee
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Patent number: 8901703Abstract: The electronic device comprises a network of at least one thin-film capacitor and at least one inductor on a first side of a substrate of a semiconductor material. The substrate has a resistivity sufficiently high to limit electrical losses of the inductor and being provided with an electrically insulating surface layer on its first side. A first and a second lateral pin diode are defined in the substrate, each of the pin diodes having a doped p-region, a doped n-region and an intermediate intrinsic region. The intrinsic region of the first pin diode is larger than that of the second pin diode.Type: GrantFiled: May 3, 2005Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Arnoldus Den Dekker, Johannes Frederik Dijkhuis, Nicolas Jonathan Pulsford, Jozef Thomas Martinus Van Beek, Freddy Roozeboom, Antonius Lucien Adrianus Maria Kemmeren, Johan Hendrik Klootwijk, Maarten Dirk-Johan Nollen
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Patent number: 8901705Abstract: The present invention relates to an electronic component, that comprises, on a substrate, at least one integrated MIM capacitor, (114) an electrically insulating first cover layer (120) which partly or fully covers the top capacitor electrode (118) and is made of a lead-containing dielectric material, and a top barrier layer (122) on the first cover layer. The top barrier layer serves for avoiding a reduction of lead atoms comprised by the first cover layer under exposure of the first cover layer to a reducing substance. An electrically insulating second cover layer (124) on the top barrier layer has a dielectric permittivity smaller than that of the first cover layer establishes a low parasitic capacitance of the cover-layer structure. The described cover-layer structure with the intermediate top barrier layer allows to fabricate a high-accuracy resistor layer (126.1) on top.Type: GrantFiled: October 22, 2009Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Aarnoud Laurens Roest, Mareike Klee, Rudiger Gunter Mauczok, Linda Van Leuken-Peters, Robertus Adrianus Maria Wolters
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Patent number: 8902022Abstract: A resonator comprising a resonator body and actuation electrodes for driving the resonator into a resonant mode, in which the resonator body vibrates parallel to a first axis. The resonator comprises means to apply a voltage to the resonator in a direction perpendicular to the first axis direction. This serves to shift the frequency of resonant modes other than the principal resonant mode, and this allows increased amplitude of output signal from the resonator.Type: GrantFiled: March 26, 2012Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Casper van der Avoort, Andreas Bernardus Maria Jansman
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Patent number: 8902772Abstract: A magnetic induction system is disclosed, which has antenna diversity at the transmitter side, but which does not require a bidirectional link to pass information regarding received signal quality back to the transmitter. The system uses a time division multiplexing access (TDMA) arrangement, to transmit the same, or correlated, information with a level of redundancy, from two, or more, antenna to at least a receiver. The or each receiver is configured to determine a received signal quality from the channel received from one antenna, and, in response to inadequate signal quality, to switch to another antenna. A receiver, and a transmitter for such a magnetic induction system are also disclosed, as is an associated method. A non-limiting application of such a system is in binaural hearing aids, in which antenna diversity is preferred at the transmitter because of space limitations.Type: GrantFiled: October 13, 2011Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventor: Ludo Albert Lenaerts
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Patent number: 8904266Abstract: Various embodiments relate to a multi-standard Viterbi decoder. Based on programmable values for constraint length, generator polynomials, and code rate, the multi-standard Viterbi decoder may adhere to a specific convolutional code standard. At a given time, the multi-standard Viterbi decoder may receive a variety of convolutional codes through a channel and may process them using various forms of the trace back method. Various embodiments include a branch metric unit and path metric unit that include a variety of sub-units that may or may not be active based on the value of the programmable value. Various embodiments also enable the multi-standard Viterbi decoder to handle different forms of convolutional codes, such as tail-biting codes. In some embodiments, the multi-standard Viterbi decoder may also process at least two convolutional codes concurrently.Type: GrantFiled: August 10, 2010Date of Patent: December 2, 2014Assignee: NXP, B.V.Inventors: Weihua Tang, Nur Engin, Frits Anthonie Steenhof, Marc Klaassen, Andries Pieter Hekstra, Sergie Valerjewitsch Sawitzki
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Publication number: 20140348276Abstract: Systems and methods for operating a filter for echo cancellation are described. In one embodiment, a method for operating a filter for echo cancellation involves monitoring at least one of a filter coefficient of the filter and an echo cancellation error to generate a monitoring result and, in response to the monitoring result, adjusting at least one of delay elements and filter taps of the filter to vary an impulse response of the filter. Other embodiments are also described.Type: ApplicationFiled: May 24, 2013Publication date: November 27, 2014Applicant: NXP B.V.Inventors: Sujan Pandey, Frits Steenhof