Abstract: Consistent with an example embodiment, there is a method for assembling a wafer level chip scale processed (WLCSP) device from a wafer substrate, the method comprises grinding the back-side of the wafer substrate to a prescribed thickness. A plurality of trenches is sawed along a plurality of device die boundaries on a back-side surface of the wafer, the trenches having a bevel profile. The plurality of trenches is etched until the bevel profile of the plurality of trenches is rounded.

Abstract: A wireless charging pad is illustratively disclosed. In an embodiment, the pad includes an NFC tag which is capable of receiving an NFC signal from the receiver and thereby turning on the pad's power supply to commence charging of the receiver.

Abstract: Flash memory arrays are described. In one embodiment, a flash memory array includes memory sectors of Two-Transistor (2T) AND memory cells. Within each of the memory sectors, a row of sector selection transistors is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line, independent from the row of sector selection transistors. Other embodiments are also described.

Abstract: A bleeder arrangement for a phase-cut circuit for a high-impedance load and having a leading-edge phase-cut device is disclosed, the bleeder arrangement comprising: a controllable current sink adapted to sink a latching current through the leading-edge phase-cut device, and a controller for controlling the controllable current sink, wherein the controller is configured to disable the current sink after the leading-edge phase phase-cut device has latched in at least two stages. A controller for use in such an arrangement is also disclosed, as is a method of controller such a bleeder arrangement.

Abstract: A method of operating a stereo display device comprises addressing a display such that a stereo image is addressed in one field period by presenting left and right eye images in sequence with line-by-line addressing. A backlight is controlled in line-by-line manner with a different addressing rate to the addressing rate of the images. A shutter arrangement for a viewer is controlled by opening a shutter associated with one eye of the viewer when the respective image is displayed.

Abstract: A sensor array for detecting particles, the sensor array comprising a substrate having a plurality of holes, a plurality of electronic sensor chips each having a sensor active region being sensitive to the presence of particles to be detected, and an electric contacting structure adapted for electrically contacting the plurality of electronic sensor chips, wherein the plurality of electronic sensor chips and/or the electric contacting structure are connected to the substrate in such a manner that the plurality of holes in combination with the plurality of electronic sensor chips and/or the electric contacting structure form a plurality of wells with integrated particle sensors.

Abstract: The invention provides a clock select circuit and method which uses feedback arrangements between latches in different branches, with each branch for coupling an associated clock signal to the circuit output. An override circuit is provided in one of the feedback arrangements for preventing a latching delay in that feedback arrangement. This enables rapid switching between clocks in both directions.

Abstract: A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a first signal portion (of the AC signal) and with another signal portion diverted by the inherent capacitances associated with the FET. For offsetting the loading caused by the inherent capacitances associated with the FET-based switch, a biasing circuit is configured and arranged to bias the back-gate terminal of the FET transistor with a follower signal.

Abstract: A method for generating a reference voltage includes generating a proportional-to-absolute temperature (PTAT) voltage across a first pseudo resistor. The first pseudo resistor includes a transistor. The method also includes converting the PTAT voltage to a current based on a resistance of the first pseudo resistor. The method also includes mirroring the current using a current mirror circuit and converting the mirrored current to a converted PTAT voltage using a second pseudo resistor. The second pseudo resistor includes a transistor. The first pseudo resistor and the second pseudo resistor include equal transistor types. The method also includes generating a complementary-to-absolute temperature (CTAT) voltage, and summing the converted PTAT voltage and the CTAT voltage to produce the reference voltage. The resulting reference voltage is temperature independent.

Abstract: As may be consistent with one or more embodiments discussed herein, an integrated circuit apparatus includes a membrane suspended over a cavity, with the membrane and cavity defining a chamber. The membrane has a plurality of openings therein that pass gas into and out of the chamber. As the membrane is actuated, the volume of the chamber changes to generate a gas pressure inside the chamber that is different than a pressure outside the chamber. A sensor detects a frequency-based characteristic of the membrane responsive to the change in volume, and therein provides an indication of the gas pressure outside the chamber.

Abstract: An integrated circuit comprising a set of data processing units including a first data processing unit and at least one second data processing unit operable at variable frequencies is disclosed. The integrated circuit further includes an instruction scheduler adapted to evaluate data dependencies between individual instructions in a received plurality of instructions and assign the instructions to the first data processing unit and the at least one second data processing unit for parallel execution in accordance with said data dependencies. The integrated circuit is operable in a first power mode and a second power mode. The second power mode is a reduced power mode compared to the first power mode and is adapted to adjust the operating frequency of the first data processing unit and the at least one second data processing unit in the second power mode as a function of the evaluated data dependencies.

Abstract: Near-field communications (NFC) with NFC reader devices are facilitated. In accordance with one or more embodiments, an apparatus includes a NFC circuit that wirelessly communicates with different types of local NFC readers using an NFC protocol, a host circuit having one or more modules that communicate with one of the types of local NFC readers via the NFC circuit, and second (e.g., secure) modules that respectively communicate with a specific one of the different types of local NFC readers, also via the NFC circuit, using secure data stored within the second module. A routing circuit is responsive to an NFC communication received from a specific one of the NFC readers, by identifying one of the first and second modules that communicates with the specific one of the NFC readers, and routing NFC communications between the specific one of the NFC readers and the identified one of the modules.

Abstract: The present invention discloses a method of testing a partially assembled multi-die device (1) by providing a carrier (300) comprising a device-level test data input (12) and a device-level test data output (18); placing a first die on the carrier, the first die having a test access port (100c) comprising a primary test data input (142), a secondary test data input (144) and a test data output (152), the test access port being controlled by a test access port controller (110); communicatively coupling the secondary test data input (144) of the first die to the device-level test data input (12), and the test data output (152) of the first die to the device-level test data output (18); providing the first die with configuration information to bring the first die in a state in which the first die accepts test instructions from its secondary test data input (144); testing the first die, said testing including providing the secondary test data input (144) of the first die with test instructions through the device-

Abstract: A track and hold circuit has a main transistor for which the gate voltage is provided by a buffer circuit which is supplied with a different voltage supply than the circuit of the main transistor. This avoids the need for a bootstrap circuit.

Abstract: A radio receiver (100) comprises an analogue to digital converter (30) for generating a data word representative of a received radio signal and a gain control stage (40) comprising a first register (42) for storing the data word. The gain control stage (40) is adapted to control the numerical value of the data word by controlling the position of the data word in the first register (42).

Abstract: A high density capacitor 12, a method of manufacturing it, and applications of it are described. The capacitor 12 is an electrochemical capacitor using a metal ion accepting cathode 22 and a metal ion accepting anode 26 and a amorphous solid electrolyte 24 between. The cathode and anode may be of amorphous lithium ion intercalating material such as suitable transition metal oxides with multiple oxidation states.

Abstract: A boost converter for converting between an input voltage and an output voltage is disclosed. The boost converter includes an inductor connected to the input voltage a switching arrangement for controlling the switching of the inductor current to an output load at the output voltage and a controller for controlling the switching arrangement to provide duty cycle control. The duty cycle control switching takes place when the inductor current reaches a peak current level which varies over time with a peak current level function. The peak current level function includes the combination of a target peak value derived from a target average inductor current and a slope compensation function which periodically varies with a period corresponding to the converter switching period.

Abstract: A device can be configured to provide isolation between conductive circuit paths and to selectively connect one of the conductive circuit paths to a shared interface. Each conductive circuit path can include driver circuitry designed to transmit signals according to a particular protocol and a corresponding signal speed. The shared interface can be, in one instance, a connector designed for connection to other devices. The other devices can be configured to communicate over the shared interface using one or more of the particular protocols provided using the different circuit paths.

Abstract: A transceiver includes a transmit pin configured to receive a signal from a microcontroller, a receive pin configured to transmit a signal to a microcontroller and a bus pin configured to transmit and receive signalling to/from a network. The transceiver also includes a wake-up detector for selectively waking up the microcontroller connected to the transceiver, and one or more switches operable to put the transceiver in a first mode of operation. In the first mode of operation, the transmit pin is connected to the wake-up detector, and the wake-up detector is configured to activate a wake-up code in accordance with a signal received at the transmit pin.

Abstract: Tampering with an electricity network is detected from an electricity meter by transmitting a probe signal over at least part of the electricity network (12) from a signal source (106a) in the electricity meter (10). A reflected signal produced by reflection of the probe signal in the electricity network (12) is received back. The reflected signal is compared with a reference signal. An alarm signal is generated when said comparing detects a deviation between the reflection signal and the reference signal, in particular when reflections from a new position on the electricity network near the electricity meter are detected.