Patents Assigned to NXP
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Publication number: 20140312963Abstract: a switchable current source in which a reference voltage value to be used in driving the gate of an output transistor is sampled and stored. The reference voltage is derived using a reference current source which feeds a current sensing transistor. The current sensing transistor is turned off when the output transistor is turned off, so that the reference current source then does not consume power. A large reference current Iref can then be used for a short time.Type: ApplicationFiled: March 7, 2014Publication date: October 23, 2014Applicant: NXP B.V.Inventor: Marco Berkhout
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Publication number: 20140312205Abstract: Described is an arrangement for registering light, comprising: a MOS-transistor structure (101, 201, 401, 501, 601, 701) having a first source/drain region (103), a second source/drain region (105), and a bulk region (107) at least partially between the first source/drain region and the second source/drain region, wherein the bulk region has a doping type different from another doping type of the first and the second source/drain regions, wherein in the bulk region (107) charge carriers are generated in dependence of light (111) impinging on the bulk region (107), wherein the generated charge carriers control a current flowing from the first source/drain region (103) to the second source/drain region (105) via at least a portion of the bulk region.Type: ApplicationFiled: March 24, 2014Publication date: October 23, 2014Applicant: NXP B.V.Inventor: Ernst Bretschneider
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Publication number: 20140312965Abstract: A programmable variable admittance circuit may be used in a programmable filter or a variable gain amplifier in a number of different applications including tuners and other RF receiver circuits. A variable admittance circuit and operation is described including a number of switchable admittance elements arranged in parallel branches. The variable admittance circuit requires fewer transitions to change between successive admittance values than a binary weighted circuit and fewer branches for implementation then a thermometry admittance circuit.Type: ApplicationFiled: March 3, 2014Publication date: October 23, 2014Applicant: NXP B.V.Inventor: Xavier Pruvost
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Patent number: 8867592Abstract: In some embodiments, a receiver circuit is configured to receive a modulated signal from a transmitter that is galvanically isolated from the receiver circuit. The receiver circuit is configured to demodulate the modulated signal by using two comparator circuits that respectively detect the presence or absence of first and second signal states of a carrier signal. Based on the detection of the first and second states, the receiver circuit determines whether the carrier signal is present or absent in the modulated signal to determine a demodulated value of the modulated signal.Type: GrantFiled: May 9, 2012Date of Patent: October 21, 2014Assignee: NXP B.V.Inventor: Rameswor Shrestha
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Patent number: 8864039Abstract: It is described a transponder tagged object, comprising: a conductive structure (103, 105, 403, 405); an insulating region (109, 409) galvanically isolating a first portion (103, 403) of the conductive structure from a second portion (105, 405) of the conductive structure; and a transponder tag (111, 411, 611) comprising a first antenna pad (133, 333) and a second antenna pad (135, 335), wherein the transponder tag is fixed at the object such that the first portion of the conductive structure in particular capacitively couples to the first antenna pad and such that the second portion of the conductive structure in particular capacitively couples to the second antenna pad. Further, a method for manufacturing a transponder tagged object is described.Type: GrantFiled: November 29, 2011Date of Patent: October 21, 2014Assignee: NXP B.V.Inventor: Giuliano Manzi
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Patent number: 8864968Abstract: An electrochemical sensor device including a sensor chip having an integrated electrochemical sensor element; and a substrate having a first surface on which the sensor chip is mounted, the substrate comprising a reference electrode structure for the integrated electrochemical sensor element, the reference electrode structure connected to the sensor chip via an electrical connection on the first surface of the substrate.Type: GrantFiled: August 17, 2010Date of Patent: October 21, 2014Assignee: NXP B.V.Inventors: Matthias Merz, Youri Victorovitch Ponomarev
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Patent number: 8866454Abstract: ADC-DC converter, for a solar charger, is disclosed. The converter is based on a buck-boost converter, and is operable both in a boost mode, and in a buck mode. The converter differs from known converters, in that during buck mode operation, the boost mode is disabled, thereby reducing or eliminating the losses associated with buck mode operation. Methods of operating such a reconfigurable buck-boost converter are also disclosed as is a computer programme product for controlling a reconfigurable buck-boost converter.Type: GrantFiled: January 11, 2011Date of Patent: October 21, 2014Assignee: NXP B.V.Inventor: Mukesh Nair
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Patent number: 8866239Abstract: A method of manufacturing an integrated circuit having a substrate comprising a plurality of components and a metallization stack over the components, the metallization stack comprising a first sensing element and a second sensing element adjacent to the first sensing element.Type: GrantFiled: November 4, 2011Date of Patent: October 21, 2014Assignee: NXP B.V.Inventors: Marcus Van Dal, Aurelie Humbert, Matthias Merz, Youri Victorovitch Ponomarev
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Publication number: 20140310436Abstract: Embodiments of a system and method are disclosed. One embodiment is an I2C compatible device. The I2C compatible device includes an SDA interface for connection to an SDA line and a single-line I2C module configured to transmit a sync word from the SDA interface over the SDA line and following the sync word, to transmit I2C data from the SDA interface over the SDA line such that digital data is communicated via a single line. In an embodiment, the sync word is a sync byte+NACK.Type: ApplicationFiled: April 16, 2013Publication date: October 16, 2014Applicant: NXP B.V.Inventor: David Alan Du
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Publication number: 20140306232Abstract: Disclosed is a semiconductor device comprising at least one active layer (14, 16) on a substrate (10) and a first contact (24, 26, 28) to the at least one active layer, the first contact comprising a metal in contact with the at least one active layer and a titanium tungsten nitride (TiW(N)) layer (30) on the metal. A method of manufacturing such a semiconductor device is also disclosed.Type: ApplicationFiled: April 9, 2014Publication date: October 16, 2014Applicant: NXP B.V.Inventors: Johannes DONKERS, Hans Broekman, Stephan HEIL, Mark DE KEIJSER, Cecilia van der Schaar
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Patent number: 8860230Abstract: In one embodiment, a semiconductor is provided comprising a substrate and a plurality of wiring layers and dielectric layers formed on the substrate, the wiring layers implementing a circuit. The dielectric layers separate adjacent ones of the plurality of wiring layers. A first passivation layer is formed on the plurality of wiring layers. A first contact pad is formed in the passivation layer and electrically coupled to the circuit. A wire is formed on the passivation layer and connected to the contact pad. A through silicon via (TSV) is formed through the substrate, the plurality of wiring and dielectric layers, and the passivation layer. The TSV is electrically connected to the wire formed on the passivation layer. The TSV is electrically isolated from the wiring layers except for the connection provided by the metal wire formed on the passivation layer.Type: GrantFiled: August 7, 2013Date of Patent: October 14, 2014Assignee: NXP B.V.Inventors: Florian Schmitt, Michael Ziesmann
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Patent number: 8861370Abstract: Systems and methods for testing a communications network having a central bus guardian (CBG) to detect a faulty condition associated with the CBG are described. In one embodiment, a method for testing a communications network having a CBG to detect a faulty condition associated with the CBG includes supplying a communications schedule to the CBG, causing test data to be transmitted between different buses that are connected to the CBG according to the communications schedule, and determining the faulty condition associated with the CBG based on whether or not the test data is received according to the communications schedule. Other embodiments are also described.Type: GrantFiled: September 21, 2011Date of Patent: October 14, 2014Assignee: NXP B.V.Inventors: Abhijit Kumar Deb, Sujan Pandey, Hubertus Gerardus Hendrikus Vermeulen
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Patent number: 8860120Abstract: Consistent with various example embodiments, a field-controlling electrode applies a negative bias, relative to a source/drain electrode, increase voltage breakdown. The field-controlling electrode is located over a channel region and between source and drain electrodes, and adjacent a gate electrode. The field electrode shapes a field in a portion of the channel region laterally between the gate electrode and one of the source/drain electrodes, in response to a negative bias applied thereto.Type: GrantFiled: September 21, 2011Date of Patent: October 14, 2014Assignee: NXP, B.V.Inventors: Saad Kheder Murad, Ronaldus Johannus Martinus van Boxtel
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Patent number: 8862052Abstract: In an NFC mobile communication device (3) an operating system, such as a JAVA operating system (J2ME), is able to start software applications (6) identifiable by application identifications (AID). The mobile communication device (3) is equipped with a secure memory device (2), e.g. configured as a SmartMX card, which comprises a first memory portion (2a) configured as a MIFARE memory. The mobile communication device (3) comprises NFC means (5) adapted to trigger a hardware interruption (INT), when the first memory portion (2a) has been accessed by an external RFID reader (1). The hardware interruption (INT) is detected by the operating system (J2ME) and causes it to access a pre-defined sector (S) of the first memory portion (2a), to read information from said sector (S) which is representative for an application identification (AID) and to start the software applications (6) associated to it.Type: GrantFiled: May 13, 2009Date of Patent: October 14, 2014Assignee: NXP, B.V.Inventor: Alexandre Corda
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Patent number: 8862422Abstract: Sensors (1) for sensing accelerations are provided with accelerometers (11) for measuring accelerations, with magnetometers (12) for measuring magnetic fields, and with processors (13) for, in response to acceleration measurements and magnetic field measurements, judging the accelerations. The processors (13) may comprise acceleration units (14) for comparing acceleration signals with acceleration thresholds, and magnetic field units (15) for comparing changes of magnetic field signals per time interval with rate thresholds. The processors (13) may further comprise decision units (17) for, in response to comparison results from the acceleration units (14) and the magnetic field units (15), deciding whether a total acceleration forms part of a tumbling free-fall or a non-tumbling free-fall or not. The processors (13) may yet further comprise distinguishing units (18) and control units (19). Devices (2) may comprise sensors (1).Type: GrantFiled: May 25, 2007Date of Patent: October 14, 2014Assignee: NXP B.V.Inventors: Teunis Ikkink, Hans Boeve
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Patent number: 8861748Abstract: Disclosed is a class D amplifier comprising a modulation stage having a first input for receiving an input signal and an output for producing a modulated version of the input signal; a plurality of power stages, each power stage being responsive to said modulation stage and comprising a first switch and a second switch coupled in series between a first voltage source and a second voltage source, each power stage comprising an output node between the first switch and the second switch; and a power stage control circuit for measuring the input signal level and enabling a selected number of the power stages as a function of the measured input signal level. A method for controlling such a class D amplifier is also disclosed.Type: GrantFiled: November 22, 2011Date of Patent: October 14, 2014Assignee: NXP B.V.Inventors: Lutsen Ludgerus Albertus Hendrikus Dooper, Marco Berkhout, Wilfred Repko
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Publication number: 20140300289Abstract: Embodiments of a dimmable driver circuit for a light-emitting diode (LED) load and a method for driving an LED load are described. In one embodiment, a dimmable driver circuit for an LED load includes an alternating current (AC)-direct current (DC) rectifier configured to convert an AC input voltage into a DC voltage, a damper and filter circuit configured to provide a latching current to a phase-cut dimmer and to suppress an inrush current caused by phase-cut dimming, and to filter electromagnetic interference (EMI) noise from the DC voltage, and a switching converter circuit connected to the damper and filter circuit and configured to operate in a boundary conduction mode (BCM) with a constant on-time to generate DC power for the LED load in response to the DC voltage. Other embodiments are also described.Type: ApplicationFiled: March 13, 2014Publication date: October 9, 2014Applicant: NXP B.V.Inventor: Yan Zhu
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Publication number: 20140300410Abstract: The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit.Type: ApplicationFiled: March 17, 2014Publication date: October 9, 2014Applicant: NXP B.V.Inventors: Henricus Cornelis Johannes BÜTHKER, Matthias ROSE
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Patent number: 8854150Abstract: A resonator in which in addition to the normal anchor at a nodal point, a second anchor arrangement is provided and an associated connecting arm between the resonator body and the second anchor arrangement. The connecting arm connects to the resonator body at a non-nodal point so that it is not connected to a normal position where fixed connections are made. The connecting arm is used to suppress transverse modes of vibration.Type: GrantFiled: April 13, 2012Date of Patent: October 7, 2014Assignee: NXP, B.V.Inventors: Casper van der Avoort, Jozef Thomas Martinus van Beek
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Patent number: 8856492Abstract: The present application relates to a method for processing data in a vector processor. The present application relates also to a vector processor for performing said method and a cellular communication device comprising said vector processor. The method for processing data in a vector processor comprises executing segmented operations on a segment of a vector for generating results, collecting the results of the segmented operations, and delivering the results in a result vector in such a way that subsequent operations remain processing in vector mode.Type: GrantFiled: May 29, 2009Date of Patent: October 7, 2014Assignee: NXP B.V.Inventors: Mahima Smriti, Jean-Paul Charles Francois Hubert Smeets, Willem Egbert Hendrik Kloosterhuis