Patents Assigned to NXP
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Patent number: 8588430Abstract: It is described a method for controlling an adaptation of a behavior of an audio device (100) to a current acoustic environmental condition. The method comprises (a) monitoring an audio output signal (x(t), x?(t)) being provided to an acoustic output device (110) of the audio device (100) for outputting an acoustic output signal, (b) measuring an audio input signal (z(t)) being provided by an acoustic input device (120) of the audio device (100), wherein the audio input signal (z(t)) is indicative for a feedback portion of the acoustic output signal and for the current acoustic environmental condition, (c) determining a relation between the audio output signal (x?(t)) and the audio input signal (z(t)) and (d) adapting the behavior of the audio device (100) based on the determined relation.Type: GrantFiled: February 9, 2010Date of Patent: November 19, 2013Assignee: NXP B.V.Inventors: Wouter Joos Tirry, Peterjan Schreurs, Ralf Funken
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Patent number: 8587299Abstract: An AMR sensor, comprises at least first and second AMR sensor elements to which opposite bias fields are applied. The first and second AMR sensor element outputs are combined to derive a sensor response which is substantially anti-symmetric in the region close to zero external magnetic field. This arrangement shifts the zero detection point of the AMR sensor elements away from a maximum of the response curve, so that sensitivity in proximity to a zero input field is obtained. To overcome the problem that the response is not anti-symmetric, the signals from (at least) two sensor elements are combined.Type: GrantFiled: November 19, 2010Date of Patent: November 19, 2013Assignee: NXP B.V.Inventors: Robert Hendrikus Margaretha van Veldhoven, Andreas Bernardus Maria Jansman, Jaap Ruigrok
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Patent number: 8587376Abstract: An automatic gain controller is disclosed. The AGC includes an input for monitoring a signal associated with an amplifier and a gain control circuit for controlling the gain of the amplifier in response to the monitored signal, wherein the gain control circuit is adapted to control the gain of the amplifier in accordance with a gain control function having continuously variable attack and release time constants, both of which depend on the amplitude of the monitored signal.Type: GrantFiled: July 26, 2011Date of Patent: November 19, 2013Assignee: NXP, B.V.Inventor: Friedrich Reining
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Publication number: 20130299955Abstract: Film-on-wire (FOW) based IC devices and FOW based methods for IC packaging are described. In an embodiment, a method for packaging an IC dies involves applying a film layer to IC dies and bond wires that are attached to a substrate or a leadframe to form a film-on-wire layer, where the IC dies and the bond wires are enclosed by the film-on-wire layer, and cutting the substrate or the leadframe into IC devices. Other embodiments are also described. The FOW based method for IC packaging can eliminate the need for molding in the IC packaging process and consequently, can reduce the cost of IC packaging and the dimensions of packaged IC devices.Type: ApplicationFiled: May 8, 2012Publication date: November 14, 2013Applicant: NXP B.V.Inventors: Ching Hui Chang, Li Ching Wang, Wen Hung Huang, Pao Tung Pan, Chih Li Huang, I Pin Chen, Chia Han Lin, Chung Hsiung Ho
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Publication number: 20130302945Abstract: A method of dividing a two dimensional array of encapsulated integrated circuits into individual integrated circuit packages uses a first series of parallel cuts (32) extending fully through the leadframe (16) and encapsulation layer (14), and defining rows of the array. The cuts terminate before the beginning and end of the rows such that the integrity of the array is maintained by edge portions (34) at the ends of the rows. After plating contact pads (18), a second series of parallel cuts (36) is made extending fully through the leadframe (16) and encapsulation layer (14). This separates the array into columns thereby providing singulation of packages between the edge portions (34).Type: ApplicationFiled: September 29, 2010Publication date: November 14, 2013Applicant: NXP B.V.Inventors: Martin Ka Shing Li, Max Leung, Pompeo Umali
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Publication number: 20130301176Abstract: A circuit arrangement is disclosed comprising: a normally-on transistor (such as a HEMT) having first and second transistor main terminals and a non-insulated control terminal, the non-insulated control terminal being electrically coupled to a ground; a normally-off switch having first and second switch main terminals and a switch control terminal, the normally-off switch being arranged in a cascode configuration with the normally-on transistor, the first switch main terminal being electrically coupled to the second transistor main terminal, the switch control terminal being electrically coupled to the second switch main terminal and to the ground; and a control circuit configured to switch on the normally-off switch in response to the voltage at the first switch main terminal being negative relative to the ground. A method of controlling such a circuit is also disclosed.Type: ApplicationFiled: April 25, 2013Publication date: November 14, 2013Applicant: NXP B.V.Inventor: Frans PANSIER
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Publication number: 20130301362Abstract: A pulse-based memory read-out device, including: a pulse generator at a first end of a bit line and a detector at a second end of the bit line. The pulse generator is configured to send an electrical pulse along the bit line from the first end of the bit line. The detector is configured to: detect the electrical pulse at the second end; and output a digital signal representing a current state of a selected memory cell in the bit line, wherein the digital signal is based on an amplitude of the electrical pulse at the second end.Type: ApplicationFiled: May 10, 2012Publication date: November 14, 2013Applicant: NXP B.V.Inventor: Harold Gerardus Pieter Hendrikus Benten
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Publication number: 20130300464Abstract: A controller for an SMPS is disclosed. The controller applies a frequency jitter to the SMPS to reduce Electromagnetic Interference (EMI) and/or audible noise. A second input variable is multiplied by a correlated jitter signal, in order to compensate the output power for the frequency jitter. A corresponding method is also disclosed. Since the jitter compensation occurs within the controller, the method is particularly suitable for controllers operating under different control modes for different output powers (or other output criteria). The multiplicative compensation is applicable across a wide range of converter types.Type: ApplicationFiled: September 9, 2009Publication date: November 14, 2013Applicant: NXP B. V.Inventors: Jeroen Kleinpenning, Hans Halberstadt, Frank Paul Behagel
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Publication number: 20130299846Abstract: Disclosed is a semiconductor device comprising a substrate (10); at least one semiconducting layer (12) comprising a nitride of a group 13 element on said substrate; and an ohmic contact (20) on the at least one semiconducting layer, said ohmic contact comprising a silicon-comprising portion (22) on the at least one semiconducting layer and a metal portion (24) adjacent to and extending over said silicon-comprising portion, the metal portion comprising titanium and a further metal. A method of manufacturing such a semiconductor device is also disclosed.Type: ApplicationFiled: May 3, 2013Publication date: November 14, 2013Applicant: NXP B.VInventors: Johannes Theodorus Marinus Donkers, Stephan Heil, Romain Delhougne, Hans Broekman
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Patent number: 8580596Abstract: The present invention relates to a method of forming a micro cavity having a micro electrical mechanical system (MEMS) in a process, such as a CMOS process. MEMS resonators are being intensively studied in many research groups and some first products have recently been released. This type of device offers a high Q-factor, small size, high level of integration and potentially low cost. These devices are expected to replace bulky quartz crystals in high-precision oscillators and may also be used as RF filters. The oscillators can be used in time-keeping and frequency reference applications such as RF modules in mobile phones, devices containing blue-tooth modules and other digital and telecommunication devices.Type: GrantFiled: April 10, 2009Date of Patent: November 12, 2013Assignee: NXP, B.V.Inventors: Petrus H. C. Magnee, Jan Jacob Koning, Jozef T. M. Van Beek
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Patent number: 8581692Abstract: In a method of operating an electronic system (1) a first device (3) of the electronic system (1) sends a message to a second device (6) of the electronic system (1). The second device (6) receives the message, generates a first value utilizing a first function based on at least parts of the history of at least parts of messages previously received at the second device (6), and stores the first value in a memory (8) of the second device (6). The first value is compared 5 with a second value generated at the first device (3), wherein the second value utilizes a second function based on at least parts of the history of at least parts of messages previously sent from the first device (3) to the second device (6). The first and second values are evaluated, and a signal is generated if the evaluating of the first and second values indicates that the history—of the messages previously received at the second device (6) differs from the 10 history of messages previously sent from the first device (3).Type: GrantFiled: November 12, 2008Date of Patent: November 12, 2013Assignee: NXP B.V.Inventors: Peter Slikkerveer, Susanne Burfeind
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Patent number: 8581891Abstract: A light sensor arrangement is used to detect ambient light conditions. According to an example embodiment, a light detector arrangement (e.g., 110) generates an output in response to light incident thereupon. An averaging-type circuit (e.g., 160) samples the generated output for overlapping time intervals, and combines the sampled output to form a new output that characterizes the incident light. The overlapping time intervals 5 (e.g., 221-261) are chosen such that the new output is generally flicker-free for incident light generated using one of at least two different power supply frequencies.Type: GrantFiled: March 20, 2009Date of Patent: November 12, 2013Assignee: NXP B.V.Inventors: Rob Van Dalen, Sergio Masferrer Oncala
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Patent number: 8583998Abstract: A system and method for Viterbi decoding utilizes a general purpose processor with application specific extensions to perform Viterbi decoding operations specified in a Viterbi decoding algorithm stored in memory.Type: GrantFiled: December 3, 2009Date of Patent: November 12, 2013Assignee: NXP, B.V.Inventor: Xavier Chabot
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Patent number: 8583880Abstract: A method for secure data reading and a data handling system is provided. The method protects the data reading from fault attacks by repeating read request in an interleaved manner, in particular the method comprises the steps of (M200) dispatching a first read request; (M400) dispatching a second read request; (M600) dispatching a further first read request; and (M1000-a) producing an anomaly signal if a first result produced by the memory in response to the first read request does not agree with a further first result produced by the memory in response to the further first read request.Type: GrantFiled: April 29, 2009Date of Patent: November 12, 2013Assignee: NXP B.V.Inventors: Mathias Wagner, Ralf Malzahn
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Patent number: 8579195Abstract: A reconfigurable radio-frequency front-end 20 with an antenna 24 and a resonant circuit within a matching network 22. In order to provide for high tuning range with low cost and low size, a matching network 22 may comprise at least one electrically tunable passive solid-state dielectrical component 6 on a carrier substrate 2.Type: GrantFiled: August 6, 2009Date of Patent: November 12, 2013Assignee: NXP B.V.Inventors: Markus Petrus Josephus Tiggelman, Klaus Reimann
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Patent number: 8578033Abstract: A media stream is transmitted from a server device to a client device. The client device (10) transmits set-up request messages (43a), discovery messages (44b) and a play command message (45a). The server receives versions of the set-up request messages (43b), the discovery message (44b) and the play message (45b) with matching identifier in the payloads of the messages. The server device (12) receives the discovery messages (44b) on a predetermined port and stores information recording that the discovery messages (44b) have been received, at least when no corresponding set-up request message 43b has been received before. The server device (12) compares the identifiers from the received set up request message (43b) and the discovery message (44b) according to the information recording reception, at least when the discovery message (44b) has been received before the set-up request message (43b).Type: GrantFiled: September 7, 2010Date of Patent: November 5, 2013Assignee: NXP, B.V.Inventor: Raoul Mallart
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Patent number: 8576603Abstract: Method for conversion of a Flash memory cell on a first semiconductor device to a ROM memory cell in a second semiconductor device, the first and second semiconductor device each being arranged on a semiconductor substrate and each comprising an identical device portion and an identical wiring scheme for wiring the device portion to the Flash memory cell and to the ROM memory cell, respectively; the Flash memory cell being made in non-volatile memory technology and comprising an access transistor and a floating transistor, the floating transistor comprising a floating gate and a control gate; the ROM memory cell being made in a baseline technology and comprising a single gate transistor, which method includes manipulating a layout of at least one baseline mask as used in the baseline technology; the manipulation including: incorporating into the layout of the at least one baseline mask a layout of the Flash memory cell, and converting the layout of the Flash memory cell to a layout of one ROM memory cell by eType: GrantFiled: November 8, 2005Date of Patent: November 5, 2013Assignee: NXP, B.V.Inventors: Rob Verhaar, Guido J. M. Dormans, Maurits Storms, Roger Cuppens, Frans J. List, Robert H. Beurze
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Patent number: 8578104Abstract: A multiprocessor system has a background memory and a plurality of processing elements, each comprising a processor core and a cache circuit. The processor cores execute programs of instructions and the cache circuits cache background memory data accessed by the programs. A write back monitor circuit is used to buffer write addresses used for writing data by at least part of the processor cores. The programs contain commands to read the buffered write back addresses from the write back monitor circuit and commands from the programs to invalidate cached data for the write back addresses read by the commands to read the buffered write back addresses. Thus cache management is performed partly by hardware and partly by the program that uses the cache. The processing core may be a VLIW core, in which case instruction slots that are not used by the program can be made useful to include instructions for cache management.Type: GrantFiled: June 9, 2009Date of Patent: November 5, 2013Assignee: NXP, B.V.Inventors: Jan Hoogerbrugge, Andrei Sergeevich Terechko
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Patent number: 8577047Abstract: A loudspeaker drive circuit comprises a signal path compressor/limiter (12) for implementing a change to the peak-mean amplitude ration in the time domain. A feedforward control loop measures an acoustic quality of the signal at the output of a control loop compressor/limiter (20) or the output of the signal path compressor/limiter (12), and also estimates a loudspeaker excursion based on the signal at the output of the control loop compressor/limiter (20). The signal path compressor/limiter is controlled based on the acoustic quality measurement and excursion estimation. The invention provides a method for the maximisation of the acoustic output of a loudspeaker by adjusting the characteristics of a compressor/limiter, with the constraint that the audio quality stays acceptable, and that the diaphragm displacement does not exceed a certain threshold.Type: GrantFiled: January 24, 2011Date of Patent: November 5, 2013Assignee: NXP B.V.Inventor: Temujin Gautama
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Publication number: 20130290735Abstract: A public key architecture (160) includes a dual certificate hierarchy which facilitates two independent authentication functions. One of the authentication functions authenticates an authentication device (164) to a verification device (166). The other authentication function authenticates a configuration device (162) to the authentication device (164). In some embodiments, the authentication process uses a lightweight certificate formed in conjunction with a lightweight signature scheme (370).Type: ApplicationFiled: August 22, 2011Publication date: October 31, 2013Applicant: NXP B.V.Inventor: Peter Maria Franciscus Rombouts