Patents Assigned to NXP
  • Patent number: 8564202
    Abstract: A LED package includes a LED die, and a memory device. The memory device is arranged for holding LED data information for driving the LED die. A LED driver arrangement includes a LED package as described above, a LED driver device and a microcontroller. The microcontroller is connected to the memory device for accessing the LED data information for driving the LED die and to the LED driver for sending an output flux settings signal. The LED driver device is connected to the LED die for providing a driving signal to the LED die, the driving signal being based on the output flux in package settings signal from the microcontroller.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Gilles Ferru, Jacques Le Berre
  • Patent number: 8564287
    Abstract: An MR sensor arrangement is integrated with an IC. A metal layer of the IC structure (e.g. CMOS) is patterned to define at least first and second contact regions. Metal connecting plugs are provided below the first and second contact regions of the metal layer for making contact to terminals of the integrated circuit. A magnetoresistive material layer is above the metal layer and separated by a dielectric layer. Second metal connecting plugs extend up from the metal layer to an MR sensor layer. The sensor layer is thus formed over the top of the layers of the IC structure.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Frederik Willem Maurits Vanhelmont, Mark Isler, Andreas Bernardus Maria Jansman, Robertus Adrianus Maria Wolters
  • Patent number: 8564377
    Abstract: A piezoresistive MEMS oscillator uses an output circuit to control the voltage across the resonator body. This results in a DC bias of the resonator. A current path is provided between the output of the output circuit and the resonator body, such that changes in current through or voltage across the resonator body, resulting from changes in resistance of the resonator body, are coupled to the output. This arrangement uses the bias current flowing through the resonator to derive the output. In this way, the same DC current is used to provide the required DC resonator bias and to drive the output circuit to its DC operating point.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Petrus Antonius Thomas Marinus Vermeeren, Jozef Thomas Martinus van Beek
  • Patent number: 8564985
    Abstract: A voltage converter comprises at least two capacitive charge pump stages, each comprising a capacitor, a charging switch through which a capacitor charging current is adapted to flow, and a control circuit for controlling the charging switch. wherein the control circuit for at least one charge pump stage comprises current limiting means for limiting the current through the charging switch. By limiting the current flowing through the switch, current spikes are avoided, which reduces high frequency distortion.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventor: Bram van Straaten
  • Patent number: 8564977
    Abstract: A method of operating a resonant power supply in standby mode is disclosed, in which the switching period of the power supply is longer than the resonance period. The power converter is operated in normal mode for a significant fraction of one resonance period. Efficient operation is maintained, despite the switching period being extended beyond the resonance period, by using resonance current to enable soft switching, where this is beneficial, and dumping the resonance current into the load where this is more beneficial. Control methodologies to regulate the output power are also disclosed.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventor: Hans Halberstadt
  • Patent number: 8566656
    Abstract: A test interface circuit operates with different types of core circuits. As consistent with various embodiments, the test interface circuit includes a test input register (TIR) configured to select an operating mode and a plurality of test point registers (TPRs). Each TPR is configured to control signals passed from the input port to a mixed-signal core circuit, responsive to the received test input signals and the operating mode selected by a TIR. In a static mode, each TPR provides serial access to digital inputs and outputs of a mixed-signal core circuit. In a bypass mode, each TPR bypasses TPR slices to preserve test time in response to the TPR being chained to other ones of the TPRs during integration of at least two mixed-signal cores.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Vladimir Aleksandar Zivkovic, Frank van der Heijden, Geert Seuren, Steven Oostdijk, Mario Konijnenburg
  • Patent number: 8565549
    Abstract: A contrast enhancement method for an image includes extracting at least one sub-band image from the image, comprising detail information at a predetermined spatial scale; determining a first gain value for each pixel, based on pixel values of the image or the at least one sub-band image; determining a second gain value for each pixel; modifying the first gain value for each pixel using the respective second gain value; and generating an enhanced image by applying the modified first gain values to respective pixels of one or more sub-band images and combining the result with the image. Determining the first gain value for each pixel comprises: estimating a dynamic range of the pixel values in a neighbourhood of that pixel; and setting the first gain value in inverse relation to the dynamic range.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventor: Andre Leitao
  • Patent number: 8566683
    Abstract: Various embodiments relate to a storage unit and a related method in a Viterbi decoder for decoding a binary convolutional code with power efficiency. A storage unit for storing survivor paths may use a register exchange method to append additional information received from an add-compare-select unit onto the end of the survivor path. An exemplary method produces a prediction path after a specified depth in the survivor path processing history and subtracts the prediction path from the survivor path. This may cause a majority of bits that comprise the survivor path to be converted to a low-energy bit, such as a logical “0”. During subsequent copies of a differential survivor path using the register exchange method, less energy is consumed when copying the entire survivor path, as a majority of the bits in the survivor paths are a logical “0”.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 22, 2013
    Assignee: NXP, B.V.
    Inventors: Andries Pieter Hekstra, Weihua Tang
  • Patent number: 8564367
    Abstract: The invention relates to improving the performance of load modulation power amplifiers through the use of coupled transmission line-based power combiners. Exemplary embodiments disclosed include a power amplifier comprising an input connected to first and second amplifier stages and an output stage configured to combine phase shifted amplified outputs from the first and second amplifier stages and to provide an amplified signal at an output of the power amplifier, wherein the output stage comprises coupled first and second transmission lines connected between the output of the first amplifier stage and an output load connection.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP, B.V.
    Inventor: Iordan Konstantinov Svechtarov
  • Patent number: 8566632
    Abstract: Various embodiments relate to a network receiver using distributed clock synchronization. The network receiver may include a first timing engine that samples bits received by the receiver with a first clock having a first clock frequency (f1) with a first clock frequency tolerance (?f1), and a second timing engine that samples bits received by the receiver with a second clock having a second clock frequency (f2) with a second clock frequency tolerance (?f2). The second clock frequency is less than the first clock frequency. The network receiver may also include a third timing engine that samples bits received by the receiver with a third clock having a third clock frequency (f3) with a third clock frequency tolerance (?f3). The third clock frequency may be greater than the first clock frequency.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: October 22, 2013
    Assignee: NXP B.V.
    Inventors: Rolf van de Burgt, Bernd Elend
  • Publication number: 20130271268
    Abstract: A method for controlling a controlled device is disclosed, wherein the controlled device has a host connection to an RFID tag, the method comprising the following steps: (s1) the controlled device writes operational parameters to the RFID tag through the host connection; (s2) a user interaction device reads the operational parameters from the RFID tag through an RFID connection; (s3) a user changes the operational parameters via a user interface comprised in the user interaction device; (s4) the user interaction device writes the operational parameters to the RFID tag through the RFID connection; (s5) the controlled device reads the operational parameters from the RFID tag through the host connection and adapts its behavior based on the operational parameters. Furthermore, a corresponding controlled device, a user interaction device and a computer program product are disclosed.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 17, 2013
    Applicant: NXP B.V.
    Inventors: Ewout Brandsma, Timotheus Arthur van Roermund, Maarten Christiaan Pennings
  • Publication number: 20130271214
    Abstract: A 3-level class D amplifier circuit comprises a first comparator for comparing an input with a first triangular reference and a second comparator for comparing the input with a second triangular reference. A phase relationship between the signals to the first comparator is 180 degrees shifted relative to a phase relationship between the signals to the second comparator. An amplifier stage generates a three-level PWM output signal using the outputs of the first and second comparators. A shared feedback path is used from the three-level PWM output signal.
    Type: Application
    Filed: March 21, 2013
    Publication date: October 17, 2013
    Applicant: NXP B.V.
    Inventor: Gertjan VAN HOLLAND
  • Publication number: 20130271099
    Abstract: A controller for a voltage regulator is disclosed. The controller is switchable between first and second modes of operation in which the controller is adapted to control the regulator to operate in switching and linear modes respectively. The controller is further adapted to respond to an input voltage to the voltage regulator to enter a third mode of operation in which the input voltage is coupled directly to an output terminal.
    Type: Application
    Filed: April 2, 2013
    Publication date: October 17, 2013
    Applicant: NXP B.V.
    Inventor: Kim LI
  • Patent number: 8559577
    Abstract: The invention relates to a method and an apparatus (1) for the timing of signals (2), preferably of signals (2) including fast changing disturbances, the apparatus (1) comprising a first timer (3) and a second timer (4), the first timer (3) is characterised by a first decay time (5) and first attack time (5) and the second timer (4) is characterised by a second decay time (6) and second attack time (6), the second attack time and the second decay time are faster than the first attack time and the first decay time and wherein an input signal (2) will be treated in parallel by the first timer (3) and second timer (4).
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventors: Hein van den Heuvel, Gertjan Groot Hulze
  • Patent number: 8559890
    Abstract: A transceiving circuit (1, 1?, 1?) for contactless communication comprises transmitter means (3) being adapted to generate an electromagnetic carrier signal and to modulate the carrier signal according to transmitting data, and an antenna (5) having an inductor (Lant), which antenna (5) is connected to and driven by the transmitter means (3) with the modulated carrier signal. AC coupling capacitors (C4) are coupled to the inductor (Lant) of the antenna (5), wherein the AC coupling capacitors (C4) are further connected to inputs of switches (S1, S2). The outputs of these switches (C4) can be switched between ground potential and inputs of rectifier means (6). The outputs of the rectifying means (6) are fed to power supply rails (PbF1, PbF2) of the transceiving circuit (1).
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventor: Erich Merlin
  • Patent number: 8559483
    Abstract: Various embodiments relate to a method of determining the presence of a spread spectrum signal, including: receiving N input samples of a signal; performing a first autocorrelation on the N input samples with a first offset; performing a second autocorrelation on the N input samples with a second offset; performing a third autocorrelation on the N input samples with a third offset; performing a fourth autocorrelation on the N input samples with a fourth offset; performing a fifth autocorrelation on the N input samples with a fifth offset; determining if the values of the first, second, and third autocorrelations are decreasing, and determining if the values of the fourth and fifth autocorrelations are less than a threshold value, then determining that a spread spectrum signal is present in the N input samples.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventor: Stefan Drude
  • Patent number: 8559555
    Abstract: A method of acquiring a received spread spectrum signal comprises receiving a spread spectrum signal, analyzing the received signal to detect interference within the received signal, and adapting the baseband processing of the received signal to reduce power consumption during periods of detected interference. This allows the GPS processing resources to be focussed on areas of signal where there is little or no interference, and this is possible without modification to the source of interference. The interference is detected from an analysis of the received signal, and in particular before the baseband digital signal processing.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventors: Andrew T. Yule, Bryan D. Young, Johan Peeters
  • Patent number: 8559903
    Abstract: An automatic gain control circuit is provided for an input signal in the form of a dc reference level and a superposed amplitude modulated ac data signal. A feedforward AGC loop has a low pass filter for deriving the level of attenuation from the attenuated dc reference level. A multiplier value (G) is based on the reciprocal of the level of attenuation (?) and this multiplier enables an output signal to be generated comprising a constant multiple (DG) of the input signal.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventors: Henk Ten Pierick, Gertjan Groot Hulze, Erik Keukens
  • Patent number: 8559751
    Abstract: The present invention provides an improved method and device for digital motion blur removal by using motion information extracted from a sequence of images captured immediately before the image to be corrected was captured. In particular, the invention includes estimating (56) motion information of the previous sequence of images and analyzing them based on motion estimation techniques and then extrapolating (58) the motion of the image to be corrected based on the motion estimation in order to remove (62) the motion blur effects in the desired captured image. The various types of devices which may implement the method of the present invention will thereby display (64) blur free digital images.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventor: Jean Gobert
  • Patent number: 8558213
    Abstract: A vertical phase change memory cell (2) has an active region (24) of phase change memory material defined either by providing a contact extending only over part of the phase change memory material or an insulating layer exposing only part of the phase change memory material. There may be more than one active region (24) per cell allowing more than one bit of data to be stored in each cell.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: October 15, 2013
    Assignee: NXP B.V.
    Inventor: Ludovic R. A. Goux