Abstract: A variety of edge-detection related devices, methods and systems are implemented in various fashions. One implementation is directed to an edge detector circuit for detecting an edge of an input signal and producing an output level-sensitive signal that is synchronous to a clock signal having an active edge corresponding to a transition from a first-signal level to a second-signal level. A first flip-flop has the input signal as a clock input and produces an internal level-sensitive signal and is reset by the output level-sensitive signal. Logic passes the level-sensitive signal when the clock signal is at the second-signal level and blocks the internal level-sensitive signal when the clock signal is at the first-signal level. A second flip-flop is set by the passed internal level-sensitive signal to produce the output level-sensitive signal. The second flip-flop is cleared in response to the output level-sensitive signal, a reset input and the clock signal.

Abstract: A clock signal generator comprising an input pin for receiving an oscillating signal and an output pin for providing a clock signal. The clock signal generator also comprises a frequency divider connected between the input pin and the output pin. The frequency divider having a plurality of frequency division factors associated therewith, wherein, in use, the frequency divider is configured to apply one of the plurality of frequency division factors as an in-use frequency division factor to the oscillating signal in order to generate the clock signal. The clock signal generator further comprising a controller configured to periodically replace the in-use frequency division factor with another of the plurality of frequency division factors.

Abstract: A device, e.g., a hearing aid, has an electronic circuit for wireless communication of a digital signal. The circuit has a driver driving an RLC tank. The driver has a plurality of inverters whose outputs are coupled to a node of the coil via a respective one of multiple capacitors in the tank. The circuit has a controller that selectively drives one or more of the inverters with the digital signal and connects the inputs of the other inverters to a supply voltage or ground. The tank has a further plurality of series arrangements of a further capacitor and a high-voltage switch connected between the node and ground. The controller is configured for controlling the high-voltage switches.

Abstract: A sensing circuit (100) for sensing the content of a memory cell (101), wherein the sensing circuit comprises a sense node (103) connectable to the memory cell (101) so that a signal indicative of the content of the memory cell (101) is providable to the sense node (103). The sensing circuit (100) further comprises a logic gate (102) having a first input, a second input and an output, wherein a reference signal (105) is providable to the first input and wherein the sense node (103) is coupled to the second input. The sensing circuit (100) further comprises a feedback loop (104) for coupling the output of the logic gate (102) to the second input of the logic gate (102) so that, during sensing the content of the memory cell (101), an electrical potential at the sense node (103) is used to make a decision but after a result is obtained, the memory and sense amplifier combination are configured so that the result is held indefinitely and so that no static current continues to flow.

Abstract: An interconnect structure on a substrate is provided. The interconnect structure comprises electrically conductive interconnect elements on at least two interconnect levels on or above a substrate level. In the interconnect structure of the invention, at least one electrically conductive via connects a first interconnect element on one interconnect level or on the substrate level to a second interconnect element on a different interconnect level. The via extends in a via opening of a first dielectric layer and comprises an electrically conductive via material that contains electrically conductive cylindrical carbon nanostructures. At least one cover-layer segment reaches into a lateral extension of the via opening and defines a via aperture that is small enough to prevent a penetration of the carbon nanostructures through the via aperture. This structure enhances control of carbon nanostructure growth in a height direction during fabrication of the interconnect structure.

Abstract: A MEMS multiaxial inertial sensor of angular and linear displacements, velocities, or accelerations has four comb drive capacitive sensing elements integrated on a planar substrate, each sensing element having an output responsive to displacement along a Z axis, and responsive to a displacement along X or Y axes. The sensing elements are located at different parts of the substrate on both sides of the X axis and the Y axis, the outputs being suitable for subsequently deriving linear and angular displacements about any of the X, Y or Z axes. Linear or angular movement is determined from combinations of the sensor signals.

Abstract: Proximity sensor, particularly for usage in an electronic mobile device, comprising at least one acoustic transducer adapted for receiving acoustic signals at least in parts of the frequency range of human audible sound and emitting and/or receiving ultrasonic signals for proximity estimation. The acoustic transducer preferably is a Micro-Electro-Mechanical-Systems (MEMS) microphone. Further, a method in an electronic device comprising an acoustic transducer is provided comprising the steps of generating at least one electric signal in the frequency range of ultrasonic sound, emitting at least one ultrasonic signal by means of the acoustic transducer; receiving at least one ultrasonic signal by means of the acoustic transducer; deducing from the at least one emitted ultrasonic signal and the at least one received ultrasonic signal at least the delay between emission of the emitted ultrasonic signal and reception of the corresponding ultrasonic signal.

Abstract: A method for storing or reading data in a memory array of a transponder and a corresponding transponder, read/write device and program element is described. Therein, a data structure for storing data within the memory array is defined by a predetermined protocol. The data structure comprises: a header data block including predefined header data; an application data block for storing application data; and a terminator data block for indicating that, in accordance with the predetermined protocol, no data are stored within the memory array behind the terminator data block. The method for storing data comprises storing additional application data within the memory array behind the terminator data block.

Abstract: Disclosed is a frame synchronizing device and method for a binary data transmission system wherein digital data are transmitted as a serial bit stream organized into frames, each frame including a pre-defined frameheader, wherein said serial bit stream is inputted into a serial input portion of a serial input parallel output shift register means having at least as many stages as the number of bits of a frame, and said frames are outputted in a consecutive order from a parallel output portion of said shift register means. The particularity of the present invention is that it is detected whether or not a frameheader is present in the output of said parallel output portion, and, if not, the outputting of a frame from said parallel output portion is delayed by at least one time period which is needed for shifting a bit in said serial input portion from a stage to a next one, until synchronization is reached.

Abstract: In a circuit for a data carrier, which data carrier comprise a sensor that is designed for providing a sensor signal that represents an environment parameter and a communication element that is designed for the contact-less communication with an interrogator station, first connection elements for connecting the circuit to the communication element and second connection elements for establishing an electronic connection of the circuit to the sensor are provided, wherein the second connection elements are realized by the first connection elements and wherein the circuit comprises a sensor signal processing stage designed for receiving said sensor signal via the first connection element and for processing said received sensor signal.

Abstract: A last fourier transform architecture has parallel data processing paths. Input data is applied to the parallel data processing paths in a repeating sequence, and processed in those paths. Data sequencers are used to combine the outputs from the data processing paths into the required sequence.

Abstract: Semiconductor device with a patterned pad metal layer and a patterned under-bump metallization layer being mutually electrically connected in a common contact area 22. The semiconductor device includes a first test structure 11 for determining a contact resistance between the patterned metallization layer and the patterned pad metal layer in the common contact areas 22. The first test structure includes a pad metal layer portion 24 and a metallization layer portion 18 being in electrical communication with the pad metal layer portion 24 through the common contact area 22. The first test structure 11 further includes connection areas 14, 16 that are electrically connected with each other substantially via the common contact area 22. Upon application of a current between the connection areas 14, 16 a voltage drop occurs that is representative for a voltage drop over the common contact area 22.

Abstract: The present invention relates to a configurable trench multi-capacitor device comprising a trench in a semiconductor substrate. The trench has a lateral extension exceeding 10 micrometer and a trench filling includes a number of at least four electrically conductive capacitor-electrode layers. A switching unit is provided that comprises a plurality of switching elements electrically interconnected between different capacitor-electrode layers of the trench filling. A control unit is connected with the switching unit and configured to generate and provide to the switching unit respective control signals for forming a respective one of a plurality of multi-capacitor configurations using the capacitor-electrode layers of the trench filling.

Abstract: A includes a shaft having a length, a first end, and a second end; the second end has an oblique reflective surface defined thereon; the first end fixedly attached to the knob. Containing the shaft is a rotation body, having a receptacle to accommodate the second end of the shaft with the oblique reflective surface exposed. An integrated circuit optical module is optically coupled to the rotation body. The optical module detects a light irradiance profile from the oblique reflective surface and includes a solid state light source and a plurality of photo detectors which generate an electrical signal upon exposure to light. As the knob is rotated, the oblique reflective surface generates a changing asymmetric irradiance profile, the change being translated into an electrical signal via the photo detectors, which signal corresponds to the degree of rotation of the knob.

Abstract: The present invention provides a means to integrate planar coils on silicon, while providing a high inductance. This high inductance is achieved through a special back- and front sided shielding of a material. In many applications, high-value inductors are a necessity. In particular, this holds for applications in power management. In these applications, the inductors are at least 5 of the order of 1 ?H, and must have an equivalent series resistance of less than 0.1?. For this reason, those inductors are always bulky components, of a typical size of 2×2×1 mm 3, which make a fully integrated solution impossible. On the other hand, integrated inductors, which can monolithically be integrated, do exist. However, these inductors suffer either from low inductance values, or 10 very-high DC resistance values.

Abstract: An adaptive equalizer comprises an adjustable equalizer circuit that allows to enhance the frequency dependence of contents of the transmitted signals which suffer from losses in the connected transmission channel. A blind equalization tuning procedure is proposed that operates without knowledge about the characteristic of transmission channel. Phase positions of transitions in the equalized signal are detected. A digital post-processing circuit evaluates a measure for spread of the detected phase positions of transitions, accumulated over a plurality of the symbol periods. The digital post-processing circuit controls the adjustable equalizer, setting the adjustable equalizer to a setting wherein the detected spread is minimized.

Abstract: The invention provides a magnetic field sensor or current sensor which can exhibit a substantially linear relationship between the sensor signal and the logarithm of the magnetic field or current. The sensor may be used as a wide dynamic range sensor which can offer a constant relative sensitivity and a uniform SNR over several decades. The design of the sensor device may be implemented in discrete magnetic field sensors or current sensors as well as in integrated current sensors in ICs comprising MRAM modules.

Abstract: The present invention relates to method for fabricating a dual-orientation group-IV semiconductor substrate and comprises in addition to performing a masked amorphization on a DSB-like substrate only in first lateral regions of the surface layer, and a solid-phase epitaxial regrowth of the surface layer in only the first lateral regions so as to establish their (100)-orientation. Subsequently, a cover layer on the surface layer is fabricated, followed by fabricating isolation regions, which laterally separate (11?)-oriented first lateral regions and (100)-oriented second lateral regions from each other. Then the cover layer is removed in a selective manner with respect to the isolation regions so as to uncover the surface layer in the first and second lateral regions and a refilling of the first and second lateral regions between the isolation regions is performed using epitaxy.

Abstract: A system and method provide adaptive filtering of radio frequency (RF) signals. Multiple signals are received in a predetermined RF spectrum, the signals including a desired signal and multiple potentially interfering signals. A first signal of the potentially interfering signals is down-converted to a baseband signal, and a power of the baseband signal is determined. When the power exceeds a predetermined threshold power, a first notch filter, corresponding to a frequency of the first signal, is activated.

Abstract: A semiconductor device and a method for manufacturing such semiconductor device for use in a stacked configuration of the semiconductor device are disclosed. The semiconductor device includes a substrate including at least part of an electronic circuit provided at a first side thereof. The substrate includes a passivation layer and a substrate via that extends from the first side to a via depth such that it is reconfigurable into a through-substrate. The semiconductor device further includes a patterned masking layer on the first side of the substrate. The patterned masking layer includes a trench extending fully through the patterned masking layer. The trench has been filled with a redistribution conductor. The substrate via and the redistribution conductor include metal paste and together form one piece, such that there is no physical interface between the through-substrate via and the redistribution conductor. Thus, the parasitic resistance of this electrical connection is reduced.