Abstract: MIFARE applications (MIA) are organized in at least one sector comprising sector data being arranged in data blocks and a sector trailer. A compressing method for MIFARE application comprises: searching for consecutive occurrences of same data values in the sector data and replacing the detected consecutive data having the same data value by a sequence comprising said data value and a number indicating the number of consecutive sector data having that data value; and/or searching for all different sector trailer values and replacing all sector trailers by references to respective ones of the different sector trailer values.

Abstract: A method of controller an AC/DC to converter is disclosed, the converter having a power factor correction stage and a signal indicative of a required power and operating with a switching cycle having a switching frequency being the inverse of a switching period. The method comprises switching on the PFC stage, in response to a signal indicative of an average switching frequency rising above a first threshold. The method further comprises switching off the PFC stage, in response to the signal indicative of an average switching frequency falling below a second threshold. The method may further comprise switching on the PFC stage, in response to a positive step change in the signal indicative of a required power, and switching off the PFC stage, in response to indicative step change in the signal indicative of a required power. A controller and an AC/DC converter operable according to such a method are also disclosed as is an LED lighting system comprising such a controller.

Abstract: Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.

Abstract: A MEMS device, such as a microphone, uses a fixed perforated plate. The fixed plate comprises an array of holes across the plate area. At least a set of the holes adjacent the outer periphery comprises a plurality of rows of elongate holes, the rows at different distances from the periphery. This design improves the mechanical robustness of the membrane and can additionally allow tuning of the mechanical behaviour of the plate.

Abstract: A lighting system uses interior and exterior light sensors for detecting lighting level and colour. A lighting unit has a controlled colour and intensity so that a colour match zone can be defined where the interior space lighting has colour temperature based on the exterior lighting conditions.

Abstract: A crystalline semiconductor resonator device comprises two matched resonators which are aligned differently with respect to the crystal structure of the crystalline semiconductor. The resonators each comprise a portion of a material having a different temperature dependency of the Young's modulus to the temperature dependency of the Young's modulus of the crystalline semiconductor material. In this way, the suspension springs for the resonators have different properties, which influence the resonant frequency. The resonant frequency ratios between the first and second resonators at a calibration temperature and an operation temperature are measured. A frequency of one (or both) of the resonators at the operation temperature can then be derived which takes into account the temperature dependency of the one of the resonators.

Abstract: The invention, which relates to a method for the generation of beacons by a base station in a wireless communications network, consisting of at least one base station and at least one station, the beacons being generated repeatedly at time intervals, is based on the object of specifying a method with which the generation of the beacons can be tailored to needs, achieving a reduction of the energy demand and the emissions, and an improvement in the security. According to the invention, the object is achieved in that the generation of the beacons is started with a switching on of the base station and is ended after the expiry of a wait time tw0 in the event that no station is connected to the base station, and in that the generation of the beacons is started by a receipt of a probe request from a station of the communications network and is ended after the expiry of a wait time tw1 in the event that no station is connected to the base station.

Abstract: The invention refers to a Doherty power amplifier comprising a first power amplifier (Main PA) adapted to receive an input signal and adapted to provide a first output signal which is phase shifted with respect to the input signal. The amplifier further comprises a second power amplifier (Peak PA), adapted to receive a phase shifted input signal and adapted to provide a second output signal. The power amplifier is characterized in that at least one of the first or the second power amplifiers comprises a first driver power amplifier (T1) comprising a first gate input and a first drain output. The first driver power amplifier (T1) is coupled to a first output power amplifier (T2) comprising a second gate input and a second drain output. The first gate input and the second gate input are adapted to receive a control signal, the control signal being obtained after an envelope detection provided by an envelope detector coupled to the input signal.

Abstract: A data writing/reading method, a de-interleaving method, a data processing method, a memory, and a memory drive are provided whose costs are reduced. When a plural data interleaved in transmitter (100) are written in memory (110a) of receiver (110), the write direction is alternatively changed to row direction and column direction.

Abstract: The present invention relates to a discharge structure for an overvoltage and/or overcurrent protection, in particular to a discharge structure for an electrostatic discharge (ESD) protection, for an integrated circuit (IC), and to an ESD protection device for an IC comprising such a discharge structure and to a method for making such a structure. The present invention particularly relates to such a discharge structure (50, 52) which comprises at least two discharge paths (40, 80) provided to conduct a current to a terminal (60), whereas substantially all of the discharge paths (40, 80) present substantially the same resistance for the current.

Abstract: The invention relates to a system for transmitting data from a medium access control device (2) via a digital interface (IF1) to a physical layer (PHY) and to an antenna (5), the physical layer (PHY) comprising a base band (4) with a base band controller (7) and a data processing pipeline (3) comprising a plurality of functional blocks (FB1 to FB 13), wherein a burst timing control block of one of all functional blocks (FB1 to FB 13) of the data processing pipeline (3) detects an end of a packet of payload data and, thereupon, sets a halt signal (STALL) for those functional blocks (FB1 to FB 13) preceding the burst timing control block (FB1 to FB 13) in the data processing pipeline (3) and starts a timer (T1) for counting a duration of a minimum inter-frame space (MIFS), wherein the burst timing control block (FB1 to FB 13) resets the halt signal (STALL) after expiration of the timer (T1). It also relates to a corresponding method.

Abstract: A method of tuning an antenna is provided, wherein the method comprises receiving a first signal strength indicator indicating a signal strength of a first data signal transmitted by an antenna on a first frequency, receiving a second signal strength indicator indicating a signal strength of a second data signal transmitted by the antenna on a second frequency different to the first frequency, determining a tuning control signal based on the first signal strength indicator and the second signal strength indicator, and tuning the antenna based on the control signal.

Abstract: A sample-and-hold amplifier (400) having a sample phase of operation and a hold phase of operation. The sample-and-hold amplifier comprising one or more sampling components (404, 406) configured to sample input signals during the sample phase of operation, and provide sampled input signals during the hold phase of operation, and an amplifier (402) configured to pre-charge the output (416, 418) of the sample-and-hold amplifier (400) during the sample phase of operation, and buffer the sampled input signal during the hold phase of operation.

Abstract: A Trusted Service Manager (TSM) receives via a first communication channel from a Service Provider (SP) a request (REQ(MIA)) that contains an application (MIA) together with a unique identifier of a mobile phone (MOB), particularly its telephone number. The mobile phone (MOB) is equipped with a memory device (MIF) that comprises multiple memory sectors being protected by sector keys. Preferably the memory device (MIF) is a MIFARE device. The TSM extracts the application (MIA) and the unique identifier from the received request, assigns destination sector(s) and associated sector key(s) of the memory device (MIF), compiles the application (MIA), the sector key(s) and the sector number(s) of the destination sector(s) into a setup-message (SU(MIA)), encrypts the setup-message and transmits it to either the mobile phone via a second communication channel or the Service Provider via the first communication channel (CN).

Abstract: Aspects of the disclosure are directed to a system having a particularly-configured microcontroller. In one embodiment, the microcontroller includes the following: a processor; a processor data bus connected to the processor; a set of peripherals; a peripheral data bus connected to the peripherals; a peripheral bus bridge providing an interface between the processor data bus and the peripheral data base and including a plurality of special function register bank blocks that are internal to the microcontroller, each register bank block having a respective output; and a register bank block decoder circuit for decoding interrupts to provide a selection output for activation of one of the plurality of register bank blocks.

Abstract: Various exemplary embodiments relate to improved fabrication of CMOS transistor arrays for integrated circuits. Increased regularity in standard-cells using gate-isolation architecture may permit further reduction in feature size. MOSFETs may be spaced at roughly equal pitch and have increased channel lengths for leakage current reduction. Logic gates may be designed to have nominal channel lengths for speed and increased channel lengths for leakage current reduction. Further leakage current reduction may involve specialized channel lengths for isolation MOSFETs. Thus, the combination of the gate-isolation technique with MOSFETs having lengthened channels that are evenly spaced at substantially the same pitch may produce a flexible library architecture for improved standard-cell designs in advanced CMOS technology nodes.

Abstract: A drive circuit for delivering an AC voltage to an array of electro-luminescent lamps (8a to 8n) includes a single coil (1), the energy in which is transferred to each lamp through a corresponding switch assembly (10a to 10n) having positive and negative-going paths for conducting positive and negative voltages to the corresponding lamp. The magnitudes of the voltages applied to the parallel-connected lamps are controllable so that the illumination levels of the lamps are individually adjustable.

Abstract: The present invention relates to a FinFET with separate gates and to a method for fabricating the same. A dielectric gate-separation layer between first and second gate electrodes has an extension in a direction pointing from a first to a second gate layer that is smaller than a lateral extension of the fin between its opposite lateral faces. This structure corresponds with a processing method that starts from a covered basic FinFET structure with a continuous first gate layer, and proceeds to remove parts of the first gate layer and of a first gate-isolation layer through a contact opening to the gate layer. Subsequently, a replacement gate-isolation layer that at the same time forms the gate separation layer fabricated, followed by filling the tunnel with a replacement gate layer and a metal filling.

Abstract: A method for providing an integrated circuit such that first and second sensing electrodes respectively have at their surfaces first and second receptor molecules for selectively binding to first and second analytes of interest; exposing the integrated circuit to a sample potentially comprising at least one of the first and second analytes, providing a first bead having a first electrical signature attached to a first molecule having a conformation/affinity for binding to the first sensing electrode dependent on the presence of the first analyte; providing a second bead having a second electrical signature attached to a second molecule having a conformation/affinity for binding to the second sensing electrode dependent on the presence of the second analyte; and determining the presence of the electrical signature of the first and/or second bead(s) on the first and second sensing electrodes respectively. An IC for implementing this method.

Abstract: A magnetic sensing system, including: a magnetic component proximate a movable mechanical component; and a magnetic sensor configured to determine a movement of the mechanical component based on a magnetic field produced by the magnetic component. The magnetic sensor includes: a low-offset magnetic sensing element; a high-sensitivity magnetic sensing element; and an offset compensation circuit configured to: determine a zero-crossing of a sensing field from an output of the low-offset magnetic sensing element; sample an offset value of the high-sensitivity magnetic sensing element at the zero-crossing; and subtract the offset value from an output of the high-sensitivity magnetic sensing element.