Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20) and a second metal portion (21); a passivation stack (24, 26, 28) covering the metallization stack; a gas sensor including a sensing material portion (32, 74) on the passivation stack; a first conductive portion (38) extending through the passivation stack connecting a first region of the sensing material portion to the first metal portion; and a second conductive portion (40) extending through the passivation stack connecting a second region of the sensing material portion to the second metal portion. A method of manufacturing such an IC is also disclosed.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20) and a second metal portion (21); a passivation stack (24, 26, 28) covering the metallization stack; a gas sensor including a sensing material portion (32, 74) on the passivation stack; a first conductive portion (38) extending through the passivation stack connecting a first region of the sensing material portion to the first metal portion; and a second conductive portion (40) extending through the passivation stack connecting a second region of the sensing material portion to the second metal portion. A method of manufacturing such an IC is also disclosed.

Abstract: A radio frequency (RF) communication device (1, 1?, 10) has data transmission means and data receiving means. The data transmission means comprise load modulating means (3) being adapted to receive a radio frequency carrier signal (CS1, CS2) emitted by another RF communication device (1, 1?, 10) and to modulate the RF carrier signal (CS1, CS2) by means of load modulation in accordance with data to be sent. The data receiving means comprise a RF frequency carrier signal generator (4) being adapted to emit a radio frequency carrier signal (CS1, CS2) and load demodulating means (5) being connected to an emission path (4a) of the radio frequency carrier signal and demodulating the radio frequency carrier signal (CS1, CS2) when it has been load modulated by another RF communication device (1, 1?, 10).

Abstract: An apparatus comprising at least one measuring cell (10) is disclosed. The measuring cell comprises a first cavity (16 and a second cavity (18) perpendicular to the first cavity, the first cavity and the second cavity comprising an overlap at first respective ends and a reflective surface (20) at the opposite respective ends. A beam splitter (15) is located in the overlap and an electromagnetic radiation source (12) is arranged to project a beam of electromagnetic radiation onto the beam splitter (15) such that the beam is projected into each of the cavities. A phase detector (22) for detecting a phase difference between the respective electromagnetic radiation reflected by the first and second cavity (16; 18) is also provided. In addition, the apparatus has a fluid channel (26), at least a part of which runs parallel to the first cavity (16) such that the electromagnetic radiation projected into the first cavity extends into said part of the fluid channel.

Abstract: An interference-tolerant transmitter is provided. In accordance with various example embodiments, a transmitter circuit includes a control circuit configured to maintain the sum of current as applied to a load from respective high-side and low-side current sources at a target level (e.g., range). In some applications, clamp circuits are used to clamp current to high and low sides of the load respectively in response to changes at the low-side and high-side of the load.

Abstract: A method of synchronizing multi-carrier systems is provided, wherein the method comprises inserting a predefined frequency domain signal into a signal on a transmitter side of a multi-carrier system and multi-carrier modulating the signal. Furthermore, the method comprises transmitting the multi-carrier modulated signal via a carrier channel to a receiving side of the multi-carrier system, and synchronizing the multi-carrier modulated signal by using the predefined frequency domain signal portion of the multi-carrier modulated signal.

Abstract: The invention relates to a filter device particularly for receiving television signals, which receives input signals and generates output signals, wherein the filter device forms a Nyquist slope by means of a passive polyphase filter (10).

Abstract: A system for amplifying a digital audio signal comprises a receiver 12 for receiving a digital audio signal, a level estimator 14 arranged to calculate the audio level of the digital audio signal, a gain control 16 arranged to receive a gain level, the gain level defining the desired amplification of the digital audio signal, a logic circuit 18 arranged to calculate the headspace in the digital audio signal and to divide the gain level into a scaling gain and an amplifier gain, the scaling gain not exceeding the calculated headspace, a digital signal processor 20 arranged to amplify the digital audio signal with the scaling gain, a digital-to-analogue converter 22 arranged to convert the amplified digital audio signal into an analogue signal, and an amplifier 24 arranged to amplify the analogue audio signal with the amplifier gain.

Abstract: The present invention relates to a method for fabrication of in-laid metal interconnects. The method comprises the steps of providing a substrate with a dielectric material on top thereof, depositing a protection layer on top of the dielectric material, depositing a sacrificial layer on top of the protection layer, the sacrificial layer having a mechanical strength that is lower than the mechanical strength of the protection layer, making an opening) through the sacrificial layer, through the protection layer and into the dielectric material, depositing a barrier layer in the opening and on the sacrificial layer, depositing metal material on the barrier layer, the metal material filling the opening, removing portions of the metal material existing beyond the opening by means of polishing, and removing the barrier layer and the sacrificial layer in one polishing step.

Abstract: An electronic device (100), comprises a first electrode (101), a second electrode (102) and a convertible structure (103) connected between the first electrode (101) and the second electrode (102), which convertible structure (103) is convertible between at least two states by heating, wherein the convertible structure (103) has different electrical properties in different ones of the at least two states, wherein the convertible structure (103) is curved in a manner to increase a length of a path of an electric current propagating through the convertible structure (103) between the first electrode (101) and the second electrode (102).

Abstract: The present invention relates to a LED lighting system (100) comprising at least a central controller (40) for just controlling a communication databus (50) in broadcast mode, and a distribution of LED controllers (30R, 30G, 30B) for individually controlling each LED (10R, 10G, 10B) through a respective driver (20R, 20G, 20B). The central controller (40) broadcasts targeted setting values from an external user (60) to all the distributed LED controllers (30R, 30G, 30B) through the databus (50). The LED controllers (30R, 30G, 30B) convert the values using a shared calibration matrix into transformed values for each LED color (R, G, B). In the case that some of these transformed values cannot be rendered by the LED lighting system (100), the targeted setting values can be properly adjusted either externally through a feedback signal sent over a link (70) back to the user (60), or internally through a notification signal broadcast over the databus (50) back to the central controller (40).

Abstract: The present invention relates to a manufacturing method of an integrated circuit (IC) comprising a substrate (10) comprising a pixelated element (12) and a light path (38) to the pixelated element (12). The IC comprises a first dielectric layer (14) covering the substrate (10) but not the pixilated element (12), a first metal layer (16) covering a part of the first dielectric layer (14), a second dielectric layer (18) covering a further part of first dielectric layer (14), a second metal layer (20) covering a part of the second dielectric layer (18) and extending over the pixelated element (12) and a part of the first metal layer (16), the first metal layer (16) and the second metal layer (20) forming an air-filled light path (38) to the pixelated element (12).

Abstract: Various embodiments relate to a bias generator including: a bias generator circuit; a master startup circuit that applies current to a first node in the bias generator circuit; a second startup circuit that applies current to additional nodes in the bias generator circuit; and a power switch that receives a power from a power supply and that provides power to the bias generator circuit, the master startup circuit, and the second startup circuit.

Abstract: A down-converter for receiving a multiband radio frequency signal (RF) and a local oscillator signal comprises a frequency divider and a heterodyne receive chain. The frequency divider is configured to divide the local oscillator signal and provide different divided local oscillator signals. The heterodyne receive chain comprises a first stage mixer and second stage mixers. The first stage mixer is configured to mix the multiband radio frequency signal and either the local oscillator signal or a divided local oscillator signal to generate a first intermediate frequency signal. Each second stage mixer is configured to mix the first intermediate signal and a divided local oscillator signal to generate second intermediate frequency signals that each represent a band from the multiband radio frequency signal. The frequency divider is configured to provide a different divided local oscillator signal to each of the second stage mixers.

Abstract: A digital phase locked loop (300) configured to receive a reference clock signal (302) and a channel control word (308), and to generate an output clock signal (304). The digital phase locked loop comprising an adjustable delay component (306) configured to: receive the reference clock signal (302), apply a time delay to the reference clock signal (302) in accordance with a time delay control signal (316); and provide a delayed reference clock signal (318).

Abstract: A method for reconstructing a color image from a sensor which comprises a plurality of pixels arranged in a matrix of rows and columns is provided. The sensor is provided with a color filter array such that each pixel corresponds to one of three basic colors. The three basic colors are provided on the sensor in a predetermined pattern. The sensor outputs a detected value for each of the plurality of pixels. The method comprises the steps: for each of the plurality of pixels: accepting a detected value obtained for the corresponding one of the three basic colors and, for each of the respective two other basic colors, calculating a vertical interpolation value and a horizontal interpolation value and selecting either the vertical interpolation value or the horizontal interpolation value; outputting the accepted detected value and the selected interpolation values.

Abstract: A sub-stage for a charge pump includes a dc input pin, a dc output pin, a first radio frequency (rf) input pin configured to receive a first differential signal, a second rf input pin configured to receive a second differential signal, a first transistor having first, second and third terminals, a second transistor having first, second and third terminals, a first bias voltage source, and a second bias voltage source. The third terminal of the first transistor is configured to receive the second differential signal from the second rf input pin and a first offset voltage signal from the first bias voltage source. The third terminal of the second transistor is configured to receive the second differential signal from the second rf input pin and a second offset voltage signal from the second bias voltage source.

Abstract: A data-processing system is described comprising: • A plurality of data-processing devices (11, 12, 13, 14) • A data-handling facility (20) shared by the data-processing devices, • An aggregation facility (30) for receiving signals (R1, R2, R3, R4) indicative for individual requirements from the data-processing devices for a performance of the shared data-handling facility and for providing a control signal (RA) indicative for a required activity level to meet the aggregated requirements, • a control device (40) for controlling an activity level of the data-handling facility depending on the control signal (RA). Additionally a data-processing method is described.

Abstract: A transistor device (10), the transistor device (10) comprising a substrate (11, 14), a fin (3, 3A) aligned along a horizontal direction on the substrate (11, 14), a first source/drain region (4) of a first type of conductivity in the fin (3, 3A), a second source/drain region (5) of a second type of conductivity in the fin (3, 3A), wherein the first type of conductivity differs from the second type of conductivity, a channel region (33) in the fin (3, 3A) between the first source/drain region (4) and the second source/drain region (5), a gate insulator (6) on the channel region (33), and a gate structure (7, 8) on the gate insulator (6), wherein the sequence of the first source/drain region (4), the channel region (33) and the second source/drain region (5) is aligned along the horizontal direction.

Abstract: A method for storing or reading data in a memory array of a transponder and a corresponding transponder, read/write device and program element is described. Therein, a data structure for storing data within the memory array is defined by a predetermined protocol. The data structure comprises: a header data block including predefined header data; an application data block for storing application data; a memory control data block including a reservation indicator for indicating a reserved partial memory area of the memory array where, in accordance with the predetermined protocol, application data cannot be read or written by a protocol compliant reader device. The method for storing data comprises storing additional application data in the reserved partial memory area.