Patents Assigned to NXP
  • Publication number: 20130049845
    Abstract: An apparatus, system, and method are provided for a differential integrated input circuit. The apparatus includes n-type semiconductor devices and p-type semiconductor devices. The p-type semiconductor devices are cross-coupled with the n-type semiconductor devices. Each of the p-type semiconductor devices biases a corresponding n-type semiconductor device.
    Type: Application
    Filed: August 26, 2011
    Publication date: February 28, 2013
    Applicant: NXP B.V.
    Inventors: Aloysius Johannes Maria Boomkamp, Stefan Butselaar, Ben Gelissen, Mehdi El Ghorba, Cornelis Klaas Waardenburg
  • Publication number: 20130049855
    Abstract: An integrated circuit comprising a Class-D amplifier for amplifying an input signal at an input terminal is disclosed. The Class-D amplifier is switchable between an operational mode, in which a comparator (4) is directly coupled to an output stage (5), and a test mode, in which the comparator (4) is coupled to the output stage (5) via a sampler (15) and the output stage (5) is coupled to the input terminal via a feedback network, whereby a digital representation of the input signal is available at an output of the sampler (15).
    Type: Application
    Filed: July 25, 2012
    Publication date: February 28, 2013
    Applicant: NXP B.V.
    Inventors: Marco Berkhout, Lûtsen Ludgerus Albertus Hendrikus
  • Publication number: 20130049718
    Abstract: A Class D power amplifier is for driving a load between first and second output nodes defined between two bridges. A controller is adapted to derive an amplifier hold signal when an overcurrent state is detected in an output bridge, and to prevent switching of the other output bridge between the two main output states.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: NXP B.V.
    Inventors: Marco BERKHOUT, Benno KRABBENBORG
  • Publication number: 20130049779
    Abstract: An integrated circuit comprising a first pair (11, 12) of switching devices arranged in series between positive and negative supply terminals is disclosed. The integrated circuit is switchable between an operational mode, in which the first pair (11, 12) of switching devices are driven to couple either the positive or negative supply terminal to an output terminal, and a test mode, in which a current source on the integrated circuit is driven to cause a desired current to flow in a first one (12) of the first pair (11, 12) of switching devices.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: NXP B.V.
    Inventor: Marco BERKHOUT
  • Patent number: 8385475
    Abstract: A circuit for producing multiple switching control signals for a harmonic rejection mixer from multiple phases of a digital local oscillator signal is presented, wherein a first waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one switching control signal by logical combining two from the multiple phases of a digital local oscillator signal, and a second waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one first switching control signal by logical combining one from the multiple phases of a digital local oscillator signal with a predetermined signal having a static logical value.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: February 26, 2013
    Assignee: NXP, B.V.
    Inventors: Xin He, Johannes H. A. Brekelmans
  • Patent number: 8386684
    Abstract: A data processing system is provided which comprises at least two processing units (100, 101, 102) each for executing a plurality of tasks and an interrupt handling unit (200) for receiving an interrupt to be processed by the data processing system and for distributing the interrupt to one of the at least two processing units (100, 101, 102). The processing unit (100, 101, 102) to which the interrupt is distributed stops its current execution of the task and processes the interrupt. The interrupt handling unit (200) is adapted to determine whether the processing units (100, 101, 102) are executing a critical section (CS) of the task. The interrupt handling unit (200) distributes the interrupt to one of the processing units (100, 101, 102), which is not executing a critical section (CS) of a task.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: February 26, 2013
    Assignee: NXP B.V.
    Inventors: Ranjith Gopalakrishnan, Milind Manohar Kulkarni
  • Patent number: 8385471
    Abstract: This invention relates to a method, a computer program product, a device, and a system, wherein a receiver unit (200,300,300?,500,500?,600,600?) is configured to operate in a single-channel mode and in a multi-channel mode, wherein in the single-channel mode the receiver unit (200,300,300?,500,500?,600,600?) is configured to output exactly one channel of a received signal, and in the multiple-channel mode the receiver unit (200,300,300?,500,500?,600,600?) is configured to output at least two channels of the received signal.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: February 26, 2013
    Assignee: NXP B.V.
    Inventors: Luca Lococo, Olivier Jamin
  • Patent number: 8381980
    Abstract: A device (110) for evaluating an electromagnetic field strength/field geometry of an electromagnetic gate apparatus (120) is provided, the device (110) comprising a measurement unit (112) adapted for receiving a measurement signal from the electromagnetic gate apparatus (120) and determining a value of the field strength of said measurement signal, a communication unit (114) adapted for receiving command data from the electromagnetic gate apparatus (120) and adapted for sending response datato the electromagnetic gate apparatus (120). Optionally, the device (110) comprises an evaluation unit (116,118) adapted for evaluating the electromagnetic field geometry of the electromagnetic gate apparatus (120) based on said values of the field strength received from the measurement unit (112).
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: February 26, 2013
    Assignee: NXP B.V.
    Inventors: Gerald Wiednig, Michael Buchmann, Ronny Schomacker
  • Publication number: 20130042669
    Abstract: A gas sensor on a semiconductor substrate. The gas sensor includes an elongate sensor element extending across an opening and has first and second opposed surfaces exposed for contact with a gas to be sensed. The first surface faces away from a major surface of the substrate. The second surface faces toward said major surface. The electrical conductivity of the elongate sensor element is sensitive to a composition and/or concentration of said gas to which the opposed first and second surfaces are exposable. The gas sensor further includes a support structure arranged to increase the mechanical robustness of the gas sensor by supporting the elongate sensor element in the opening.
    Type: Application
    Filed: July 24, 2012
    Publication date: February 21, 2013
    Applicant: NXP B.V.
    Inventors: Aurelie Humbert, David Tio Castro
  • Patent number: 8378710
    Abstract: Various embodiments relate to an anti-tampering circuit for a secure device including: a signal delay detector; a clock delay detector; a clock duty cycle detector; and a protection unit that receives an error indication from the signal delay detector, clock delay detector, and the clock duty cycle detector, wherein the protection unit indicates tampering to a secure device upon receiving the error indication.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: Ghiath Al-Kadi, Jan Hoogerbrugge, Massimo Ciacci
  • Patent number: 8378720
    Abstract: A signal processing arrangement comprises a series of latches (XDL, L1, L2) arranged as a clocked delay line (CDL) having a data input and a data output that are coupled to each other so as to form an inverting loop. An enable circuit (ACDL) allows or prevents a latch (L2) in the series of latches from changing state depending on whether, one clock cycle ago, the latch concerned received a given binary value or the inverse of that given binary 5 value, respectively, from the preceding latch (L1) in the series of latches. Such a circuit configuration allows a low-cost frequency division by an odd number with relatively small duty cycle errors.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Johannes Hubertus Antonius Brekelmans
  • Patent number: 8378593
    Abstract: A controller and a method for controlling lamp drivers such as e.g. LED drivers for lamps having a fast response behavior such as e.g. LED lamps are proposed. They enable to substantially reduce or prevent a visible luminance flicker at such lamps when dimming the lamps with a conventional dimmer such as e.g. a phase cut dimmer. This can be achieved by switching off the lamp driver prematurely in such a way that a time jitter of a dimmer switching does not influence an on-time of the lamp driver. No bulky or expensive filters or capacitors are needed. Thus, a space-switch saving and/or inexpensive construction is enabled.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Gert-Jan Koolen
  • Patent number: 8380912
    Abstract: Consistent with an example embodiment a repeater device is provided for handling signal transmissions, in particular in a DisplayPort environment. The repeater is to be coupled with an upstream device and a downstream device, the repeater being adapted for transmitting signals received from the upstream device to the downstream device and for conditioning the signals before transmission. The repeater is configured to provide a transparent communication path between the upstream device and the downstream device for DPCD access transactions belonging to a second group of DPCD access transactions. For DPCD access transactions belonging to a first group of DPCD access transaction, the repeater is configured to process the DPCD access transactions by accessing one or more DPCD registers included in the repeater.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Kenneth Jaramillo
  • Patent number: 8378745
    Abstract: A switching amplifier comprising: an output driving circuit (400) including a pair of switching transistors (M1, M2) connected in series between a pair of supply voltage lines (VP, gnd); a switch driver circuit (204a) configured to drive the switching transistors (M1, M2) with first and second respective PWM signals dependent on an input signal (101); an output connection between the pair of transistors (M1, M2) for driving an output load (403); and an output current sensing circuit for measuring a current through the output load, the output current sensing circuit comprising: a current sensing resistor (401a) connected between a first one (M2) of the pair of transistors and an adjacent supply voltage line (gnd); and a voltage sense circuit (404) connected across the current sensing resistor, wherein the voltage sense circuit is configured to sample a voltage across the current sensing resistor (401a) at a midpoint of successive corresponding portions of one of the PWM signals.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: Lutsen Ludgerus Albertus Hendrikus Dooper, Gerrit Dijkstra
  • Patent number: 8378664
    Abstract: In order to reduce the dimensions of the mechanical components and the number and size of the sensory and electronic components in an arrangement comprising a magnetic-field-dependent angle sensor which is effectively connected to a magnetic transmitter which is arranged such that it can rotate with respect to the angle sensor, while maintaining or improving the resolution of the output signal, the angle sensor is formed by at least one magnetoelectric converter, the electrical properties of which are dependent on the magnetic field strength but independent of the polarity of the magnetic field acting on the at least one converter. The magnetic field strength is selected such that the at least one converter is controlled in saturation.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Michael Hinz
  • Patent number: 8379768
    Abstract: The invention which relates to a method and to an arrangement for generating soft bit information in a receiver of a multiple antenna system is based on the object of reducing the calculation complexity for generating the soft bit information.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventor: Sebastian Eckert
  • Patent number: 8379766
    Abstract: This invention relates to a method, a computer program product, a device, and a system, wherein a receiver unit is configured to operate in a single-channel mode and in a multi-channel mode, wherein in the single-channel mode the receiver unit is configured to output exactly one channel of a received signal, and in the multiple-channel mode the receiver unit is configured to output at least two channels of the received signal.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: Luca Lococo, Olivier Jamin
  • Patent number: 8376801
    Abstract: The present invention relates to a luminescent component (30) and a manufacturing method thereof. The luminescent component (30) comprises a first transparent carrier (18), a second transparent carrier (24), a substrate (10) sandwiched between said transparent carriers (18; 24), the substrate (10) comprising a conduit from the first transparent layer (18) to the second transparent carrier (24), the conduit being filled with a luminescent solution (20). This facilitates the use of colloidal solutions of quantum dots in such a luminescent component (30). Preferably, the substrate (10) is direct bonded to the transparent carriers (18, 24) using direct wafer bonding techniques.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: Viet Nguyen Hoang, Radu Surdeanu, Benoit Bataillou
  • Patent number: 8379438
    Abstract: An electronic device comprising a heat transfer structure and a phase change structure which is convertible between two phase states by heating, wherein the phase change structure is electrically conductive in at least one of the two phase states, wherein the heat transfer structure is arranged to be heated by radiation impinging on the heat transfer structure, wherein the phase change structure is thermally coupled to the heat transfer structure so that the phase change structure is convertible between the two phase states when the radiation impinges on the heat transfer structure.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: David Tio Castro, Karen Attenborough
  • Patent number: 8379715
    Abstract: A system and method for video compression utilizes non-linear quantization and modular arithmetic computation to perform differential coding on multiple blocks of video data and uses a result of the differential coding to generate a codeword.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: February 19, 2013
    Assignee: NXP B. V.
    Inventor: Jan-Willem Van De Waerdt