Patents Assigned to NXP
  • Patent number: 11706128
    Abstract: Embodiments of a method and an apparatus for multi-link data transmission are disclosed. In an embodiment, a method of multi-link communications involves at a first MLD that supports a first link, link1, and a second link, link2, transmitting a first frame during a first Transmission Opportunity (TXOP) on link1, and a second frame during a second TXOP on link2, simultaneously to a second MLD, receiving, at the first MLD, a first response frame to the first frame transmitted on link1 after a transmission end time of the first frame, identifying, at the first MLD, that a response frame to the second frame transmitted on link2 was not received after the transmission end time of the second frame, and transmitting, at the first MLD, a third frame on link1 and a fourth frame on link2 simultaneously, after receiving the first response frame on link1.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: July 18, 2023
    Assignee: NXP USA, Inc.
    Inventors: Young Hoon Kwon, Liwen Chu, Hongyuan Zhang, Hui-Ling Lou
  • Patent number: 11705872
    Abstract: Embodiments of RF amplifiers and packaged RF amplifier devices each include an amplification path with a transistor die, and an output-side impedance matching circuit having a T-match circuit topology. The output-side impedance matching circuit includes a first inductive element (e.g., first wirebonds) connected between the transistor output terminal and a quasi RF cold point node, a second inductive element (e.g., second wirebonds) connected between the quasi RF cold point node and an output of the amplification path, and a first capacitance connected between the quasi RF cold point node and a ground reference node. The RF amplifiers and devices also include a baseband termination circuit connected to the quasi RF cold point node, which includes an envelope resistor, an envelope inductor, and an envelope capacitor coupled in series between the quasi RF cold point node and the ground reference node.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 18, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jeffrey Spencer Roberts, Ning Zhu, Olivier Lembeye, Damon G. Holmes, Jeffrey Kevin Jones
  • Patent number: 11705870
    Abstract: Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 18, 2023
    Assignee: NXP USA, Inc.
    Inventors: Xavier Hue, Olivier Lembeye, Pascal Peyrot
  • Patent number: 11697413
    Abstract: A vehicle control device includes: a signal processing IC unit that outputs image processing data; a recognition processing IC unit that performs recognition processing of the external environment of a vehicle to output external environment data obtained through the recognition processing; a judgment processing IC unit that performs judgment processing for cruise control of the vehicle; a power management unit capable of controlling an on or off state of a recognition function of the external environment of the vehicle in the recognition processing IC unit according to the conditions of the vehicle; and a bypass path for enabling data communications from the signal processing IC unit to the judgment processing IC unit without performing the recognition processing of the external environment of the vehicle by the recognition processing IC unit.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: July 11, 2023
    Assignees: MAZDA MOTOR CORPORATION, NXP B.V.
    Inventors: Eiichi Hojin, Kiyoyuki Tsuchiyama, Masato Ishibashi, Daisuke Hamano, Tomotsugu Futa, Daisuke Horigome, Atsushi Tasaki, Yosuke Hashimoto, Yusuke Kihara, Arnaud Van Den Bossche, Ray Marshal, Leonardo Surico
  • Patent number: 11699208
    Abstract: A method is provided for watermarking a machine learning model used for object detection or image classification. In the method, a first subset of a labeled set of ML training samples is selected. The first subset is of a predetermined class of images. In one embodiment, the first pixel pattern is selected and sized to have substantially the same dimensions as each sample of the first subset or each bounding box in the case of an object detector. Each sample of the first subset is relabeled to have a different label than the original label. An opacity of the pixel pattern may be adjusted independently for different parts of the pattern. The ML model is trained with the labeled set of ML training samples and the first subset of relabeled ML training samples. Using multiple different opacity factors provides both reliability and credibility to the watermark.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: July 11, 2023
    Assignee: NXP B.V.
    Inventors: Wilhelmus Petrus Adrianus Johannus Michiels, Frederik Dirk Schalij
  • Patent number: 11700044
    Abstract: Various embodiments relate to a system and method for joint sounding by a client with a master access point (AP) and a slave (AP), including: receiving a message from the master AP; applying network allocation vector (NAV) rules to update a NAV values, wherein the received message is treated as an intra-basic service set (BSS) message when the transmit address (TA) of the received message has a prespecified value; receiving a first trigger frame; and transmitting a first channel state information (CSI) to the master AP when the channel is idle based upon the updated NAV value in response to the trigger frame.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: July 11, 2023
    Assignee: NXP USA, Inc.
    Inventors: Young Hoon Kwon, Liwen Chu, Sudhir Srinivasa, Hongyuan Zhang, Huiling Lou
  • Publication number: 20230216705
    Abstract: A Controller Area Network (CAN) system, method, and circuit are provided with a dual mode bus line termination circuit connected between signal lines of a serial bus and optimized for both differential and single-ended communication modes over the serial bus, where the dual mode bus line termination circuit includes first and second resistance termination paths connected in parallel between first and second bus wires of the serial bus to provide an odd mode termination impedance (RODD) that matches an impedance of the serial bus when operating in the differential communication mode, and to also provide an even mode termination impedance (REVEN) that matches an impedance of the serial bus when operating in the single-ended communication mode.
    Type: Application
    Filed: December 31, 2021
    Publication date: July 6, 2023
    Applicant: NXP B.V.
    Inventors: Lucas Pieter Lodewijk van Dijk, Adrien Manfred Schoof
  • Publication number: 20230215937
    Abstract: A semiconductor device and fabrication method are described for manufacturing a heterojunction bipolar transistor by forming a silicon collector region in a substrate which includes a lower collector layer, a dopant diffusion barrier layer, and an upper collector layer, where the formation of the dopant diffusion barrier layer reduces diffusion of dopants from the lower collector layer into the upper collector layer during one or more subsequent manufacturing steps which are used to form a trench isolation region in the substrate along with a heterogeneous base region and a silicon emitter region.
    Type: Application
    Filed: December 31, 2021
    Publication date: July 6, 2023
    Applicant: NXP B.V.
    Inventors: Johannes Josephus Theodorus Marinus Donkers, Petrus Hubertus Cornelis Magnee, Ronald Willem Arnoud Werkman
  • Patent number: 11696237
    Abstract: One example discloses a first near-field device, including: a near-field antenna; a tuning circuit; a communications unit coupled to the near-field antenna and tuning circuit; a controller coupled to the tuning circuit and the communications unit; wherein the first near-field device is configured to have a near-field communications channel path-loss with respect to a second near-field device; wherein the controller is configured to set the path-loss to a first channel path-loss before contact detected between the first and second near-field devices; wherein the controller is configured to set the path-loss to a second channel path-loss after contact detected between the first and second near-field devices; and wherein the first path-loss is greater than the second path-loss.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Anthony Kerselaers, Liesbeth Gommé
  • Patent number: 11695374
    Abstract: A method for a fast settling ripple reduction loop for high speed precision chopper amplifiers includes amplifying an input signal with a signal path to generate a first output, the signal path comprising chopping the input signal to generate a first chopper output, amplifying the first chopper output with an amplifier to generate an amplifier output and chopping the amplified output to generate a second chopper output. An output ripple of the first output is reduced with a Ripple Reduction Loop comprising chopping the second chopper output to generate a third chopper output, filtering the third chopper output with a filter to generate a Direct Current (DC) offset correction, and combining the DC offset correction with the amplifier output, wherein the third chopper output is driven to the output voltage of the filter and the RRL is disconnected from the low frequency signal path in response to a non-linear event.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Ranga Seshu Paladugu, Hanqing Xing, Soon G Lim
  • Patent number: 11694497
    Abstract: The method includes one or more turnstiles using a non-secure ranging process to detect a proximity of one or more mobile computing devices carried by respective users. The method also includes one of the turnstiles, on making a proximity determination in respect of a first of said mobile computing devices, commencing a secure authentication process to authenticate a user carrying the first mobile computing device. The method further includes, in response to a determination that the user carrying the first mobile computing device has been authenticated, allowing the user carrying the first mobile computing device to pass through the turnstile.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Srivathsa Masthi Parthasarathi, Sunil Dilipkumar Jogi, Ghiath Al-kadi
  • Patent number: 11693966
    Abstract: A method for managing operation of a circuit includes activating a trigger engine, receiving signals from a target circuit, and detecting a hardware trojan based on the signals. The trigger engine may generate a stimulus to activate the hardware trojan, and the target circuit may generate the received signals when the stimulus is generated. The trigger engine may be a scan chain which performs a circular scan by shifting bit values through a series of flip-flops including a feedback path. The target circuit may be various types of circuits, including but not limited to a high-speed input/output interface. The hardware trojan may be detected based on bit-error rate information corresponding to the signals output from the target circuit.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11695193
    Abstract: A Wilkinson power combiner (202) is described that includes a high-pass, HP, frequency circuit (500, 550), wherein the HP frequency circuit (500, 550) comprises at least one of: (i) one input port (510) coupled to at least two output ports (512, 514) via at least two paths; and an input shunt inductor (520) coupling the input port (510) to ground; wherein the one input port (510) is coupled to the at least two output ports (512, 514) via respective series capacitances (230, 238) on the at least two paths, which in cooperation with the input shunt inductor (520) forms a first HP frequency circuit; and (ii) at least one resistor (554, 528)-inductor (552, 524), R-L isolation circuit (500, 550) configured to couple the at least two output ports (512, 514) that forms a second HP frequency circuit.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Xin Yang, Mark Pieter van der Heijden
  • Patent number: 11694761
    Abstract: Various embodiments relate to a method for storing and reading data from a memory. Data words stored in the memory may be grouped, and word specific parity information and shared parity information is generated, and the shared parity information is distributed among the group of words. During reading of a word, if more errors are detected than can be corrected with word parity data, the shared parity data is retrieved and used to make the error corrections.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Soenke Ostertun, Bjorn Fay, Vitaly Ocheretny
  • Patent number: 11695447
    Abstract: In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: an ultra-wideband (UWB) communication unit configured to set up a UWB communication channel with a first external communication device; a further communication unit configured to set up a further communication channel with a second external communication device; an antenna configured to be selectively used by the UWB communication unit and the further communication unit; wherein the UWB communication unit is operatively coupled to the further communication unit, and wherein the further communication unit is configured to grant the UWB communication unit access to said antenna in response to receiving a request from the UWB communication unit. This aspect represents a solution to the problem of how to facilitate avoiding that UWB ranging rounds fail in a co-existence system.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Srivathsa Masthi Parthasarathi, Brian Charles Cassidy, Atmaram Kota Rajaram, Ghiath Al-kadi, Hendrik Ahlendorf
  • Patent number: 11693029
    Abstract: Evaluation board (EVB) assemblies or stacks utilized in tuning electronic modules are disclosed, as are methods for tuning such modules. In embodiments, the module testing assembly includes an EVB and an EVB baseplate. The EVB includes, in turn, an EVB through-port extending from a first EVB side to a second, opposing EVB side; and a module mount region on the first EVB side and extending about a periphery of the EVB through-port. The module mount region is shaped and sized to accommodate installation of a sample electronic module provided in a partially-completed, pre-encapsulated state fabricated in accordance with a separate thermal path electronic module design. A baseplate through-port combines with the EVB through-port to form a tuning access tunnel providing physical access to circuit components of the sample electronic module through the EVB baseplate from the second EVB side when the sample electronic module is installed on the module mount region.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Joshua Bennett English, Lu Wang
  • Patent number: 11695327
    Abstract: Embodiments of a power converter are disclosed. In an embodiment, the power converter comprises a power factor correction (PFC) stage circuit, an emulation circuit and a controller. The PFC stage circuit is configured to produce an output signal on an output terminal. The PFC stage circuit includes an inductor coupled between a rectifier and the output terminal and a switch coupled to the inductor. The emulation circuit is connected to the PFC stage circuit to generate an emulated current that corresponds to current through the inductor of the PFC stage circuit. The emulated current is generated based on a voltage signal at a node between the inductor and the output terminal and a sensed current at a sense resistor connected to the rectifier. The controller is connected to the emulation circuit to receive the emulated current and generate a control signal for the switch of the PFC stage circuit based on the emulated current.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Hans Halberstadt, Alfred Grakist
  • Patent number: 11695375
    Abstract: An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: July 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Joseph Gerard Schultz, Yu-Ting David Wu, Nick Yang
  • Patent number: 11695377
    Abstract: An amplifier including a P-channel transistor having current terminals coupled between a first node and a second node and having a control terminal coupled to a third node receiving an input voltage, an N-channel transistor having current terminals coupled between a fourth node developing an output voltage and a supply voltage reference and having a control terminal coupled to the second node, a first resistor coupled between the first node and a supply voltage, a second resistor coupled between the first and fourth nodes, and a current sink sinking current from the second node to the supply reference node. The amplifier may be converted to differential form for amplifying a differential input voltage. Current devices may be adjusted for common mode, and may be moved or added to improve headroom or to improve power supply rejection. Chopper circuits may be added to reduce 1/f noise.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP B.V.
    Inventors: Robert van Veldhoven, John Pigott
  • Patent number: 11695013
    Abstract: A capacitor includes an electrode implemented in an electrode well of a substrate. The electrode well has a net N-type dopant concentration. The capacitor includes an electrode implemented in a conductive structure located above the substrate. The electrodes are separated by a dielectric layer located between the electrodes. A first tub region having a net P-type conductivity dopant concentration is located below and laterally surrounds the electrode well and a second tub region having a net N-type conductivity dopant concentration is located below and laterally surrounds the first tub region and the electrode well.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP USA, INC.
    Inventors: Ronghua Zhu, Xin Lin, Todd Roggenbauer