Abstract: A method, system, and apparatus are provided for determining mechanical characteristics of an electric motor and mechanical load with a speed signal modulator, FOC current loop, sensor-less rotor speed estimator, and speed signal demodulator which are configured to provide a q-axis AC reference current, q-axis DC reference current, estimated maximum AC rotor speed, estimated DC rotor speed, estimated phase angle of the AC rotor speed component, and torque constant to a mechanical characteristics estimator which is configured to determine a plurality of load torque parameters for the electric motor and mechanical load which include a combined moment of inertia parameter, a combined static friction, and a combined viscous friction coefficient parameter.

Abstract: A system, method, apparatus and electronic control unit are provided for centralized data collection at a single controller device (110) in a distributed service-oriented system (100) by applying one or more classifiers (102-104, 114) to a message traffic packet (1) received at the Ethernet switch (101) of the single controller device to selectively identify service update information from service-oriented traffic messages in the message traffic packet without generating additional message traffic packets on the network system bus, and by mirroring each message traffic packet (3) containing service update information to a processing element (111) in the single controller to identify and extract specified data from the identified service update information for storage in a centralized database which is updated as services publish new information on the network system bus.

Abstract: Embodiments described herein include radio frequency (RF) switches that may provide increased power handling capability. In general, the embodiments described herein can provide this increased power handling by equalizing the voltages across transistors when the RF switch is open. Specifically, the embodiments described herein can be implemented to equalize the source-drain voltages across each field effect transistor (FET) in a FET stack that occurs when the RF switch is open and not conducting current. This equalization can be provided by using one or more compensation circuits to couple one or more gates and transistor bodies in the FET stack in a way that at least partially compensates for the effects of parasitic leakage currents in the FET stack. In addition, multiple FET stacks are implemented in parallel in at least some switch branches to improve settling time for the branch.

Abstract: A wireless charger includes a plurality of charging units for charging wirelessly chargeable devices. Each charging unit includes one or more transmit coils for producing a wireless charging signal. Each charging unit also includes a driver circuit for driving the one or more transmit coils. The driver circuit is switchable according to a charging PWM duty cycle of that charging unit. Each charging unit is operable to perform a Q factor measurement by injecting excitation energy into the one or more transmit coils of that charging unit to produce a free resonance signal, and measuring a decay rate of the free resonance signal. Each charging unit is operable to alter its charging PWM duty cycle during a time window in which another charging unit of the wireless charger is performing a Q factor measurement.

Abstract: A transmission gate includes a first P-type transistor and a second P-type transistor coupled in series between a first signal node and an internal node. The transmission gate is enabled by turning on the first P-type transistor and the second P-type transistor to communicate signals between the first signal node and the internal node. The transmission gate is disabled by turning off the first P-type transistor and the second P-type transistor to stop communicating signals between the first signal node and the internal node. While the transmission gate is disabled, a third P-type transistor having a first current electrode coupled to a circuit node between the first and second P-type transistors and a control electrode coupled to the first signal node is used to track voltage of the first signal node and, in response to the tracking, control a voltage level at the circuit node to limit a gate-to-source voltage of the first P-type transistor.

Abstract: One example discloses a near-field device, including: a near-field magnetic antenna, including a coil, configured to receive or transmit near-field magnetic signals; a near-field electric antenna configured to receive or transmit near-field electric signals; and a set of electrical components, electrically coupled to the near-field magnetic antenna and the near-field electric antenna; wherein at least one of: the coil of the near-field magnetic antenna, or a conductive surface of the near-field electric antenna, forms a boundary around the set of electrical components.

Abstract: A process identifier transition monitor captures and assesses activities associated with a microprocessor or a microcontroller. Monitoring and assessment is performed by detection of process identifier transitions, which may be driven by an occurrence of one or more activities, such as execution of application software, system hardware mechanisms, or processor-internal mechanisms. Process identifier transitions are assessed to determine whether such transitions were expected. If a detected process identifier transition was not expected, then a system alert may be transmitted or some other appropriate response taken within the system.

Abstract: Aspects of the present disclosure are directed to use with communications that may involve repetitive communications. As may be implemented in accordance with one or more embodiments, a subset of symbols in a current data message (130/131) are used with a corresponding subset of symbols in a previous data message (120/121), to ascertain whether the current data message is a repetition of the previous data message. This may involve, for instance, generating a resemblance metric to represent semblance between a subset the data symbols of the current data message and a subset the data symbols of the previous data message (102). The resemblance metric can be used in determining whether the current data message is a repetition of the previous data message. This approach may be useful, for example, in ascertaining whether the current message is a repetition without necessarily decoding the message.

Abstract: A power line communication system (200) comprising a first node (202) and a second node (204). The first node (202) comprises a second-node-connection-terminal (206); a first-node-transmission-module (208) that provides a first-node-output-signal (210) to the second-node-connection-terminal (206); and modulates the voltage level of the first-node-output-signal based on first-node-transmission-data. The second node (204) comprises a second-node-input-voltage-terminal (214) that is connected to the second-node-connection-terminal (206) of the first node (202) in order to receive the first-node-output-voltage-signal (210). The second node (204) is configured to use the first-node-output-voltage-signal (218) as a supply voltage.

Abstract: A method, system, and apparatus for applying dithering to waveforms in a transmitter such as a Bluetooth transmitter. A current waveform corresponding to a current bit of a bitstream is received where the current waveform has a nominal frequency deviation defined by a value of the current bit. Based on the determination that the current waveform and an immediately previous bit of the bitstream are associated with different bit values, a first dithered signal is output which is defined by a first frequency offset pseudorandomly selected from a first set of frequency offsets. A subsequent waveform to the current waveform is received corresponding to a subsequent bit of the bitstream. Based on the subsequent bit and the current bit being associated with bits of the same value, a second dithered signal is output which is defined by a second frequency offset pseudorandomly selected from a second set of frequency offsets.

Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method of wireless communications involves encoding bits in Extremely High Throughput (EHT) signaling fields of a packet corresponding to at least one of an Orthogonal Frequency-Division Multiple Access (OFDMA) mode, a non-OFDMA mode, and a Null Data Packet (NDP) mode, wherein EHT signaling fields include a Universal signal (U-SIG) field and an EHT signal (EHT-SIG) field, and transmitting the packet with encoded bits corresponding to at least one of the OFDMA mode, the non-OFDMA mode, and the NDP mode.

Abstract: A frequency modulated continuous wave (FMCW) radar system includes an antenna array having C antennas where (C=A+B?1), a first integrated circuit (IC) device including A first sensor inputs, and a second IC device including B second sensor inputs. The first sensor inputs are coupled to a first A of the antennas, and the second sensor inputs are coupled to a last B of the antennas such that a common one of the first sensor inputs and a common one of the second sensor inputs are both coupled to a common antenna. Each IC device receives reflected signals on each sensor input, and mixes the reflected signals to associated baseband signals based upon a local oscillator (LO) signal. Each LO signal has a different phase shift. The LO signals are based upon a common LO signal.

Abstract: A temperature-to-digital converter includes a temperature sensor circuit, an analog-to-digital converter (ADC), and a digital processing circuit. The temperature sensor circuit is configured to generate first and second complementary-to-absolute-temperature (CTAT) voltages based on a sensed absolute temperature. The ADC is configured to receive the first and second CTAT voltages. Further, during first and second conversion cycles of the ADC, the ADC is configured to receive the first and second CTAT voltages, and generate first and second digital voltages, respectively. The first and second digital voltages are generated based on the first and second CTAT voltages, respectively, and a difference between the first and second CTAT voltages. The digital processing circuit is configured to generate, based on the first and second digital voltages, a temperature output voltage that is independent of a gain of the ADC and a digital representation of the absolute temperature.

Abstract: A security module for a CAN node includes a RXD input interface for receiving data from a CAN bus, TXD output interface for transmitting data to the CAN bus, and a RXD output interface for providing data to a local controller. The security module is configured to receive a CAN frame from the CAN bus. The CAN frame includes a CAN message. The security module is also configured to compare an identifier of the received CAN frame with at least one identifier associated with the local controller; and upon detection of a match between the identifier of the received CAN frame and the at least one identifier associated with the local controller: pass the CAN message to the local controller via the RXD output interface; decouple the local controller from the CAN bus; and invalidate the CAN message on the CAN bus via the TXD output interface.

Abstract: A network node comprising: a message handling module configured to control the sending of messages to one or more output ports of the network node based on a rule set stored at the network node, the rule set comprising one or more rules; a communication module configured to receive at least one update to the rule set from a controller node, separate from the network node, for changing the rule set; a supervisor module configured to verify that the changes to the rule set instructed by the update comply with at least a first set of rule-compliance-criteria and, if so, the network node is configured to modify the rule set to implement the changes of the update and, if not, the network node is configured not to implement the changes to the rule set.

Abstract: A method is provided for securely accessing code in an external memory. In the method, plaintext code may be stored in internal memory as sets of multiple blocks, each of the multiple blocks having N-bits. The code is encrypted and stored in the external memory. A block cipher having an authenticated encryption mode is used to convert the plaintext code to ciphertext code plus an authentication tag corresponding to each set of the multiple blocks. The external memory is formatted to store the ciphertext and the authentication tag. A translated address for the ciphertext is created from a plaintext address. During a read operation, the generated authentication tag is checked with an expected authentication tag. If the check is successful, the ciphertext code is decrypted and provided to a CPU for execution as plaintext code. In one embodiment, the CPU executes the plaintext code “in place” in the external memory.

Abstract: A wafer-scale die packaging device is fabricated by providing a high-k glass carrier substrate having a ceramic region which includes a defined waveguide area and extends to a defined die attach area, and then forming, on a first glass carrier substrate surface, a differential waveguide launcher having a pair of signal lines connected to a radiating element that is positioned adjacent to an air cavity and surrounded by a patterned array of conductors disposed over the ceramic region in a waveguide conductor ring. After attaching a die to the glass carrier substrate to make electrical connection to the differential waveguide launcher, a molding compound is formed to cover the die, differential waveguide launcher, and air cavity, and an array of conductors is formed in the molding compound to define a first waveguide interface perimeter surrounding a first waveguide interface interior.

Abstract: Various embodiments relate to an end of packet (EOP) circuit, including: a reset pulse generator circuit configured to generate a reset pulse when a input signal transitions to a new value; an analog counter circuit configured to receive a squelch signal to start the counter and to receive the reset pulse to reset the counter; and an EOP detector circuit configured to produce a signal indicative that the input signal is an EOP signal based upon an output of the analog counter circuit.

Abstract: A temperature exposure detection system includes a plurality of nonvolatile memory cells. The memory includes memory read circuitry for reading the plurality of memory cells to determine a data retention error rate of the plurality of memory cells. The temperature exposure detection system determines a temperature exposure of the system based on the determined data retention error rate.

Abstract: Aspects of the disclosure are directed to apparatuses, systems and methods for radar processing. As may be implemented in accordance with one or more aspects herein, an apparatus may include receiver circuitry to receive and sample radar signals reflected from a target, and processing circuitry to carry out the following. Representations of the reflections are transformed into the time-frequency domain where they are oversampled. The oversampled representations of the reflections are inversely transformed to provide resampled reflections. Positional characteristics of the target may then be ascertained by constructing a range response characterizing the target based on the resampled reflections.