Patents Assigned to NXP
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Patent number: 11736937Abstract: In accordance with a first aspect of the present disclosure, an ultra-wideband communication node is provided, comprising: an ultra-wideband communication unit configured to transmit one or more messages to a plurality of external responder nodes and to receive one or more responses from said responder nodes; a processing unit configured to use a common cryptographic session key to encrypt said messages, wherein said common cryptographic session key is a key shared between the ultra-wideband communication node and all the external responder nodes; wherein the processing unit is further configured to use responder-specific cryptographic session keys to decrypt the responses and/or to encrypt further messages to the responder nodes, and wherein each individual one of said responder-specific cryptographic session keys is a key shared between the ultra-wideband communication node and one of the external responder nodes.Type: GrantFiled: April 21, 2021Date of Patent: August 22, 2023Assignee: NXP B.V.Inventors: Stefan Lemsitzer, Srivathsa Masthi Parthasarathi, Hugues Jean Marie de Perthuis
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Patent number: 11735583Abstract: A circuit module including an integrated circuit (IC) and a method for forming an IC are disclosed. An embodiment of the circuit module includes a trench having a conductive trench liner formed in a semiconductor substrate, and further includes semiconductor device circuitry formed in the substrate, where a conductor within a metallization layer of the semiconductor device circuitry electrically connects to the conductive trench liner. The embodiment also includes an insulating structure arranged over the conductive trench liner, where the insulating structure extends to an upper contact formed within an upper metallization layer of the semiconductor device circuitry. An isolation capacitor operable between the upper contact and the conductive trench liner has one or more electrical properties dependent on both a depth of the trench and a number of metallization layers below the upper metal layer in the semiconductor device circuitry.Type: GrantFiled: September 7, 2021Date of Patent: August 22, 2023Assignee: NXP B.V.Inventor: Han-Chung Tai
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Patent number: 11736939Abstract: Embodiments of an apparatus and method are disclosed. In an embodiment, a method of executing multi-link operations in a multi-link communications system comprises performing a single frame exchange between a first multi-link device and a second multi-link device to execute a multi-link operation for multiple links between the first and second multi-link devices using a frame transmitted on a first link among the multiple links, wherein the frame includes an element that carries other link information on at least one link of the multiple links other than the first link, wherein the frame includes per-link value information that has different values for different links of the multiple link, and wherein successful execution of the single frame exchange completes the multi-link operation for at least two links of the multiple links between the first and second multi-link devices.Type: GrantFiled: December 30, 2020Date of Patent: August 22, 2023Assignee: NXP USA, Inc.Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang, Hui-Ling Lou
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Patent number: 11733277Abstract: An integrated circuit includes an analog-to-digital converter (ADC) configured to receive input voltage, and first and second reference voltages, and outputs digital code representing ratios between the input voltage and the first and the second reference voltages. The first and second reference voltages are generated by a reference generator using different current densities. During a first stage, the ADC samples the first input voltage and the first reference voltage and transfers equivalent charge of the sampled first input voltage and first reference voltage to an integration capacitor. During a second stage, the ADC samples the second reference voltage and transfers equivalent charge of the sampled second reference voltage to the integration capacitor. The ADC provides one bit of digital code based on total charge stored on the integration capacitor after the transfers of charge of the sampled input voltage, and the sampled first and second reference voltages.Type: GrantFiled: December 7, 2021Date of Patent: August 22, 2023Assignee: NXP B.V.Inventors: Ricardo Pureza Coimbra, Edevaldo Pereira da Silva, Jr., Felipe Ricardo Clayton
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Patent number: 11737133Abstract: Various embodiments relate to a method performed by a first wireless device for providing a high priority communication service for a high priority traffic class between a first wireless device and a second wireless device, including: announcing support for the high priority communication service; receiving an association request from the second wireless device for the transmission of high priority traffic using the high priority communication service; accepting the received association request; and negotiating a restricted target wakeup time (TWT) service period (SP) for the high priority communication service between the first wireless device and the second wireless device, wherein higher priority is given for the transmission of high priority frames using the high priority traffic service.Type: GrantFiled: February 22, 2021Date of Patent: August 22, 2023Assignee: NXP USA, Inc.Inventors: Liwen Chu, Young Hoon Kwon, Hongyuan Zhang, Huiling Lou
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Patent number: 11731515Abstract: An apparatus in which electric power is generated for an electrical load from differentials in electric field strengths within a vicinity of powerlines includes: a plurality of electrodes separated and electrically insulated from one another for enabling differentials in voltage resulting from differentials in electric field strength experienced there at; and electrical components electrically connected therewith and configurable to establish one or more electric circuits whereby voltage differentials cause a current to flow through the established electric circuit for powering the electrical load.Type: GrantFiled: August 24, 2019Date of Patent: August 22, 2023Assignee: NXP Aeronautics Research, LLCInventors: Steven J. Syracuse, Chad D. Tillman
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Patent number: 11736005Abstract: The disclosure relates to a switched capacitor converter (SCC) with gate driving circuits for limiting currents provided by switching field effect transistors. Embodiments disclosed include an SCC with gate driver curcuits providing gate voltage signals to power FETs, each gate driver circuit comprising first and second gate driver modules and configured to operate in: a first mode in which the first gate driver module provides a gate voltage signal to a power FET that switches between first and second voltage rails by operation of first and second switches connected between the pair of voltage rails; and a second mode in which, in reponse to enabling of a current limit switching signal, the first gate driver module disables switching of one of the first and second switches and the second gate driver module operates to limit a current provided to the power FET.Type: GrantFiled: July 29, 2021Date of Patent: August 22, 2023Assignee: NXP B.V.Inventors: Dongyong Zhu, Bo Cai, XinDong Duan, Feng Cong, Jian Qing
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Patent number: 11728853Abstract: A wireless communication device includes first and second links. The first and second links respectively include first and second sets of antennae having an arrangement that renders a null space of a channel matrix between the first and second links non-zero. When the first and second links operate on a first frequency band, the first link obtains first channel state information that indicates a first channel measurement of a first set of channels observed from the second link to the first link. Based on the first channel state information, the first link determines a spatial mapping matrix that facilitates null steering of a signal transmission from the first link in a direction of the second link. The first link transmits to a remote device, a wireless signal on the first frequency band based on the spatial mapping matrix.Type: GrantFiled: April 19, 2021Date of Patent: August 15, 2023Assignee: NXP USA, Inc.Inventors: Ankit Sethi, Sayak Roy, Sudhir Srinivasa
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Patent number: 11728285Abstract: A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.Type: GrantFiled: August 26, 2021Date of Patent: August 15, 2023Assignee: NXP USA, INC.Inventors: Vivek Gupta, Michael B. Vincent, Scott M. Hayes, Richard Te Gan, Zhiwei Gong
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Patent number: 11726789Abstract: Embodiments of a multithreaded processor and a method of assigning blocks of register files for hardware threads of multithreaded processors are disclosed.Type: GrantFiled: January 27, 2022Date of Patent: August 15, 2023Assignee: NXP B.V.Inventor: Michael Andrew Fischer
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Patent number: 11726107Abstract: A sensor system includes a transducer for sensing a physical stimulus along at least two orthogonal axes and an excitation circuit. The transducer includes a movable mass configured to react to the physical stimulus and multiple differential electrode pairs of electrodes. Each of the electrode pairs is configured to detect displacement of the movable mass along one of the orthogonal axes. The excitation circuit is connectable to the electrodes in various electrode connection configurations, with different polarity schemes, that enable excitation and sampling of each of the orthogonal axes during every sensing period. For each sensing period, a composite output signal is produced that includes the combined information sensed along each of the orthogonal axes. The individual sense signals for each orthogonal axis may be extracted from the composite output signals.Type: GrantFiled: September 22, 2020Date of Patent: August 15, 2023Assignee: NXP USA, Inc.Inventors: Andrew C McNeil, Jerome Romain Enjalbert, Joel Cameron Beckwith, Jun Tang
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Patent number: 11728308Abstract: A method of manufacturing a semiconductor device is provided. The method includes depositing a non-conductive layer over a semiconductor die. An opening is formed in the non-conductive layer exposing a portion of a bond pad of the semiconductor die. A cavity is in the non-conductive layer with a portion of the non-conductive layer remaining between a bottom surface of the cavity and a bottom surface of the non-conductive layer. A conductive layer is formed over the non-conductive layer and the portion of the bond pad. The conductive layer is configured to interconnect the bond pad with a conductive layer portion over the cavity.Type: GrantFiled: April 26, 2021Date of Patent: August 15, 2023Assignee: NXP B.V.Inventors: Tsung Nan Lo, Sharon Huey Lin Tay, Antonio Aguinaldo Marquez Macatangay
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Patent number: 11728336Abstract: Embodiments are provided for a capacitive array including: a first row of alternating first fingers and second fingers formed in a first conductive layer, wherein each first and second finger has a uniform width in a first direction and a uniform length in a second direction perpendicular to the first direction, the first row of alternating first and second fingers include a same integer number of first fingers and second fingers, and the first and second fingers are interdigitated in the first direction; and a first compensation finger formed in the first conductive layer at an end of the first row of alternating first and second fingers nearest a first outer boundary of the capacitive array, the first compensation finger configured to have an opposite polarity as a neighboring finger on the end of the first row.Type: GrantFiled: July 29, 2020Date of Patent: August 15, 2023Assignee: NXP USA, Inc.Inventors: Robert S. Jones, III, Xiankun Jin
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Patent number: 11722354Abstract: In an 802.11be wireless system, a receiving station device signals a packet padding capability in a wireless area network in accordance with an Extremely High Throughput (EHT) communication protocol by constructing a MAC control management frame to include an EHT capability element indicating whether a packet extension value longer than 16 ?s is supported by the receiving station device, where one or more fields in the EHT capability element include (1) a common nominal packet padding field having a plurality of values to signal different packet extension values for use with all transmission constellations, spatial streams Nss, and resource unit (RU) allocations supported by the first STA device, including at least one packet extension value longer than 16 ?s; and/or (2) a PHY packet extension threshold (PPET) field comprising a plurality of PPET values to signal packet extension values including at least one packet extension value longer than 16 ?s.Type: GrantFiled: July 27, 2021Date of Patent: August 8, 2023Assignee: NXP USA, Inc.Inventors: Rui Cao, Sudhir Srinivasa, Hongyuan Zhang, Liwen Chu
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Patent number: 11722327Abstract: A Controller Area Network, CAN, transceiver comprising: two terminals for coupling to a CAN bus; a transmitter arrangement configured to transmit signalling on the bus based on transmit data, the transmitter arrangement configured to drive the bus to a dominant state or recessive state based on the transmit signal; an impedance control device; a signalling detector to determine the length of time the transmit data comprises a logic zero prior to a transition to a logic one state and: based on the length of time being longer than a predetermined threshold, provide for control of an output impedance by the impedance control device in accordance with a first scheme; and based on the length of time being shorter than said predetermined threshold, provide for one of: control of said output impedance in accordance with a second scheme; and no control of the output impedance by the impedance control device.Type: GrantFiled: May 11, 2021Date of Patent: August 8, 2023Assignee: NXP B.V.Inventor: Matthias Berthold Muth
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Patent number: 11721586Abstract: Speed of plasma etching is regulated in regions prone to over-etching by providing an etch resistant structure, such as a metal saw bow, in the region. By adjusting dimensions, such as the length and width of the saw bow legs and an area defined by the saw bow legs, as well as a shape of the etch region through techniques such as chamfering, plasma etch speed in the region can be controlled with an intent to match the speed of etching in non-over-etched regions.Type: GrantFiled: December 19, 2019Date of Patent: August 8, 2023Assignee: NXP B.V.Inventors: Antonius Hendrikus Jozef Kamphuis, Ernst Eiper, Johannes Cobussen, Chantal Dijkstra
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Patent number: 11720384Abstract: A method is provided in a data processing system having second level address translation (SLAT) controlled by a hypervisor. In the method, hashes of all memory pages accessible by a guest OS are stored (set S). Also, hashes of all memory pages previously accessed by the guest OS are stored (set T). When the guest OS attempts an access to a memory page having executable code for which it does not have permission, an exception is generated. A hash of the memory page is compared with the hashes of set T and set S. If there is not a match within set T, then the guest OS has never attempted the requested operation before and suspicious behavior is reported. If there is not a match within set S, the requested operation is reported as illegal. In another embodiment, the memory page may be encrypted to prevent the guest OS from reading the memory page.Type: GrantFiled: June 5, 2020Date of Patent: August 8, 2023Assignee: NXP B.V.Inventor: Jan Hoogerbrugge
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Patent number: 11722146Abstract: Systems and methods for correction of sigma-delta analog-to-digital converters (ADCs) using neural networks are described. In an illustrative, non-limiting embodiment, a device may include: an ADC; a filter coupled to the ADC, where the filter is configured to receive an output from the ADC and to produce a filtered output; and a neural network coupled to the filter, where the neural network is configured to receive the filtered output and to produce a corrected output.Type: GrantFiled: January 21, 2022Date of Patent: August 8, 2023Assignee: NXP B.V.Inventor: Robert van Veldhoven
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Patent number: 11722171Abstract: UWB ranging methods and apparatus are disclosed. The method comprises a ranging communication with a plurality of responder devices, the ranging communication comprising: transmitting, by an initiator device, a polling signal in a time slot; receiving a respective response from each of the plurality of responder devices, overlapping and in a next time slot, each response comprising: synchronization bits, and a frame comprising Start of Frame Delimiter, and a Scrambled Timestamp Sequence; wherein the STS comprises a sequence of segments each preceded by a respective guard interval, wherein a specific one of the segments comprises data derived from a ranging key and a responder-identifier each unique to the respective responder among the plurality of responders, wherein a sequence-number of the specific segment is unique to the respective response, and wherein a remainder of the segments each comprise the same data derived from a predetermined common key and predetermined common data.Type: GrantFiled: November 18, 2021Date of Patent: August 8, 2023Assignee: NXP B.V.Inventors: Diwakar Subraveti, Abdul Wahid Abdul Kareem, Shengyang Xu, Atmaram Kota Rajaram, Ajay A Jampale
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Patent number: 11722197Abstract: A receiver system (100) comprising: a plurality of receiver-input-terminals (102), each of which is configured to receive an input-signal from a respective antenna (106), wherein the input-signals comprise: i. one or more undesired-signal-components; and ii. one or more combined-signal-components. The receiver system (100) also includes a spatial-information-processing-block (112; 212) configured to: calculate spatial information (222) of the undesired-signal-components of the plurality of input-signals; calculate spatial information (220) of the combined-signal-components of the plurality of input-signals; calculate weighting-coefficients (226) for each of the input-signals based on the spatial information (220) of the combined-signal-components and the spatial information (222) of the undesired-signal-components; and combine the plurality of input-signals by applying the weighting-coefficients to each of the input-signals to provide a spatial-output-signal (114; 214).Type: GrantFiled: February 4, 2022Date of Patent: August 8, 2023Assignee: NXP B.V.Inventor: Wilhelmus Johnannes van Houtum