Abstract: A method is provided for watermarking a machine learning model used for object detection or image classification. In the method, a first subset of a labeled set of ML training samples is selected. The first subset is of a predetermined class of images. In one embodiment, the first pixel pattern is selected and sized to have substantially the same dimensions as each sample of the first subset or each bounding box in the case of an object detector. Each sample of the first subset is relabeled to have a different label than the original label. An opacity of the pixel pattern may be adjusted independently for different parts of the pattern. The ML model is trained with the labeled set of ML training samples and the first subset of relabeled ML training samples. Using multiple different opacity factors provides both reliability and credibility to the watermark.

Abstract: A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.

Abstract: A semiconductor device includes an emitter, a base, and a collector. A portion of the collector is located below a trench in a substrate. A collector silicide is located on at least a portion of a bottom portion of the trench and on at least a portion of a sidewall of the trench. The collector silicide structure is electrically coupled to a collector contact structure.

Abstract: Various embodiments relate to a method performed by a first wireless device for bandwidth negotiation for frame exchange in a TXOP with a second wireless device, including: announcing by the first wireless device a channel puncture scheme indicating whether some 20 MHz channels covering a BSS operating bandwidth are punctured or not; transmitting a frame to the second wireless device indicating a bandwidth for the frame exchange; receiving a frame from the second wireless device indicating a negotiated bandwidth for the frame exchange; and exchanging frames with the second wireless device using the negotiated bandwidth.

Abstract: A method for multi-antenna processing in multi-link wireless communication systems includes transmitting by a first MLD, a first capability defining a first number of Spatial Streams (SS) supported by the first MLD for a single link exchange over one of a subset of links from a plurality of links between the first MLD and a second MLD. A second capability is transmitted by the first MLD defining a second number of SS supported by the first MLD for each link of a multi-link exchange. At least one Radio Frequency (RF) chain of the first MLD is configured to enable communication over the subset of links from the plurality of links.

Abstract: There is disclosed herein an SOI IC comprising an integrated capacitor comprising a parallel arrangement of a metal-insulator-metal, MIM, capacitor, a second capacitor, a third capacitor, and a fourth capacitor: wherein the second capacitor comprises as plates the substrate and a one of a plurality of semiconductor layers having an n-type doping, and comprises the buried oxide layer as dielectric; the third capacitor comprises as plates the polysilicon layer and a further one of a plurality of semiconductor layers having an n-type doping, and comprises an insulating layer between the plurality of semiconductor layers and the metallisation stack as dielectric; and the fourth capacitor comprises as plates the polysilicon plug and at least one of the plurality of semiconductor layers and comprises the oxide-lining as dielectric, wherein the oxide lining and the polysilicon plug form part of a lateral isolation (DTI) structure.

Abstract: Various embodiments relate to an inline encryption engine in a memory controller configured to process data read from a memory, including: a first data pipeline configured to receive data that is plaintext data and a first validity flag; a second data pipeline having the same length as the first data pipeline configured to: receive data that is encrypted data and a second validity flag; decrypt the encrypted data from the memory and output decrypted plaintext data; an output multiplexer configured to select and output data from either the first pipeline or the second pipeline; and control logic configured to control the output multiplexer, wherein the control logic is configured to output valid data from the first pipeline when the second pipeline does not have valid output decrypted plaintext data available.

Abstract: A method for manufacturing a Zener diode includes implanting an N-type Buried Layer (NBL) with an N-type dopant in a first epitaxial layer, wherein the NBL comprises an NBL opening excluding the N-type dopant. A P-type Buried Layer (PBL) having a peak PBL doping concentration below the NBL is implanted. A second epitaxial layer is grown over the NBL. A P-type region (Plink) is implanted to couple to the PBL above the NBL opening, and to couple the Plink to an Anode electrode. An N-type region (Nlink) is implanted to couple the NBL to a Cathode electrode.

Abstract: A radar system, apparatus, architecture, and method are provided with a transmitter that produces a plurality of distinct FanTOM signals that are transmitted as N RF-encoded transmit signals in an overlapped fashion such that the pulse repetition interval and frame length are kept short; a receiver that processes target return signals reflected from the N RF-encoded transmit signals with a mixer to produce an IF signal which is filtered with one or more notch filters clocked with a sampling clock frequency to control harmonic notch frequencies to suppress transmitter spill-over and close-in self-clutter interference, thereby producing a filtered IF signal that is converted to a digital signal with an analog-to-digital converter that is clocked with the sampling clock frequency; and a radar processor that processes the digital signal to generate a range spectrum comprising N segments that correspond, respectively, to the N RF-encoded transmit signals.

Abstract: A lead frame used to assemble a semiconductor device, such as a smart card, has a first major surface including exposed leads and a second major surface including a die receiving area and one or more connection pads surrounding the die receiving area. The connection pads enable electrical connection of an Integrated Circuit (IC) die to the exposed leads. A molding tape sized and shaped like the lead frame is adhered to and covers the second major surface of the lead frame. The molding tape has a die receiving area cut-out that exposes the die receiving area and the connection pads on the second major surface of the lead frame and forms a cavity for receiving an encapsulant. The cut-out has an elevated sidewall for retaining the encapsulant within the cavity.

Abstract: A method for protecting a machine learning model is provided. In the method, a first machine learning model is trained, and a plurality of machine learning models derived from the first machine learning model is trained. Each of the plurality of machine learning models may be different from the first machine learning model. During inference operation, a first input sample is provided to the first machine learning model and to each of the plurality of machine learning models. The first machine learning model generates a first output and the plurality of machine learning models generates a plurality of second outputs. The plurality of second outputs are aggregated to determine a final output. The final output and the first output are classified to determine if the first input sample is an adversarial input. If it is adversarial input, a randomly generated output is provided instead of the first output.

Abstract: Various embodiments relate to a circuit system, including: an original circuit; a dual circuit, wherein the dual circuit is a dual of the original circuit; an input inverter connected the dual circuit, wherein the input inverter inverts system inputs; an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit; and a comparator receiving and comparing the output of the invertor and the output of one of the original circuit and the dual circuit not connected to the inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.

Abstract: Exemplary aspects for a specific example concern a radar system having sensor circuitry including multiple radar sensors to provide sensor data via multiple virtual channels and multiple data types, a memory circuit with memory buffers, and a bus-interface circuit to control bus interconnects for bus communications involving a radar signal transmitter and the memory circuit. Radar signals are received and processed, via data acquisition path circuitry in multiple circuit paths and via streams of data in response to and to accommodate the operations of the sensor circuitry. A master controller conveys data, via the bus-interface circuit, to the buffers for the sensor data, and generates selectable-type transactions to be linked in selected ones of the buffers, in response to the data provided from the sensor circuitry and based on the sensor data being provided via different ones of the multiple virtual channels and of the multiple data types.

Abstract: In accordance with a first aspect of the present disclosure, a near field communication (NFC) device is provided, comprising: a communication unit configured to be communicatively coupled to an NFC reader; a processing unit configured to use a plurality of emulated cards for executing one or more applications; a profile determination unit configured to determine a polling profile of said NFC reader; and a card selection unit configured to select a specific one of said emulated cards for use by the processing unit in dependence on the polling profile determined by the profile determination unit. In accordance with a second aspect of the present disclosure, a corresponding method of operating a near field communication (NFC) device is conceived. In accordance with a third aspect of the present disclosure, a corresponding computer program is provided.

Abstract: A mechanism is provided to maximize utilization of internal memory for packet queuing in network devices, while providing an effective use of both internal and external memory to achieve high performance, high buffering scalability, and minimizing power utilization. Embodiments initially store packet data received by the network device in queues supported by an internal memory. If internal memory utilization crosses a predetermined threshold, a background task performs memory reclamation by determining those queued packets that should be targeted for transfer to an external memory. Those selected queued packets are transferred to external memory and the internal memory is freed. Once the internal memory consumption drops below a threshold, the reclamation task stops.

Abstract: Embodiments of a device and method are disclosed. In an embodiment, a method of communications involves at a communications device, receiving a request for changing a network parameter of the communications device and at the communications device, granting or denying the request based on link status information that is stored in the communications device, where the link status information specifies a link failure status of a communications link within a wired communications network that involves the communication device.

Abstract: Embodiments of a method and an apparatus for multi-link data transmission are disclosed. In an embodiment, a method for communications involves at a first device, transmitting, to a second device, a trigger frame that solicits at least one Physical layer Protocol Data Unit (PPDU) for uplink transmission, wherein the trigger frame includes a standard-compatible common info field that includes a trigger type field and a standard-compatible user info list field that includes at least one user info field, wherein the trigger frame includes a solicited Trigger-Based (TB) type indicator in a field in the trigger frame other than the trigger type field, and receiving, at the first device, at least one PPDU from the second device in response to the solicited TB type indicator that was transmitted in the trigger frame by the first device.

Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.

Abstract: A ground switch is disclosed. The ground switch includes an antenna port, a pair of switching devices coupled with the antenna port and a charge pump coupled with the pair of devices and configured to turn on/off the pair of devices based on an AC input signal received through the antenna port and a DC offset voltage added to the AC input signal. The ground switch further includes a clamping circuit to clamp an output of the charge pump. The ground switch is configured to provide a stable ground to components of devices such that a radio frequency identification (RFID) device.

Abstract: A system, method, and apparatus are provided for handling communications with external communication channel hardware devices by a processor executing event-based programming code to interface a plurality of virtual machines with the external communication channel hardware devices by providing the processor with an event latch for storing hardware events received from the external communication channel hardware devices, with a timer circuit that generates a sequence of timer interrupt signals, and with a masking circuit that masks the hardware events stored in the event latch with an event mask in response to each timer interrupt signal, where each event mask is associated with a different virtual machine running on the processor such that each virtual machine is allowed to communicate only on a masked subset of the hardware events specified by the event mask to ensure freedom from interference between the plurality of virtual machines when communicating with the external communication channel hardware device