Patents Assigned to NXP
  • Publication number: 20110264249
    Abstract: A planar audio tracking system comprises a square array of four microphones (M1, M2, M3, M4) arranged as first and second cross-dipole microphones and a virtually constructed monopole microphone. The signals from these microphones undergo directional pre-processing and the results are applied to a filtered sum beamformer (FSB) (32). The FSB identifies functions (hd (0), hd (?/2), and hm) of the FSB which are representative of impulse responses from desired audio source(s) to the first and second cross-dipole and the monopole microphone, respectively. The functions of the first cross-dipole and the monopole microphones and the functions of the second cross-dipole and the monopole microphones are cross correlated to produce respective estimates (?c(l) and ?s(l)) representative of the lag of the most dominant audio source. An angle-estimate ({circumflex over (?)}) of the most dominant source is determined using the estimates of lag.
    Type: Application
    Filed: December 21, 2009
    Publication date: October 27, 2011
    Applicant: NXP B.V.
    Inventors: Rene Martinus Maria Derkx, Cornelis Pieter Janse
  • Publication number: 20110260635
    Abstract: A method of igniting a lamp is disclosed. The lamp may be a compact fluorescent lamp. The method is directed in particular to reducing or eliminating hard-switching of half-bridge switches driving a lamp. The method operates by reducing the on-time of at least one of the switches, in response to saturation of the ballast inductor. The method can operate immediately upon saturation of the ballast inductor, or allow a predetermined level of saturation. The method operates by increasing the slope of the sawtooth timing circuit.
    Type: Application
    Filed: December 21, 2009
    Publication date: October 27, 2011
    Applicant: NXP B.V.
    Inventors: Henricus Theodorus Petrus Johannes van Elk, Jeroen Kleinpenning
  • Publication number: 20110261599
    Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit, wherein the power conversion controller is configured to operate the switch according to: a variable frequency mode of operation for switching frequencies greater than a minimum threshold value; and a fixed frequency mode of operation at a switching frequency equal to the minimum threshold value.
    Type: Application
    Filed: December 29, 2010
    Publication date: October 27, 2011
    Applicant: NXP B.V.
    Inventors: Thomas Antonius DUERBAUM, Johann Baptist Daniel KUEBRICH, Hans HALBERSTADT, Frans PANSIER, Markus SCHMID
  • Publication number: 20110260267
    Abstract: A MEMS device and method, comprising: a substrate; a beam; and a cavity located therebetween; the beam comprising a first beam layer and a second beam layer, the first beam layer being directly adjacent to the cavity, the second beam layer being directly adjacent to the first beam layer; the first beam layer comprising a metal or a metal alloy containing silicon; and the second beam layer comprising a metal or a metal alloy substantially not containing silicon. Preferably the second beam layer is thicker than the first beam layer e.g. at least five times thicker, and the first beam layer comprises a metal or alloy containing between 1% and 2% of silicon. The second beam layer provides desired mechanical and/or optical properties whilst the first beam layer prevents spiking.
    Type: Application
    Filed: May 6, 2009
    Publication date: October 27, 2011
    Applicant: NXP B.V.
    Inventor: Robertus T. F. Van Schaijk
  • Publication number: 20110260782
    Abstract: A power supply regulator circuit uses a feedback loop to control current through a first output transistor from a power supply input to a regulated power supply output. The first output transistor is included in an integrated circuit. In order to avoid heating of the integrated circuit in excess of an acceptable level due to permanent supply of a high current through the first transistor, current through a second output transistor in parallel with the first transistor, but outside the integrated circuit is raised when it is detected that the current through the first output transistor exceeds a threshold level. The second output transistor outside the integrated circuit serves to take over supply of a part of the power supply current from first output transistor inside integrated circuit, when long term supply of that part from first output transistor would lead to undesirable heating of the integrated circuit. During a limited time interval a first transistor current above the threshold level is acceptable.
    Type: Application
    Filed: January 13, 2010
    Publication date: October 27, 2011
    Applicant: NXP B.V.
    Inventors: Martin Wagner, Henk Boezen, Clemens Gerhardus Johannes de Haas
  • Patent number: 8046401
    Abstract: A multiplier is able to multiply an input data value by a selected constant value in CSD form. The selected constant value has a plurality of pairs of bits, and the multiplier includes multiplexers, each controlled by a respective pair of bits of the selected constant value. Each of the multiplexers has a plurality of inputs, and is connected to receive the input data value, the inverse of the input data value, and all zeros on said inputs, and it is controlled such that it outputs either the input data value, the inverse of the input data value, or all zeros, depending on the values of the respective pair of bits of the selected constant value.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: October 25, 2011
    Assignee: NXP B.V.
    Inventors: Tianyan Pu, Lei Bi
  • Patent number: 8045533
    Abstract: Systems and methods according to the present invention provide arbitration methods, systems and devices which enable a WLAN transceiver (30) and a Bluetooth (BT) transceiver (32) to share the transmission medium. Various arbitration signals (BT, WL, RXIND and PRI) enable the transceivers to indicate a seizure of ownership of the medium as well as to accommodate special arbitration cases, e.g., priority packet transmission/reception. Some arbitration features are hardware programmable to provide design flexibility.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: October 25, 2011
    Assignee: NXP B.V.
    Inventor: Olaf Hirsch
  • Publication number: 20110258423
    Abstract: A computer processor 100 is provided which hides jump instructions, in particular condition jump instructions, from side-channels. The processor comprises a forward jump detector 254 for detecting a forward jump instruction having a jump target location which lies ahead and a jump inhibitor 262 for inhibiting an execution of the forward jump instruction. The computer processor is configured for executing at least one intermediate computer instruction located between the inhibited forward jump instruction and the jump target location. The processor further comprises a storage destination modifier 260, 262 for modifying the storage destination determined by the at least one intermediate computer instruction to suppress the effects of execution of intermediate instructions. Since the intermediate instruction is executed regardless of the forward jump instruction, the jump is hidden in a side-channel. Secret information, such as cryptographic keys, on which the forward jump may depend, is also hidden.
    Type: Application
    Filed: February 4, 2011
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventor: Jan HOOGERBRUGGE
  • Publication number: 20110256634
    Abstract: A method of performing a measurement with a sensor having a sensing surface and at least one capture molecule attached to the sensing surface for forming a binding pair with an analyte of interest, the binding pair having a flexible spatial orientation, the method comprising capturing the analyte of interest with the capture molecule, thereby forming the binding pair in an initial spatial orientation; applying a first electromagnetic force to the sensing surface to alter the spatial orientation of the binding pair; and performing a sensor measurement with the binding pair in the altered spatial orientation. A sensor apparatus implementing this method is also disclosed.
    Type: Application
    Filed: February 18, 2011
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventor: Friso Jacobus JEDEMA
  • Publication number: 20110255314
    Abstract: A power supply module having a PFC stage has a hold-up capacitor (34) for continuing output power for a time after an ac power supply (2) stops. The hold-up capacitor is charged by a winding (40) driven magnetically from a first winding (24); the first winding (24) may be the winding used in a boost converter stage, such as commonly used in a PFC stage, or alternatively the winding in an alternative stage such as a flyback converter.
    Type: Application
    Filed: December 21, 2009
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventors: Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Marcus Schmid, Hans Halberstadt
  • Publication number: 20110254630
    Abstract: A power amplifier, for example a class-E switching power amplifier, and corresponding method, comprising: a plurality of power transistors (16), for example twelve power transistors, providing a partitioned power transistor; and a voltage sensing module (22), comprising for example voltage dividers and inverters, digitally sensing the drain voltage (2) of the partitioned power transistor to control the number of power transistors of the plurality of power transistors (16) that are switched on or off thereby controlling the drain voltage (2) which is varying for example due to antenna mismatch. The power amplifier may further comprise a memory (24) coupled to the voltage sensing module (22) for storing a history of the drain voltage (2), e.g. a history of antenna mismatch.
    Type: Application
    Filed: December 11, 2009
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventors: Mustafa Acar, Mark Pieter Van Der Heijden, Melina Apostolidou
  • Publication number: 20110254717
    Abstract: Analog to digital conversion is performed by sampling an input voltage followed by AD conversion of the sampled voltage. In the sample and hold circuit a differential amplifier output voltage is generated between the first and second output of a differential amplifier in response to the sampled input voltage. A conversion polarity is selected by connecting the one output or the other of the differential amplifier to a circuit node in an AD conversion circuit using a first or second switch. These switches from both outputs of the differential amplifier to the same circuit node of the AD conversion circuit are both made conductive simultaneously prior to making the selected one of the first and second switch conductive. In this way, the amplifier output voltage is reset without requiring a dedicated switch just for this purpose.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventors: Hans VAN DE VEL, Berry Anthony Johannus BUTER
  • Publication number: 20110254529
    Abstract: A voltage converter comprises at least two capacitive charge pump stages, each comprising a capacitor, a charging switch through which a capacitor charging current is adapted to flow, and a control circuit for controlling the charging switch. wherein the control circuit for at least one charge pump stage comprises current limiting means for limiting the current through the charging switch. By limiting the current flowing through the switch, current spikes are avoided, which reduces high frequency distortion.
    Type: Application
    Filed: April 18, 2011
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventor: Bram van Straaten
  • Publication number: 20110254141
    Abstract: The invention relates to a semiconductor device comprising a physical structure (50) for use in a physical unclonable function, wherein the physical structure (50) comprises a lead-zirconium titanate layer (25), and a silicon-comprising dielectric layer (27) deposited on the lead-zirconium-titanate layer (25), wherein the silicon-comprising dielectric layer (27) has a rough surface (SR), the physical structure (50) further comprising a conductive layer (30) provided on the rough surface (SR) of the silicon-comprising dielectric layer (27). The invention further relates to a method of manufacturing such semiconductor device. The invention also relates to a card, such as a smartcard, and to a RFID tag comprising such semiconductor device. The inventors have found that depositing of a silicon- comprising dielectric layer (27) on a lead-zirconium titanate layer (25) using vapor deposition results in a silicon-comprising dielectric layer (27) having a rough surface (SR).
    Type: Application
    Filed: December 21, 2009
    Publication date: October 20, 2011
    Applicant: NXP B.V.
    Inventors: Aarnoud Laurens Roest, Linda Van Leuken-Peters, Robertus Andrianus Maria Wolters
  • Publication number: 20110251955
    Abstract: A smart card (40) is distributed to a cardholder in a non-operative form, with a digital token. The token is sent, via a near field communication interface, to a wireless communication device (10) and forwarded to a verification entity (30) via a wireless communication interface. The communication device (10) receives content for the smart card and sends the content to the smart card (40) to render it into an operative form. A transaction on a cardholder's account is authorised by a process which comprises sending a notification of the transaction to a wireless communication device and notifying the user of the transaction via a user interface of the device. A user can approve the transaction by bringing the smart card within range of the communication device and sending a card identifier via a near field communication interface.
    Type: Application
    Filed: December 9, 2009
    Publication date: October 13, 2011
    Applicant: NXP B.V.
    Inventor: Alister Lam
  • Publication number: 20110248832
    Abstract: A non-contact communication device is disclosed comprising: an antenna having an input impedance and being for receiving an AC signal having a voltage and a current, a main unit comprising a power-extraction unit and a communication unit and having a main unit impedance, a tuning circuit, and a matching network for matching the input impedance to the main unit impedance, characterised in that the tuning circuit comprises a phase detector for detecting a phase difference between the voltage and the current and is configured to adjust the impedance of the matching network in dependence on the phase difference. Also disclosed is a method for tuning a non-contact communication device.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 13, 2011
    Applicant: NXP B.V.
    Inventors: Rachid EL WAFFAOUI, Giuliano MANZI
  • Publication number: 20110248673
    Abstract: It is provided an apparatus for transferring energy to an accumulator, the apparatus having a core and a wire wound around the core thereby forming a coil, wherein the coil is adapted to receive energy from a magnetic field, wherein the wire is connectable to the accumulator to transfer the received energy to the accumulator. A charging station for generating a magnetic field for transferring energy to an accumulator is provided, and a system for charging an electric accumulator is provided, wherein the system includes an apparatus as described above; and a charging station having a further wire wound such as to form a further coil.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 13, 2011
    Applicant: NXP B.V.
    Inventors: Steven AERTS, Steven Mark THOEN, Steven DAENEN
  • Patent number: 8035362
    Abstract: A power supply system comprises a parallel arrangement of a linear amplifier (LA) and a DC-DC converter (CO). An output of the linear amplifier (LA) is directly coupled to a load (LO) for supplying a first current (II) to the load (LO). The DC-DC converter (CO) has a converter output coupled to the load (LO) for supplying a second current (12) to the load (LO). The linear amplifier (LA) comprises a first amplifier stage (OS1) to supply the first current (II), and the second amplifier stage (OS2) to generate a third current (13) being proportional to the first current (II). The first amplifier stage (OS1) and the second amplifier stage (OS2) have matched components. The DC-DC converter (CO) further comprises a controller (CON) having a control input for receiving a voltage generated by the third current (13) to control the second current (12) for minimizing a DC-component of the first current (II).
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: October 11, 2011
    Assignee: NXP B.V.
    Inventor: Pieter G. Blanken
  • Patent number: 8035565
    Abstract: An antenna device (AD) for a RF communication equipment, comprises i) a substrate (S) comprising front (FS) and back (BS) sides, ii) a planar antenna element (AE) fixed to the substrate back side (BS), iii) a group of at least one component (G1) fixed to the substrate front side (FS), in an area located under the antenna element (AE), and connected to the antenna element (AE) through at least a first connecting means (VH 1) passing through the substrate (S), and a low resistivity layer (BL) buried into the substrate (S) for connecting to ground in order to isolate at least the group of component(s) from electromagnetic disturbances induced by the antenna element (AE).
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: October 11, 2011
    Assignee: NXP B.V.
    Inventor: Patrice Gamand
  • Patent number: 8037503
    Abstract: The disclosure relates to a method of caching a part of digital content data from a content source (202), comprising the step of: acquiring the digital content data from the content source (202), wherein said part of the digital content data comprises interleaved segments (130; 131) of the acquired digital content data, and said interleaved segments (130; 131) of the acquired digital content data are stored on first storage means (203), thereby allowing for fast access to said digital content data. The disclosure moreover relates to a device for carrying out such a method. The content sources can be DVD, CD, CD-ROM, hard disk, RAM, Flash memory or remote sources accessible over a network, such as the Internet.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: October 11, 2011
    Assignee: NXP B.V.
    Inventor: Steven G. E. Aerts