Abstract: A processing system for executing instructions comprises a first part (11) having address information and a plurality of data bits, E0 to EN. According to one embodiment, each data bit E0 to EN directly selects a corresponding element 130 to 13N forming a second part of the instruction set (for example a VLIW). In this manner, the first part (11) is used to only select elements that do not comprise NOP instructions, thereby avoiding power being consumed unnecessarily. According to an alternative embodiment, different groups of elements in the second part (13) may be selected by a number encoded in the first part (11), using data bits Eo to EN. Preferably, these different groups reflect the most likely used combinations in a program.

Abstract: A pulse width modulation (PWM) circuit comprises a first integrator (g m1) with a first feedback capacitor (C1), a second integrator (gm1) with a second feedback capacitor (C2) and a comparator (A0) having a first input (V1) connected to the output of the first integrator (gm1) and a second input (V2) connected to the output of the second integrator (gm2). A connection path comprising a resistor (R2) is established from the output of the first integrator (gm1) to an input of the second integrator (gm2). The first and second feedback capacitors (C1, C2) have capacities with a non-linear factor X(V) and a circuit with an inversely non-linear factor X?1(V) is arranged in the connection path between the output of the first integrator (gm1) and said input of the second integrator (gm2). The PWM circuit may form path of a Class-D amplifier.

Abstract: The invention provides a method and a device for determining the temperature of a semiconductor substrate. A resonance circuit (110) is provided on the semiconductor substrate and is formed by a junction capacitor (11) and an inductor (12). The substrate is placed on a holder and the resonance circuit (110) is irradiated with electromagnetic energy of an electromagnetic field (5) generated by a radiation device (200). A resonance frequency of the resonance circuit (110) is determined by detecting an effect of the resonance circuit (110) on the irradiated electromagnetic field (5), and a temperature of the semiconductor substrate is determined as a function of the resonance frequency. The method and device according to the invention provide for a more accurate determination of the temperature of the semiconductor substrate due to an increased sensitivity to the temperature of the junction capacitor (11).

Abstract: In order to provide a communication protocol for cryptographic authentication on the basis of at least one cryptographic algorithm, in particular according to the A[dvanced]E[ncryption]S[tandard], by providing at least one random number (PRN?) for at least one first, in particular present, authentication sequence or authentication session (n), and providing at least one further random number (PRN2, PRN3) for at least one further, in particular second or next, authentication sequence or authentication session (n+1), wherein the relevant time for cryptographic authentication is shortened, it is proposed that providing the further random number (PRN2, PRN3) is initialized (p) when, in particular immediately after, successfully performing the authentication in the first authentication sequence or authentication session (n).

Abstract: A memory region protection unit is disclosed that comprises a first register for storing a memory region address, a second register for storing the memory region size, an arithmetic function block for executing an arithmetic function on a memory address provided to the region protection unit and the address value in the first register. The unit further has a comparator for comparing the output of the arithmetic function block with the size value in the second register, the comparator being coupled to an output for signalling the validity of the memory address on the bus The region protection unit has a controller configured to retrieve the memory region address and the memory region size from instructions issued to the region protection unit for associating the unit with said region, and to dissociate the unit from its memory region in response to a further instruction.

Abstract: The present invention relates to an electronic device for driving at least a first channel and a second channel of light emitting diodes. The electronic device includes driving means having a first and a second driving portion for driving the first and the second channel of light emitting diodes separately, and configuration means for providing configurability of the driving means for using the driving means at least partially in a shared manner for more than one channel of light emitting diodes.

Abstract: The power amplifier module comprises a laminate substrate comprising thermal vias and terminals, as well as a platform device with an interconnection substrate of a semiconductor material. This substrate is provided with electrical interconnects at a first side, and having been mounted on the laminate substrate with an opposite second side. Electrically conducting connections extend from the first to the second side through the substrate. A power amplifier device is attached to the second side of the substrate. One of the electrically conducting connection through the interconnection substrate is a grounding path for the power amplifier, while a thermal path is provided by the semiconductor material. There is an optimum thickness for the interconnection substrate, at which both a proper grounding and a acceptable thermal dissipation is effected.

Abstract: A system and method for Cartesian modulation achieved via generation of a three-level pulse width modulated signal. The system in overview comprises two binary pulse width modulated signal generators receiving signals related to the in-phase and quadrature components of a base-band signal and a combination and amplification stage that combines the signals provided by the two binary pulse width modulated signal generators. The binary pulse width modulated signal generators contain at least one signal comparator and at least one base-band pre-distortion element. The signals related to the in-phase and quadrature components of the base-band signal may be; the positive or negative parts of the in-phase component, the positive or negative parts of the quadrature component, the absolute value or sign of the in-phase component, or the absolute value or sign of the quadrature component. These signals may be distorted by a base-band pre-distortion element before being coupled to the comparators.

Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.

Abstract: A quadrature out-phasing system comprising: a first baseband signal modifier (6) arranged to receive a first baseband signal component (2) and output a first constant envelope RF carrier (12) and a second constant envelope RF carrier (14); and a second baseband signal modifier (8) arranged to receive a second baseband signal component (4) and output a third constant envelope RF carrier (16) and a fourth constant envelope RF carrier (18). The system may further comprise: a first signal combiner (500) arranged to combine the first constant envelope RF carrier (12) and the second constant envelope RF carrier (14), and arranged to output a first RF PWM signal (94); and a second signal combiner (502) arranged to combine the third constant envelope RF carrier (16) and the fourth constant envelope RF carrier (18), and arranged to output a second RF PWM signal (96).

Abstract: An AMR sensor, comprises at least first and second AMR sensor elements to which opposite bias fields are applied. The first and second AMR sensor element outputs are combined to derive a sensor response which is substantially anti-symmetric in the region close to zero external magnetic field. This arrangement shifts the zero detection point of the AMR sensor elements away from a maximum of the response curve, so that sensitivity in proximity to a zero input field is obtained. To overcome the problem that the response is not anti-symmetric, the signals from (at least) two sensor elements are combined.

Abstract: A method of gain calibration of an ADC stage is disclosed. The method comprises receiving an input analog signal, converting the input analog signal into an m-bit digital signal by means of an analog to digital converter, generating a calibration signal by means of a random number generator, adding the calibration signal to the m-bit digital signal to produce an adjusted m-bit digital signal, converting the adjusted m-bit digital signal into an adjusted partial analog signal by means of a digital to analogue converter, subtracting the partial analog signal from the input analog signal, to produce a residual analog signal, amplifying the residual analog signal. The method is characterised in that the calibration signal may take any one of three values. In a preferred embodiment, the calibration is constrained to one of only two of these three values, when the input signal is in an outermost sub-range. An ADC stage adapted to operate according to the method is also disclosed.

Abstract: An integrated circuit comprises at least first and second frequency generating circuits, wherein each frequency generating circuit comprises a reference frequency source; a voltage controlled oscillator; and a feedback control circuit for controlling the voltage controlled oscillator to provide a desired output frequency signal. The output of the voltage controlled oscillator of the first frequency generating circuit is switched into the feedback control circuit of the second frequency generating circuit to provide a test signal for testing one or more components of the feedback control circuit of the second frequency generating circuit.

Abstract: A millimetre-wave radio antenna module (600) comprising: an antenna substrate (603) having an antenna (602) provided on a face thereof; and a semiconductor die (601) comprising a wireless system IC, the die mounted on a face of the antenna substrate and configured to provide a signal to the antenna, wherein a ball grid array (605) is formed on a face of the antenna substrate for mounting the antenna module to a circuit board, the ball grid array being configured to define an air dielectric gap (606) between the antenna and the circuit board.

Abstract: The present invention relates to a dimmer control circuit (100) capable to detect whether a phase-cut dimmer is connected using an average signal (VDCI) derived from the mains voltage. The average signal (VDCI) or a signal (VDCI_ls) derived from (VDCI), ranging from a minimum value to a maximum value, is compared to a dimming threshold (Vdim_th) through a phase-cut detecting unit (20). The comparison result is used to control the state diagram of a dimmer control logic (40) by selecting the step dimming mode (STD) or the phase-cut dimming mode (PCD). The output (OUT) of a switching unit (30) is determined by the state diagram of the dimmer control logic (40) in such a manner that the phase-cut dimming mode (PCD) is prioritized above the step-dimming mode (STD) and the maximum level of the STD states is depending on the mains voltage and application adjustable.

Abstract: A method for detecting speech using a first microphone adapted to produce a first signal (x), and a second microphone adapted to produce a second signal (x2), the method comprising the steps of: (i) applying gain to the second signal to produce a normalised second signal, which signal is normalised relative to the first signal; (ii) constructing one or more signal components from the first signal and the normalised second signal; (iii) constructing an adaptive differential microphone (ADM) having a constructed microphone response constructed from the one or more signal components which response has at least one directional null; (iv) producing one or more ADM outputs (yf, yb) from the constructed microphone response in response to detected sound; (v) computing a ratio of a parameter of either a first signal component or a constructed microphone response to a parameter of an output of the ADM; (vi) comparing the ratio to an adaptive threshold value; (vii) detecting speech if the ratio is greater than or equ

Abstract: A probe electrode structure on a substrate is described, comprising a first probe electrode and a neighboring second probe electrode on a layer sequence that generally includes, in a direction from the substrate to the probe electrodes, an electrically conductive bottom layer, an electrically insulating center layer and a electrically conductive top layer. The probe-electrode structure of the invention provides a means to detect an undercutting of the first probe electrode in an etching step that aims at removing the top layer from regions outside the first probe electrode. An undercutting that exceeds an admissible distance from the first edge of the first electrode will remove the first top-layer probe section in the first probe opening, which causes a detectable change of the electrical resistance between the first and second probe electrodes.

Abstract: A method for manufacturing on a substrate a semiconductor device with improved floating-gate to control-gate coupling ratio is described. The method comprises the steps of first forming an isolation zone in the substrate, thereafter forming the floating gate on the substrate, thereafter extending the floating gate using polysilicon spacers, and thereafter forming the control gate over the floating gate and the polysilicon spacers. Such a semiconductor device may be used in flash memory cells or EEPROMs.

Abstract: The invention relates to a method of determining a plaintext M on the basis of a cipher C and using a secret key d, wherein the secret key d is used in binary form, wherein the plaintext M is determined in each iteration step i for the corresponding bit di and a security variable Mn is determined in parallel therewith, and then a verification variable x is determined by means of a bit-compatible exponent of the secret key d.

Abstract: The present invention relates to an electrical connector for a first IC, comprising a second IC (12) carrying ESD protection, the second IC (12) being integrated into the connector (8), which enhances the ESD protection and preserves the RF performance of such connector (8). The present invention further relates to a method for making an electrical connector (8) for a first IC, comprising this step of providing ESD protection to the first IC by integrating a second IC (12) carrying ESD-protection into the connector (8).