Abstract: A conditional direct memory access (DMA) channel activation system for executing a complex data transfer in a system-on-chip, comprising: a look-up table constructed and arranged to store elements of an activation profile; and a trigger circuit that controls a DMA transaction according to the activation profile of the look-up table.

Abstract: A semiconductor device and fabrication method are described for integrating a nanosheet transistor with a capacitor or nonvolatile memory cell in a single nanosheet process flow by forming a nanosheet transistor stack (11-18) of alternating Si and SiGe layers which are selectively processed to form epitaxial source/drain regions (25A, 25B) and to form gate electrodes (33A-D) which replace the silicon germanium layers in the nanosheet transistor stack, and then selectively forming one or more insulated conductive electrode layers (e.g., 37/39, 25/55, 64/69) adjacent to the nanosheet transistor to define a capacitor or nonvolatile memory cell that is integrated with the nanosheet transistor.

Abstract: Systems, apparatuses and methods described herein provide a method for padding a signal extension of orthogonal frequency-division multiplexing (OFDM) symbols. A transceiver may obtain a plurality of data symbols for transmission, and determine that a number of information bits for a last symbol of the plurality of data symbols is not an integer value. A special padding rule may be applied to add padding bits to the last symbol. A number of coded bits for the last symbol may be determined when the number of information bits for the last symbol has changed, and the plurality of data symbols for data transmission may be encoded based on the determined number of coded bits for the last symbol.

Abstract: A method of acquiring data, a computer program product for implementing the method, a system for acquiring data, and a vehicle including the system. The method includes determining one or more data types and virtual channels required for one or more applications. The method also includes allocating a plurality of circular buffers in memory according to the determined data type(s) and virtual channel(s). One or more of the circular buffers are allocated to safety data lines. The remaining circular buffers are allocated to functional data lines. The method further includes storing at least one functional data line in a circular buffer allocated to functional data lines according to a data type and virtual channel of the functional data line. The method also includes storing at least one safety data line in a circular buffer allocated to safety data lines.

Abstract: A method for initial position detection of an electric motor includes determining a delta voltage for each of three pairs of stator windings by sequentially energizing and deenergizing each pair. The delta voltage is measured through a non-energized stator winding connected to a center tap of each respective pair. A minimum delta voltage is determined from an absolute value of a minimum of the three delta voltages. The minimum delta voltage is associated with a remaining stator winding not included in the respective pair. The two delta voltages not associated with the minimum delta voltage are compared to determine the proximity of the remaining stator winding to one of a D-axis of a rotor of the electric motor and a Q-axis of the rotor.

Abstract: An ESD protection circuit includes a trigger transistor that is responsive to a detection signal indicating an ESD event. The trigger transistor pulls the voltage of a hold node towards a voltage of a power supply rail in response to the detection signal indicating an ESD event. The ESD protection circuit includes a replica trigger transistor whose leakage current controls current provided to the hold node after the detection signal no longer indicates an ESD event to compensate for leakage current through the trigger transistor.

Abstract: A voltage regulator comprising a reference current generator coupled between a supply terminal and a reference terminal and configured to provide a reference current that is independent of an operating range of a supply voltage; and a regulator stage comprising: a current terminal configured to receive the reference current; a NMOS transistor having: a gate coupled to the current terminal; a drain coupled to the supply terminal; and a source coupled to an output terminal; a voltage reference circuit for providing a regulated output voltage coupled between the output terminal and the reference terminal, the voltage reference circuit comprising an output resistor coupled in series with a conduction channel of an output bipolar transistor arranged in a diode-connected configuration; an input bipolar transistor having: a conduction channel coupled between the current terminal and the reference terminal; and a base terminal coupled to a base terminal of the output bipolar transistor.

Abstract: A sigma delta modulator comprises an input configured to receive an input analog signal; a summing junction configured to subtract a feedback analog signal from the input analog signal; a first stage including a low pass filter coupled to the summing junction, wherein the low pass filter is configured to generate a first filtered signal; a second stage coupled to the low pass filter, configured to generate a second filtered signal by an active filter; a back-end stage coupled to the second stage, wherein the back-end stage comprises an analog to digital converter configured to convert the 2nd filtered signal to a digital output signal by sampling at a predetermined sampling frequency (fs); and a feedback path for routing the digital output signal to the summing junction, wherein the feedback path comprises a digital to analog converters, DAC, converting the digital output signal to the feedback analog signal.

Abstract: Embodiments of power-on reset (POR) circuits are described. In one embodiment, a POR circuit includes a primary ladder circuit connected to a supply voltage and configured to generate a reference signal for a reset signal in response to the supply voltage and a secondary ladder circuit connected to the supply voltage and configured to bias the primary ladder circuit in response to the supply voltage.

Abstract: A first wireless communication device receives a packet from a second wireless communication device, the packet having information indicating that the second wireless communication device is relinquishing control of a wireless communication medium. The first wireless communication device determines whether the packet was transmitted in a wireless network to which the first wireless communication device belongs, and determines whether a network allocation vector (NAV) timer of the first wireless communication device was most recently set in connection with a transmission from the wireless network to which the first wireless communication device belongs. When i) the packet was transmitted in the wireless network to which the first wireless communication device belongs, and ii) the NAV timer was most recently set in connection with a transmission from another wireless network to which the first wireless communication device does not belong, the NAV timer is not reset.

Abstract: An initialization circuit of a delay locked loop (DLL) includes a sense circuit and a control circuit. The sense circuit receives an enable signal, a reference clock signal, and various delayed reference clock signals, and outputs another enable signal. The control circuit receives the two enable signals and outputs and provides a control signal to a loop filter of the DLL to control a delay value associated with the DLL. The control signal is provided to the loop filter such that the delay value associated with the DLL equals a predetermined delay value for a predetermined time duration. Further, after a lapse of the predetermined time duration, the delay value associated with the DLL increases until a difference between a time period of the reference clock signal and the delay value equals a threshold value.

Abstract: Embodiments of a method and an apparatus for multi-link operations are disclosed. The method involves at a multi-link device (MLD) that supports a first link, link1, and a second link, link2, announcing at least one of a capability, Basic Service Set (BSS) operating parameter, and operating mode of an AP affiliated with an AP MLD in a reported link, and at least one of a capability, Basic Service Set (BSS) operating parameter, and operating mode of an AP affiliated with an AP MLD in a reporting link via a management frame on the reporting link.

Abstract: In accordance with a first aspect of the present disclosure, an enrollment device is provided, comprising: a token interface unit configured to couple the enrollment device to an external user authentication token; a user interface unit configured to provide visual information to a user through a plurality of optical output elements, said visual information being indicative of a progress of a biometric template enrollment in the authentication token; a user interface control unit configured to receive input data indicative of said progress from the authentication token through the token interface unit and to control the user interface unit using said input data.

Abstract: Embodiments of a method and device for multi-link communications are disclosed. In an embodiment, a method of multi-link communications involves, at a multi-link STA device (STA MLD) that supports a first link, link1, and a second link, link2, receiving a beacon on link2, acquiring an updated critical operating parameter for link1 in response to the beacon received on link2, and operating link1 according to the acquired updated critical operating parameter.

Abstract: Duty cycles of pulse width modulation (“PWM”) pulses are determined by measurements taken with respect to an internally generated clock signal. One of these measurements calculates, in a continuous dynamic manner, a ratio of the number of cycles of the internally generated clock signal to one or more cycles of a PWM clock signal utilized as a time base for generation of the PWM pulses. This clock ratio measurement designates how many cycles of the internally generated clock signal will be used to designate a first portion of a duty cycle for each PWM pulse. Another measurement is utilized to determine a fractional portion of a cycle of the internally generated clock signal that will be used to designate a second portion of the duty cycle for each PWM pulse.

Abstract: A method is provided for soft starting a single inductor multiple output (SIMO) power supply. The method includes selecting operation in a pulse width modulation (PWM) mode. A first pulse frequency modulation (PFM) mode is enabled to supply a first load with a first voltage and the power supply begins to ramp up the output voltage. After the output voltage has reached a desired value in the PFM mode, the PFM mode is disabled. Then, operation is enabled in the PWM mode. The SIMO power supply then supplies a current to one or more loads in the PWM mode.

Abstract: Various embodiments relate to a method for masked decoding of a polynomial a using an arithmetic sharing a to perform a cryptographic operation in a data processing system using a modulus q, the method for use in a processor of the data processing system, including: subtracting an offset ? from each coefficient of the polynomial a; applying an arithmetic to Boolean (A2B) function on the arithmetic shares of each coefficient ai of the polynomial a to produce Boolean shares âi that encode the same secret value ai; and performing in parallel for all coefficients a shared binary search to determine which of coefficients ai are greater than a threshold t to produce a Boolean sharing value {circumflex over (b)} of the bitstring b where each bit of b decodes a coefficient of the polynomial a.

Abstract: There is described a rectifier circuit for providing and limiting a supply voltage to an RFID tag, the circuit including a pair of antenna input terminals configured to receive an input signal from an RFID tag antenna. A plurality of charge pump stages are coupled in cascade in such a way that an input terminal of a first charge pump stage in the cascade is connected to ground and an input terminal of each subsequent charge pump stage in the cascade is coupled to an output terminal of the preceding charge pump stage in the cascade. A control logic is configured to select the output terminal of one charge pump stage among the plurality of charge pump stages to provide the supply voltage. Furthermore, an RFID tag and a method of providing and limiting a supply voltage to an RFID tag are described.

Abstract: A Controller Area Network (CAN) transceiver determines a voltage differential signal from analog signaling and provides a digital output signal at a receiver output to a CAN controller based on the voltage differential signal. The analog signaling received from the CAN bus can operate with a first voltage level scheme of a first CAN protocol and a second voltage level scheme for a second CAN protocol. A first comparator compares the voltage differential signal to a first threshold which is set to a value which differentiates between a logic low bit and logic high bit in accordance with the second CAN protocol. Filtering circuitry selectively filters an output of the first comparator based on detection of noise on the CAN bus to provide a first digital signal indicative of activity on the CAN bus according to the second CAN protocol.

Abstract: A data processing system and a method are provided for acquiring data for training a machine learning (ML) model for use in self-monitoring the data processing system. The data processing system operates in a data acquisition mode to acquire training data for training the ML model. The training data is acquired from an anomaly detector of the data processing system while operating in the data acquisition mode. At least a portion of the training data is determined to be biased, and a portion of the training data is unbiased. The unbiased portion of the training data is transferred to a training environment external to the data processing system. The unbiased portion of the training data is acquired for training the ML model to function with the anomaly detector during a normal operating mode to determine when an anomaly is present in the data processing system.