Abstract: An electrical power converter includes a transformer (4) with a primary circuit and a secondary circuit. Detecting circuitry is employed to compute a signal representative of the output current in the secondary circuit, and this signal controls the timing of the switching function of rectification switches (49,50) which rectify the secondary AC signal.

Abstract: A device (100) for processing a signal, wherein the device (100) comprises a processing unit (101) comprising an input terminal and two output terminals, wherein the processing unit is adapted for receiving a signal (104) at the input terminal, and wherein the processing unit is adapted for generating a reduction signal based on the signal, wherein the reduction signal is adapted for reducing the signal. The device comprises further a first reproduction unit (102) coupled to the first output terminal of the processing unit, wherein the first reproduction unit is adapted for receiving and reproducing the signal, and a second reproduction unit (103) coupled to the second output terminal of the processing unit, wherein the second reproduction unit is adapted for receiving and reproducing the reduction signal.

Abstract: The present invention relates to a calibration circuit, computer program product, and method of calibrating a junction temperature measurement of a semiconductor element, wherein respective forward voltages at junctions of the semiconductor element and a reference temperature sensor are measured, and an absolute ambient temperature is determined by using the reference temperature sensor, and the junction temperature of the semiconductor element is predicted based on the absolute ambient temperature and the measured forward voltages.

Abstract: An RF receiver comprising: an amplifier configured to receive an RF signal over an input bandwidth and to provide an amplified RF signal; an equalizer circuit connected to the amplifier to receive the amplified RF signal and configured to provide an equalized RF signal; a converter module connected to the equalizer circuit and comprising an analog to digital converter configured to convert the equalized RF signal to a digital signal; and a digital signal processing module connected to the receiver module and configured to process the digital signal to provide a plurality of channels at an output of the receiver, wherein the digital signal processing module is further configured to process the digital signal to determine a measure of tilt in the RF signal across the input bandwidth and is connected to the equalizer circuit to provide a control signal for adjusting the measured tilt.

Abstract: A method of providing a value for each element of a sequence of elements in a converter, the values being for a present conversion cycle in operation of the converter, wherein a pointer position identifies an element in the sequence of elements for a conversion cycle.

Abstract: The present invention relates to a spectrum sensing scheme for a radio network. The proposed approach involves applying sensing in a distributed fashion to obtain an estimate of the signal spectrum. A network of the multiple sensing nodes (200-1 to 200-J) obtains such a spectrum estimate without requiring high-speed analog-to-digital converter to accommodate the large band-width of interest.

Abstract: A location tracking unit for use with a location based service system is presented. The location tracking unit comprises: a navigation receiver adapted to implement a location tracking function; data processing means adapted to determine an occupied location according to a first location matching process, the first location matching process using navigation data from the navigation receiver and a first set of geographic data; and data processing means adapted to verify the integrity of the first location matching process based on a second location matching process using navigation data and a second set of geographic data.

Abstract: A basic symmetric ?/2 phase-detector receives four control signals that control a differential current at the detector's output. Each respective control signal is a linear combination of a respective pair of signals chosen from a first input signal, its logic complement, a second input signal and the logic complement of the latter. Operation is based on time-averaging the differential current, the result being zero at a phase difference of ?/2. By means of adding one or more additional current sources to the output, controlled by one or more of the control signals, the basic operation is skewed. The time-averaged output current is now made zero only at a value of the phase difference different from ?/2.

Abstract: An analog sample-and-hold switch has parallel branches extending from an input node to an output node connected to a hold capacitor, each branch having a PMOS signal switch FET in series with a PMOS dummy FET. A sample clock controls on-off switching of the PMOS signal switch FETs, and an inverse of the sample clock controls a complementary on-off switching of the PMOS dummy FETs. A bias sequencer circuit biases the PMOS signal switch FETs and biases the PMOS dummy FETs, in a complementary manner, synchronous with their respective on-off states. The on-off switching of the PMOS dummy FETs injects charge cancelling a charge injection by the PMOS signal switch FETs, and injects glitches cancelling glitches injected by the PMOS signal switch FETs.

Abstract: A headphone system includes sound processor which calculates properties of the environment from signals from an internal microphone and an external microphone. The impulse response of the environment may be calculated from the signals received from the internal and external microphones as the user speaks.

Abstract: A sample-and-hold feed switch has parallel PMOS branches and parallel NMOS branches, each extending from an input node to an output node connected to a hold capacitor. Each PMOS branch has a PMOS switch FET connected to a matching PMOS dummy FET, and each NMOS branch has an NMOS switch FET connected to a matching NMOS dummy FET. A sample clock switches the PMOS switch FETs on and off, and a synchronous inverse sample clock effects complementary on-off switching of the PMOS dummy FETs. Concurrently, a synchronous inverse sample clock switches the NMOS switch FETs on and off, and the sample clock effects a complementary on-off switching of the NMOS dummy FETs. A bias sequencer circuit biases the bodies of the PMOS switch FETs and the bodies of the PMOS dummy FETs, in a complementary manner, and biases the NMOS switch FETs and the NMOS dummy FETs, also in a complementary manner.

Abstract: A MEMS switch (1, 81), and methods of fabricating thereof, the switch comprising: a sealed cavity (24); and a membrane (26); wherein the sealed cavity (24) is defined in part by the membrane (26); and the membrane is a 5 metallic membrane (26), for example consisting of a single type of metal or metal alloy. The MEMS switch (1, 81) may comprise a top electrode (30), for example extending into the cavity (24), located in a hole (32) in the metallic membrane (26). Fabrication may include providing a sacrificial layer (22) in a partly defined cavity (24). The bending stiffness of the membrane (26) may be 10 higher along an RF line (102) than along a line (104) perpendicular to the RF line (102), for example by virtue of the cavity (24) being elliptical.

Abstract: A surge protection circuit is disclosed for an electrical Load which may be for instance an LED load which is directly connected to a supply such as mains supply, and comprises a plurality of switches which are distributed across a plurality of semiconductor die. A surge detector detects the start of a spike in the supply, which results from, for example the commencement or interruption of a nearby inductive load, and opens all the switches. By distributing the switches across multiple die the peak voltage across each is reduced relative to using a single die; thereby each die can stay within the absolute maximum voltage capacity. Each die may have its own surge detector; alternatively, a single surge detector may be used which communicates with the switches on each of the die. In an extension the bridge rectifier may be integrated into the circuit distributed across the die. In this embodiment additional inter-die clamping diodes are required to prevent unsafe floating of the edge connections of each die.

Abstract: The invention relates to a method of manufacturing a semiconductor device, the method comprising: i) providing a substrate carrier comprising a substrate layer and a patterned conductive layer, wherein the patterned conductive layer defines contact pads; ii) partially etching the substrate carrier using the patterned conductive layer as a mask defining contact regions in the substrate layer; iii) providing the semiconductor chip; iv) mounting said semiconductor chip with the adhesive layer on the patterned conductive layer such that the semiconductor chip covers at least one of the trenches and part of the contact pads neighboring the respective trench are left uncovered for future wire bonding; v) providing wire bonds between respective terminals of the semiconductor chip and respective contact pads of the substrate carrier; vi) providing a molding compound covering the substrate carrier and the semiconductor chip, and vii) etching the backside (S2) of the substrate carrier to expose the molding compound in

Abstract: An inductor includes a conductive track forming at least three inductor turns. The conductive track has a plurality of track sections. The inductor also includes at least two groups of crossing points, each crossing point comprising a location at which the conductive track crosses over itself. The crossing points of each group collectively reverse the order of at least some of the track sections in the inductor, such that inner track sections of the conductive track cross over to become respective outer track sections, and such that outer track sections of the conductive track cross over to become respective inner track sections.

Abstract: A capacitive sensor for detecting the presence of a substance includes a plurality of upstanding conductive pillars arranged within a first layer of the sensor, a first electrode connected to a first group of the pillars, a second electrode connected to a second, different group of the pillars, and a dielectric material arranged adjacent the pillars, for altering the capacitance of the sensor in response to the presence of said substance.

Abstract: A time shifting device receives a full broadcast band, such as the FM radio band, demodulates the received full broadcast band into each component broadcast channel, and stores the program signal received from each broadcast channel in a buffer, thereby enabling continuous time-shifting of the content without requiring any prior program pre-selection. The disclosed time shifting device includes an analog to digital converter which digitizes an analog broadband radiofrequency signal, which may include some or all allocated broadcast channels of the targeted broadcast band, into a digital broadband radiofrequency signal. A digital filter and demodulation circuit demodulates the digitized broadband signal into individual datastreams corresponding to the various broadcast channels contained in the broadcast band. The datastreams are stored in a circular buffer for selective playback by a user. Program metadata may be utilized to identify and select programs for playback.

Abstract: A system and method for measuring the shape of an object using a magnetic induction radio sensor involves at least partially enclosing the object with a magnetic loop antenna of the magnetic induction radio sensor, where the inductance of the magnetic loop antenna depends on the shape of the object, and providing a particular capacitance at an antenna matching circuit coupled to the magnetic loop antenna in response to the inductance of the magnetic loop antenna such that the magnetic loop antenna and the antenna matching circuit form a resonant circuit and the resonant circuit has a fixed resonant frequency, where the particular capacitance is used to measure the shape of the object.

Abstract: The present invention relates to a voltage control circuit, semiconductor memory device, and method of controlling a voltage in a phase-change memory, wherein the voltage control circuit generates a controlled voltage which can be above the logic supply voltage. This voltage can limit the bit line voltage in a phase-change memory to allow the use of smaller transistors in the memory cells and in the program current part of the circuit. This results in smaller memory cells and modules.

Abstract: A multiuser downlink multiple-input multiple-output (MIMO) system with limited channel information feedback includes an error-free channel vector quantization scheme. Each user has multiple antennas, and the base station includes a matching number of antennas. Each MIMO channel is measured at the terminus end of a corresponding user, and used to obtain the channel state information at the receiver (CSIR). A few data bits of CSIR information are feed back to the base station through the limited feedback channels. The base station collects all these CSIR feedback data bits into a CSI at the transmitter (CSIT). The CSIT is used to determine which users are served, and how to configure a corresponding multi-user precoder. The user data channels will later all be transmitted through such precoder. A codebook of channel quantization vectors is pre-defined and distributed amongst the base station and all the users.