Abstract: The present invention relates to a semiconductor device, comprising a semiconductor substrate (102) with a thickness of less than 100 micrometer and with a first substrate side and an opposite second substrate side. A plurality of at least four monolithically integrated Zener or avalanche diodes (164,166,168,170) with a reverse breakdown voltage of less than 20 V are defined in the semiconductor substrate and connected with each other in a series connection. The diodes are defined in a plurality of mutually isolated substrate islands (120,122,124,126) in the semiconductor substrate, at least one diode per substrate island. The substrate islands are laterally surrounded by through-substrate isolations extending from the first to the second substrate side and comprising a filling (128) that electrically isolates a respective substrate island from a respective laterally surrounding area of the semiconductor substrate.

Abstract: A dual bridge amplifier includes a first bridge amplifier receiving a first input signal and having a pair of drive outputs connecting to a first load, a second bridge amplifier receiving a second input signal and having a pair of drive outputs connecting to a second load, and a mode switch between one of the drive outputs of the first bridge amplifier and one of the drive outputs of the second bridge amplifier. The mode switch closes and switches the dual bridge amplifier to a series amplification mode, based on detecting the magnitudes of the first and second input signals. The series amplification mode shares current between the first load and the second load, reducing amplifier heat generation.

Abstract: Apparatus for regulating the temperature of a light emitting diode (LED). The apparatus includes a heat sink, an LED mount, and an LED mounted on the LED mount. The LED mount is configured to change shape in response to a change in temperature. The change in shape alters the position of the LED relative to the heat sink, for adjusting heat transfer between the LED and the heat sink. The LED mount may include a laminated portion such as a bi-metallic strip.

Abstract: A controller receives an M-bit input and generates, in response, an S-bit upper range binary data feeding S-bit high range DAC and an R-bit lower range data feeding an R-bit low range DAC. The controller detects transition points in the M-bit input and in response, adds a transition data to the S-bit data equal to at least one least significant bit of the S-bit data and subtracts a value from the R-bit data equal to the transition data. The transition points and the transition data are detected and added at points avoiding such transitions at a full scale value of the R-bit data.

Abstract: A reader device (110) for reading information transmitted from a transponder (130) via a backscatter signal (132) generated by the transponder (130) in response to a stimulus signal (112) generated by the reader device (110), the reader device (110) comprising a first power estimation unit (114) adapted for estimating a first power value indicative of the power of the stimulus signal (112) at a position of the transponder (130) by evaluating a power information included in the backscatter signal (132), a second power estimation unit (116) adapted for estimating a second power value indicative of the power of the backscatter signal (132) at a position of the reader device (110), and a distance estimation unit (118) adapted for estimating a distance (d1) between the reader device (110) and the transponder (130) based on the first power value and the second power value.

Abstract: A method of controlling a DC-DC converter is disclosed, which provides for compensation of the loop-delay caused by, for instance, delays in operation of the comparator. The method is exemplified with reference to, but not limited to, a hysteretic converter.

Abstract: Various exemplary embodiments relate to an event-driven microprocessor and a related method. A microprocessor may halt processing instructions when it executes a halting command. Thereafter, an EPU clock may stop its processing cycle and therefore halt microprocessor execution until it receives a start signal by a pattern detector. The pattern detector may use a plurality of bit slices to monitor a plurality of external inputs for the occurrence of events specified by the user. Some embodiments may also allow the user to check functioning by skipping upcoming instructions if a monitored event did not occur. By halting the EPU clock and the execution flow of the microprocessor, the event-driven microprocessor minimizes waste associated with executing a main control loop while waiting for a monitored event to occur. This may save processing capacity, memory, and power associated with continually running the main control loop.

Abstract: The present invention relates to a piezoelectric bimorph switch, specifically a cantilever (single clamped beam) switch, which can be actively opened and closed. Piezoelectric bimorph switch are known from the prior art. Such a switch may be regarded as an actuator. Actuators are regarded as a subdivision of transducers. They are devices, which transform an input signal (mainly an electrical signal) into motion. Electrical motors, pneumatic actuators, hydraulic pistons, relays, comb drive, piezoelectric actuators, thermal bimorphs, Digital Micromirror Devices and electroactive polymers are some examples of such actuators. The switch of the invention comprises piezoelectric stack layers (121, 122), which form a symmetrical stack, wherein an electric field is always applied in the same direction as the poling direction of the piezoelectric layers.

Abstract: A trench-gate semiconductor device is disclosed, in which the p-layer (10,6) which forms the body region (in a n-channel device) extends adjacent the trench (4) deeper into the device, to lie adjacent a lower trench electrode (3b, 3c). Since the p-layer extension (6) forms part of the channel, it must be very low doped, in order not to increase unduly the channel resistance in the on-state. The re-placement of some of the out-diffusion resistance in the drift region by the (smaller) channel resistance results in a lower over-all Rdson. In the off-state, the p-layer forms, together with the underlying n-drift layer, a non-abrupt function, so that the depletion region in the off-state extends closer to the top surface (2) than for a conventional RSO trench-MOS, being split between the p- and n-layers, rather than all being in the n-drift region.

Abstract: A method is disclosed of compensating the output of an ADC for non-linearity in the response of the ADC. The method comprises converting an analog input signal to uncorrected digital ADC output samples, applying a vector of correction variables to each of a block of uncorrected ADC output samples to provide a block of corrected ADC samples, and iteratively minimizing a measure of the spectral flatness of the block of corrected ADC samples with response to the vector of correction variables.

Abstract: Laterally diffused metal oxide semiconductor transistor for a radio frequency-power: amplifier comprising a drain finger (25,27) which drain finger is connected to a stack of one or more metal interconnect layers, (123,61,59,125) wherein a metal interconnect layer (123) of said stack is connected to a drain region (25) on the substrate, wherein said stack comprises a field plate (123, 125, 121) adapted to reduce the maximum magnitude of the electric field between the drain and the substrate and overlying the tip of said drain finger.

Abstract: A contrast enhancement method for an image includes extracting at least one sub-band image from the image, comprising detail information at a predetermined spatial scale; determining a first gain value for each pixel, based on pixel values of the image or the at least one sub-band image; determining a second gain value for each pixel; modifying the first gain value for each pixel using the respective second gain value; and generating an enhanced image by applying the modified first gain values to respective pixels of one or more sub-band images and combining the result with the image. Determining the first gain value for each pixel comprises: estimating a dynamic range of the pixel values in a neighbourhood of that pixel; and setting the first gain value in inverse relation to the dynamic range.

Abstract: A modified CMOS switch, composed of parallel N-channel and P-channel transistors, is placed between the pad and the input buffer and/or output devices. The applied pad voltage relative to VDD determines the configuration of the switch, and also, the P-channel floating-well bias-voltage. For the applied pad voltage above VDD, only the N-channel device is on and the P-channel device is off. In this configuration the N-channel limits the input voltage on the buffer side to (VDD?VTN), and therefore, acts as the over-voltage protection device. For pad voltages at and below VDD, both the N-channel and the P-channel devices are on, and the voltage-levels on both sides of the protection structure are the same.

Abstract: According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter.

Abstract: A microphone and a method for manufacturing the same. The microphones includes a substrate die; and a microphone and an accelerometer formed from the substrate die. The accelerometer is adapted to provide a signal for compensating mechanical vibrations of the substrate die.

Abstract: An integrated circuit die includes first and second test data inputs, a test data output, and a test arrangement for testing the integrated circuit die. The test arrangement includes a multiplexer coupled to the first and second test data inputs, a further multiplexer coupled to the test data output, a plurality of shift registers including an instruction register, each of the shift registers being coupled between the multiplexer and the further multiplexer, and a controller for controlling the multiplexers in response to the instruction register. Such a test arrangement facilitates JTAG compliant testing of a system in package (SiP) by providing a direct connection between the SiP test data input pin and the second test data input of the IC die, and the SiP test data output pin and the test data output of the IC die, thus facilitating the bypassing of other test arrangements in the SiP.

Abstract: A membrane for an electroacoustic transducer is disclosed having a first area, a second area, which is arranged for translatory movement in relation to said first area, and a third area, which connects said first area and said second area, wherein local, planar spring constants along a closed line within said third area encompassing said second area, are determined in such a way that local, translatory spring constants along said line in a direction of said translatory movement are substantially constant or exclusively have substantially flat, mutual changes.

Abstract: The present invention relates to a synchronization circuit for an integrated amplifier provided with a bandwidth control in accordance to a bandwidth control signal, wherein said synchronization circuit comprises a control terminal for a control signal and rank selector means connected to an internal control signal and being configured to emboss said internal control signal to said control terminal, if said internal control signal has a higher rank in accordance to a predetermined ranking criteria in comparison to said control signal. Further, the present invention relates to a respective synchronization method for continuously communicating and synchronizing of a common control signal for multiple circuits. One preferred application of the invention is in temperature protection by a synchronized bandwidth control for multiple class-AB amplifiers by means of only one additional terminal pin per amplifier.

Abstract: A circuit configuration for obtaining a binary output signal from a current signal delivered by a magnetic-field sensor comprises a magnetic-field sensor, a voltage-supply unit, a measuring device, a signal-conditioning stage, a control stage, wherein the signal values represent the two current values of the current signal, alternating in pulse shape, as supplied by the magnetic-field sensor, for supplying the currently obtained first and second signal values to a memory device after every pulse-shaped change in the current signal and for identifying a digital changeover-threshold signal in accordance with a first algorithm from the real-time first and second signal values, the memory device for storing the currently obtained first and second signal values, a digital/analogue converter stage, and a comparator.

Abstract: The present invention, generally speaking, provides interleavers and methods of interleaving that satisfy the need for backward compatibility while effectively addressing competing design objectives. In accordance with one aspect of the invention, data is transmitted using a number of transmit antennas greater than an expected number of receive antennas. At least one pair of transmit antennas is formed (ant1, ant_N), and multiple second data streams (311, 312) are formed from a first data stream, successive bits in said first data stream being assigned to different ones of said second data streams. Block interleaving (313, 314) of multiple respective ones of said second data streams is individually performed. During successive transmission intervals, the pair of transmit antennas is used to transmit a pair of data symbols taken from different ones of said second data streams, followed by an equivalent transformed pair of data symbols.