Abstract: A method and system for controlling access to a network is disclosed. This is done by identifying a component attached to the network, determining whether the identified component requires special access to the network and providing an indication when the identified component is identified as requiring special access to the network and fails to satisfy a criterion for such special access.

Abstract: A class D amplifier (1) comprises an input unit (11) for receiving a digital input signal (Vin), a pulse shaping unit (12) for producing pulse shaped signals in dependence of the input signal (Vin), a comparator unit (13) for comparing the pulse shaped signals and producing a comparator signal, a driver unit (14) for producing driver signals in dependence of the comparator signal, a switching output unit (15) for producing a pulse width modulated output signal (Vout) in dependence of the driver signals, and a feedback unit (16) for feeding the output signal (Vout) back to the pulse shaping unit (12). The input unit (11) comprises a clipping control unit (10) for controlling the duty cycle of the pulse width modulated output signal (Vout).

Abstract: A system and method for motion estimation involves obtaining input image frames, where the input image frames correspond to different instances in time, and performing motion estimation on the input image frames using depth information from the input image frames, where the depth information from an input image frame indicates how far a pixel in the input image frame is located from a surface of a three dimensional space.

Abstract: A combination amplifier, in particular a Doherty amplifier allowing dynamic biasing, is provided, the combination amplifier comprising a first amplifier (3,3a,3b) having a first input terminal (11,11a,11b) and a first output terminal (25,25a,25b); a second amplifier (5,5a,5b) having a second input terminal (27,27a,27b) and a second output terminal (29,29a,29b); a first impedance inverter (Li, 43b) connected between the first input terminal and the second input terminal; and an envelope detector (33,33a,33b) comprising a detector output terminal and a detector input terminal which is connected to the first output terminal.

Abstract: The present invention relates to a method and system for testing integrity of a passivation layer (108) covering a semiconductor device. A structured layer of electrically conducting material (104) is deposited onto at least a portion of a top surface of a substrate (102) of the semiconductor device. The structured layer (104) comprises a plurality of bands (104.1, 104.2) connected to at least two contacts (106.1, 106.2) and disposed on the at least a portion of the top surface such that one of consecutive bands (104.1, 104.2) and consecutive portions of the bands (104.1, 104.2) are connected to different contacts (106.1, 106.2). A passivation layer (108) is deposited onto the at least a portion of the top surface of the substrate (102) and the structured layer (104) such that material of the passivation layer(108) is disposed between the bands of conducting material (104.1, 104.2) and on top of the structured layer (104).

Abstract: A communication pad for communication with a communication terminal is provided, wherein the communication pad comprises a processing unit and a non-volatile memory having a crypto key and/or a unique identification code stored thereon, wherein the processing unit is adapted to process the crypto key together with authentication challenge data to generate an authentication response, and wherein the communication pad is adapted to be identified to the communication terminal by sending the authentication response and/or a unique identification code to the communication terminal. In particular, the communication pad may be a user proprietary game pad, adapted to communicate with an open domain stand-alone or network-based game terminal.

Abstract: An Ethernet network component having a first terminal, a second terminal and a bypass switch connected between the first terminal and the second terminal, wherein the bypass switch is operable in accordance with control signalling to either include or exclude the Ethernet network component from an associated Ethernet network.

Abstract: Orthogonal Frequency Division Multiplexing (OFDM) is a typical multi-carrier technique that has been applied by many advanced wireless communication systems, e.g., 3GPP Long Term Evolution (LTE) and WiMAX. In order to support high mobility transmission, the sub-carrier spacing of multi-carrier systems is made large enough to overcome the Doppler frequency offset. However, this large sub-carrier spacing results in lower transmission efficiency since the CP (Cyclic Prefix) consumes a considerable of radio resources. The present invention provides an adaptive scheme to determine the sub-carrier spacing in which the default sub-carrier spacing is set to support lower mobility, while the adaptively adjusted sub-carrier spacing based on User Equipment (UE) mobile velocities is set to support higher mobility.

Abstract: An oscillation signal with a selectable frequency is generated with a phase locked loop (10, 12, 14). The oscillator (10) of the loop receives a feedback signal, to which an offset is added in order to reduce transient effects when a frequency modification is made. A first and second offset control value are used to control the offset successively. The first offset control value is controlled by a combination of the frequency settings before and after the modification. The second offset control value is controlled by the frequency settings after the modification. The first and second offset control values are used to control an offset of applying to a frequency control signal of an oscillator (10) of the phase locked loop (10, 12, 14). The offset controlled by the first control offset value is applied during a predetermined time interval before the offset controlled by the second control offset value is applied.

Abstract: An integrated circuit 100 is provided, which is configured for authentication itself and technical information concerning the integrated circuit or its installed software to an external computing device 200. The integrated circuit 100 comprises a signer 130 for producing a signature over the information and a challenge using a cryptographic signing key, and a communication module 110 for providing the information and the signature to the computing device 200. In response to receiving the information and the authentication, the computing device 200 may install new application code on the integrated circuit. After the installation, the integrated circuit may authenticate information concerning the new application code to other computing devices. The integrated circuit is advantageously a multiple application smart card, since it allows application providers to obtain trust in the multiple application smart card without having a relationship with its manufacturer.

Abstract: A combination amplifier (1,1a) is provided which comprises a carrier amplifier (7,7a) and a series connection of a first peak amplifier (9,9a) and a second peak amplifier (11,11a) which are provided with a phase-shifted input signal relative to the input signal supplied to the carrier amplifier, wherein a transfer characteristics of the combination amplifier may be optimized by independently adjusting transfer characteristics of the carrier amplifier, the first peak amplifier and the second peak amplifier. Thereby, a linearity and/or an efficiency of the combination amplifier may be improved compared to a conventional Doherty amplifier.

Abstract: The present invention relates to a detection circuitry for detecting bonding conditions on segmented bond pads of a semiconductor device, the bonding conditions representing good or bad contacts on the bond pads. The detection circuitry comprises a segmented bond pad (1, 11) having at least two parts (2, 3, 12, 13) being electrically separated from each other, and a supplying unit (S1, S2, R1, R2) being adapted for supplying predetermined signals to at least one of the at least two parts of the segmented bond pad. Furthermore, a detector (4, 14) is provided for receiving from at least one of the at least two parts of the segmented bond pad sensing signals derived from said predetermined signals, and for determining the bonding conditions based on said received sensing signals indicative of a good or bad bonding contact on the segmented bond pad.

Abstract: A data processing device has a processor (10) operable at selectable ones of a plurality of performance levels. The processor generates a workload data vector indicating a workload of the processor as a function of time. A memory stores a set of reference workload vectors. A pattern matcher (18) detects whether there is a matching reference workload data vector. A performance level controller (19) selects the performance level of the processor based on control information that is stored in combination with the matching workload data vector.

Abstract: A method of data signal processing is provided, wherein the method comprises filtering a pre-filtered quadrature data signal by using an m×n filtering matrix, wherein m?n. In particular, the filtering may be performed by using a rectangular matrix, i.e. a non-quadratic matrix. That is, the filtering may be performed by a matrix multiply in an image cancellation filtering unit. In general m relates to the 5 number of rows of the matrix while n relates to the number of columns of the matrix. In particular, the processing may form or may be a part of an image cancellation process.

Abstract: In an example embodiment, an integrated circuit comprises an on-chip electronic component. The on-chip electronic component has an active surface in a hermetically sealed cavity and a cover to hermetically seal the cavity. There is an additional electronic component wherein the additional electronic component is fixed on the cover.

Abstract: In an example embodiment, a clock generation circuit comprises two programmable ring oscillators arranged and configured to operate in a mutually exclusive manner, and a variable programmable delay element (not shown). An input programming pattern is provided as an input to the oscillating circuit, the programming pattern providing data representative of the sequence of frequencies at which the clock signal is required to be generated. The outputs of both the oscillators are connected to a clock switch (16), from which the generated clock signal is output. When a request for a change of frequency is received, the currently idle oscillator is first activated with the next required frequency, the output of the currently operative oscillator is then gated when the clock signal thereof goes low. Next, the previously gated output of oscillator is un-gated when its output goes low, and then oscillator is de-activated.

Abstract: Switching power supplies are implemented using a variety of methods and devices. According to an example embodiment of the present invention, an arrangement provides power to a circuit by selecting between a first supply and a second supply. The arrangement includes a first circuit that charges a first capacitive element using the first supply and generates a first reference voltage by distributing charge between the first capacitive element and a second capacitive element. The arrangement also includes a first comparator that compares the first reference voltage to a second reference voltage derived from the second supply and a second comparator that compares the first reference voltage to a third reference voltage. The arrangement further includes a power control circuit that selects one of the supplies based on the results of the comparisons.

Abstract: A digital signal converter (CNV) converts a digital input signal (PCM) into a pulse width modulated signal (PWM), which is a binary signal that comprises pulses of varying width. The digital signal converter can operate in a signal mode and a transition mode. In the transition mode, the digital converter provides the pulse width modulated signal (PWM) by applying an anti-transient noise shaping function (NSH2) to a direct current modification signal (SC). In the signal mode, the digital signal converter provides the pulse width modulated signal by applying a signal noise shaping function (NSH1) to the digital input signal.

Abstract: A device comprises a first part (1) which has user input means (10) and comprising a three-degrees-of-freedom orientation sensing system (11) for determining a three-degrees-of-freedom orientation (01) of the first part (1) with respect to a reference coordinate frame (XYZ) defined by the earths gravity field (Fg) and magnetic field (Fm). A second part (2) comprises a display (20) for displaying orientation information (OI) on a three-degrees-of-freedom orientation (02) of the second part (2), and sensing means (21) for sensing an one-degree-of-freedom or a two-degrees-of-freedom orientation of the second part (2).

Abstract: A signal processing arrangement (REC) comprises a filter (PPF) with variable filter elements (FE). A switching circuit (SWCT) switches a filter element (FE1) and, subsequently, another filter element (FE3) from a filter state to an adjustment state and back again to the filter state. A filter element that is in the filter state contributes to a suppression of unwanted signals. A filter element that is in the adjustment state affects a characteristic of a measurement signal (Sm). An adjustment circuit (ADCT) adjusts the filter element that is in the adjustment state so that the characteristic of the measurement signal is substantially equal to a target value (TV).