Patents Assigned to NXP
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Patent number: 7960255Abstract: A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion (11, 12). Cross-sectional dimensions of the wire portion correspond to a thickness of the seed layer portion and to a duration of the growing step. The seed layer portion is then selectively removed while the wire portion is retained fixedly on the circuit. Afterwards, heating of the circuit can cause the wire portion becoming rounded in cross-section. The wire portion obtained may be about 10 nanometers in diameter. It may be used for forming a channel of a MOS transistor devoid of short channel effect.Type: GrantFiled: September 22, 2008Date of Patent: June 14, 2011Assignees: STMicroelectronics (Crolles 2) SAS, NXP B.V.Inventors: Philippe Coronel, Benjamin Dumont, Arnaud Pouydebasque, Markus Müller
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Patent number: 7958782Abstract: Devices (1) are provided with sensor arrangements (2) comprising field generators (10) for generating magnetic fields and first/second/third elements (R1-R4, S1-S4, T1-T4) for detecting first/second/third components of the magnetic fields in a plane and movable objects (14) for, in response to changing the first/second/third accelerations of the moveable objects (14) in first/second/third directions, changing the first/second/third components of the magnetic fields in the plane. The first (second, third) field detector (11, 12, 13) is more sensitive to the first (second, third) acceleration than to the other accelerations. Such devices (1) have a good sensitivity and a good linearity. The elements (R1-R4, S1-S4, T1-T4) form part of bridges. The first elements (R1-R4) may be in round or rectangular form and the second and third elements (S1-S4, T1-T4) may be in the form of sun beams leaving a sun.Type: GrantFiled: April 6, 2006Date of Patent: June 14, 2011Assignee: NXP B.V.Inventor: Kim Phan Le
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Patent number: 7961721Abstract: A router for a network is arranged for guiding data traffic from one of a first plurality Ni of inputs (I) to one or more of a second plurality No of outputs (O). The inputs each have a third plurality m of input queues for buffering data. The third plurality m is greater than 1, but less than the second plurality No. The router includes a first selection facility for writing data received at an input to a selected input queue of the input, and a second selection facility for providing data from an input queue to a selected output. Pairs of packets having different destinations Oj and Ok are arranged in the same queue for a total number of Nj,k inputs, characterized in that Nj,k<N for each j,k.Type: GrantFiled: February 21, 2006Date of Patent: June 14, 2011Assignee: NXP B.V.Inventors: Theodorus Jacobus Denteneer, Ronald Rietman, Santiago Gonzalez Pestana, Nick Boot, Ivo Jean-Baptiste Adan
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Patent number: 7961043Abstract: In an amplifier arrangement comprising an amplifier (AO) having an output, a first feedback (Rfb) between the output and an input side of the amplifier, a load (RL) having a first terminal coupled to the output and a second terminal, and a DC-blocking capacitance (CDC) between the second terminal of the load and a reference terminal, a second feedback (Cx, Rx) is present between the second terminal of the load and the input side of the amplifier.Type: GrantFiled: January 5, 2007Date of Patent: June 14, 2011Assignee: NXP B.V.Inventor: Marco Berkhout
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Patent number: 7960189Abstract: A system in package (10) has a, preferably wireless, test controller (20) for testing each die (30) after it has been mounted onto the substrate of the system in package (10), and a faulty die (30) is repaired before a next die (30) is mounted onto the substrate (15). This way, the system in package (10) can be tested during the intermediate stages of its manufacturing, thus ensuring that all dies (30) function correctly before sealing the dies in the single package. Consequently, a method for manufacturing a system in package (10) is obtained that has an improved yield compared to known manufacturing methods.Type: GrantFiled: July 18, 2006Date of Patent: June 14, 2011Assignee: NXP B.V.Inventors: Philippe L. L. Cauvet, Herve Fleury, Fabrice Verjus
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Publication number: 20110133214Abstract: A light sensor device comprises a substrate (10) having a well (12) defined in one surface. At least one light sensor (14) is formed at the base of the well (12), and an optical light guide (18) in the form of a transparent tunnel (18) within an opaque body (20) extends from a top surface of the device down a sloped side wall of the well (12) to the location of the light sensor (14).Type: ApplicationFiled: May 21, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Viet Nguyen Hoang, Radu Surdeanu, Pascal Bancken, Benoit Bataillou, David Van Steenwinckel
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Publication number: 20110133722Abstract: An electrical power converter has a transformer (4) and detecting circuitry for deriving a reconstructed output or load current. In a first aspect of the invention the load current is computed by subtracting a scaled version of the time integral of the primary voltage (Vcap) from a scaled version of the primary current (Iprim). In a second aspect of the invention the load current is computed by subtracting a scaled version of the time integral of the voltage (Vaux) across an auxiliary winding (24) from a scaled version of the primary current (Iprim).Type: ApplicationFiled: August 12, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventor: Hans Halberstadt
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Publication number: 20110133255Abstract: A detector device: a source region (S), a drain region (D) and a gate contact (100) on a substrate (104), with a channel region between the source and drain regions (S, D), an insulator layer over the substrate, comprising vias (140, 142, 144) filled with conductor material, wherein the vias (140, 142, 144) are provided over the source, drain regions and a gate contact, an additional via (152) through the insulator layer, defining a first chamber leading to a first side of the channel region, a nanopore etched from this first chamber through the channel region, and connecting the first chamber to a second chamber, a drive means (60) for providing a voltage bias between the two chambers, a drive means for providing a voltage between the source and drain regions and gate, a current sensor (64) for sensing a charge flow between the source and the drain regions.Type: ApplicationFiled: August 12, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventor: Matthias Merz
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Publication number: 20110138182Abstract: In a method for generating a cipher-based message authentication code, a state array (25) comprised of rows (31-34) of bytes (S?0-S?15) and columns (41-44) of bytes (S?0-S?15) based on a message to be transmitted is generated. The cipher-based message authentication code is generated by retaining the bytes (29, 30) of at least one row (32, 34) of the state array (25).Type: ApplicationFiled: August 12, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Bruce Murray, Mathias Wagner
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Publication number: 20110134021Abstract: A light emitting diode (LED) driver for an LED backlight of a color-sequential liquid crystal display (LCD) and method for operation thereof includes a plurality of LED strings having one or more LEDs emitting light at wavelength corresponding to a predetermined color. A plurality of switches is respectively coupled to the plurality of LED strings. A current source is switchably coupled respectively and sequentially to each of the plurality of switches by control signals to open and close the switches in a pattern that illuminates the LED strings. The switches are opened and closed sequentially to permit a respective LED string to provide an output of the predetermined color for a specific period of time such that a total output of the plurality of LED strings provides an output having the desired overall color perceived through temporal integration of an output of each respective LED string.Type: ApplicationFiled: December 8, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Hans Schmitz, Gian Hoogzaad, Matheus J. G. Lammers
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Publication number: 20110135018Abstract: A channel modeling method for Inter Carrier Interference (ICI) cancellation in multi-carrier wireless communication systems comprises: describing the channel with a plurality of fixed matrices and an equal-numbered plurality of unfixed variables; one-to-one pairing each of the described plurality of unfixed variables with one of described plurality of fixed matrices. Corresponding system is also provided. The method and system can compensate for the channel distortion of the Doppler Effect even if the Doppler Frequency Offset is relatively significant.Type: ApplicationFiled: August 4, 2008Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Xiabo Zhang, Ni Ma
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Publication number: 20110133816Abstract: An analog sample-and-hold switch has parallel branches extending from an input node to an output node connected to a hold capacitor, each branch having a PMOS signal switch FET in series with a PMOS dummy FET. A sample clock controls on-off switching of the PMOS signal switch FETs, and an inverse of the sample clock controls a complementary on-off switching of the PMOS dummy FETs. A bias sequencer circuit biases the PMOS signal switch FETs and biases the PMOS dummy FETs, in a complementary manner, synchronous with their respective on-off states. The on-off switching of the PMOS dummy FETs injects charge cancelling a charge injection by the PMOS signal switch FETs, and injects glitches cancelling glitches injected by the PMOS signal switch FETs.Type: ApplicationFiled: December 3, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Qiong Wu, Kevin Mahooti
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Publication number: 20110136550Abstract: A method of charging a mobile device on a charge pad. The method includes receiving a wireless charge from at least one of a plurality of charge pad power coils. The method also includes enabling communications between the charge pad and the mobile device. The method also includes sending a command from the wireless device to the charge pad to adjust a characteristic of the wireless charge at the charge pad and to enable the wireless device to control the characteristic of the wireless charge of the charge pad.Type: ApplicationFiled: July 30, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventor: Philippe Maugars
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Publication number: 20110134131Abstract: A SIMD parallel processor is described comprising an array comprising processing elements, associated data storage components and access means configured to enable access to at least one of the data storage components associated with at least one of the processing elements; a control processor; memory control means configured to enable addressing of at least one of the access means for the control processor; and connecting means configured to connect the memory control means to the access means.Type: ApplicationFiled: August 5, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Alexander Alexandrovich Danilin, Richard Petrus Kleihorst, Paul Wielage
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Publication number: 20110135019Abstract: In multi-carrier systems, distributed resource allocation of the resources of multiple user equipments (UEs) can result in better frequency diversity gain but can also induce Inter-Carrier Interference (ICI) between UEs. This ICI can become quite serious in a high mobility environment. Based on a novel radio channel model for ICI cancellation in multi-carrier systems and an iterative channel estimation scheme for ICI cancellation in multi-carrier systems, the present invention provides a simplified equalization scheme in the frequency domain to determine and remove ICI of both a targeting UE as well as other UEs.Type: ApplicationFiled: August 4, 2008Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Xiabo Zhang, Ni Ma
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Publication number: 20110133839Abstract: A signal processing arrangement comprises an amplifier (AMP V1) that includes a stage with complementary transistors (MP3, MN3) of opposite conductivity type arranged in series between two supply lines (+, ?). A controllable biasing circuit (CCS) is provided for changing a quiescent operating point of the stage as a function of a control signal (CS). A control arrangement measures an even order 5 distortion of the amplifier (AMP V1) and adjusts the control signal (CS) so that the even order distortion is below a critical level.Type: ApplicationFiled: August 10, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventor: Johannes Hubertus Antonius Brekelmans
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Publication number: 20110134964Abstract: A frequency generating arrangement for generation of at least two predetermined frequencies is introduced. The arrangement comprises a phase locked loop circuit with at least two control value storage units and at least one controlled oscillator unit, wherein the control value storage units being configured to selectively output a control signal to the at least one voltage controlled oscillator unit, causing generation of one of the at least two predetermined frequencies. Frequency generating system for generation of ultra-fast hopping-frequency sequences comprises at least a first and a second frequency generating arrangement and further a controlling unit and a multiplexer unit for selectively connecting only one of the outputs of the two frequency generating arrangements with an output of the system.Type: ApplicationFiled: August 12, 2009Publication date: June 9, 2011Applicant: NXP B.V.Inventors: Remco Cornelis Herman van de Beek, Dominicus Martinus Wilhelmus Leenaerts
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Patent number: 7957500Abstract: A detector arrangement for detecting a frequency error between an input signal (DATA) and a reference signal. The detector arrangement comprising first latch circuitry (L1, L2) for sampling a quadrature component (CKQ) of the reference signal based on the input signal, to generate a first binary signal (PDQ); second latch circuitry (L3, L4) for sampling an in-phase component (CKI) of the reference signal based on the input signal, to-generate a second binary signal (PD I); third latch circuitry (L5) for sampling the first binary signal based on the second binary signal, to generate the frequency error signal (FD). The detector further comprising control circuitry (TS) for selectively suppressing operation of a charge pump (82) to which the first binary signal (PDQ) is supplied, in response to a control signal derived from the second binary signal.Type: GrantFiled: April 13, 2010Date of Patent: June 7, 2011Assignee: NXP B.V.Inventors: Mihai Adrian Tiberiu Sanduleanu, Eduard Ferdinand Stikvoort
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Patent number: 7956399Abstract: The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) of silicon which comprises an active region (A) with a transistor (T) and a passive region (P) surrounding the active region (A) and which is provided with a buried conducting region (1) of a metallic material that is connected to a conductive region (2) of a metallic material sunken from the surface of the semiconductor body (12), by which the buried conductive region (1) is made electrically connectable at the surface of the semiconductor body (12). According to the invention, the buried conducting region (1) is made at the location of the active region (A) of the semiconductor body (12). In this way, a very low buried resistance can be locally created in the active region (A) in the semiconductor body (12), using a metallic material that has completely different crystallographic properties from the surrounding silicon. This is made possible by using a method according to the invention.Type: GrantFiled: June 22, 2006Date of Patent: June 7, 2011Assignee: NXP B.V.Inventors: Wibo Daniel Van Noort, Jan Sonsky, Philippe Meunier-Beillard, Erwin Hijzen
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Patent number: 7956801Abstract: A mobile device comprising a GPS receiver for receiving GPS signals; a communications receiver for receiving historical ephemeris data from an external server; and a processor configured to determine later ephemeris data from the historical ephemeris data and to determine a GPS position fix from the later ephemeris data. In particular, the later ephemeris data may be valid for a time period greater than any single set of the historical ephemeris data.Type: GrantFiled: July 3, 2007Date of Patent: June 7, 2011Assignee: NXP B.V.Inventor: Andrew T. Yule