Patents Assigned to NXP
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Patent number: 7948014Abstract: The invention relates to an electronic device having a semiconductor die comprising at least one RF-transistor (RFT) occupying a total RF-transistor active area (ARFT) on the die (DS). The total RF-transistor active area (ARFT) includes at least one transistor channel (C) having a channel width (W) and a channel length (L), and at least one bias cell (BC) for biasing the RF-transistor (RFT). The total bias cell active area (ABC) includes at least one transistor channel (C) having a channel width (W) and a channel length (L). The at least one bias cell (BC) occupies a total bias cell active area (ABC) on the die (SD). The total RF-transistor active area (ARFT) is substantially greater than the total bias cell active area (ABC). The total bias cell active area (ABC) has a common centre of area (COABC). The total RF-transistor active area (ARFT) has a common centre of area (COARF).Type: GrantFiled: May 11, 2006Date of Patent: May 24, 2011Assignee: NXP B.V.Inventor: Josephus Henricus Bartholomeus Van Der Zanden
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Publication number: 20110116515Abstract: A system and method for demodulating and decoding a differentially encoded modulation code from a coded orthogonal frequency division multiplexing (COFDM) transmitter involves partitioning the differentially encoded modulation code into two-dimensional code blocks and demodulating and decoding the two-dimensional code blocks to produce demodulated and decoded information.Type: ApplicationFiled: November 16, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Wim J. VAN HOUTUM, Frans M.J. WILLEMS
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Publication number: 20110116369Abstract: A software-defined radio system processes radio signals on multiple radios according to a task scheduling method. The scheduling method includes assigning a priority value to each received radio packet, the assigned priority value reflective of preset radio preferences and risk of radio packet loss, and determining a processing execution order for the received radio packets according to earliest associated processing deadline. If there is sufficient time to process each of the radio packets in the processing execution order ahead of their associated processing deadlines, the radio packet are so processed. Otherwise, the radio packet having the lowest priority is abandoned, the radio packets are re-ordered, and time sufficiency is re-checked.Type: ApplicationFiled: February 26, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Liangliang Hu, Yanmeng Sun
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METHOD AND SYSTEM FOR PROCESSING RADIO PACKAGES IN A MULTIMODE SOFTWARE DEFINED RADIO (SDR) TERMINAL
Publication number: 20110117871Abstract: A technique for processing radio packages is disclosed. In an embodiment, the processing of a radio package is divided into subtasks and results of the radio package processing are stored on a per-subtask basis. Because the processing of a radio package is divided into subtasks and because results of the processing are stored on a per-subtask basis, context switches can be made at the subtask level instead of at the task level. With the ability to perform context switches at the subtask level, the processing of radio packages can be scheduled in a more efficient manner and context switches can be made without losing processing results that have already been generated. In addition to storing the processing results on a per-subtask basis, in an embodiment, a processing pipeline is drained on a per-subtask basis.Type: ApplicationFiled: January 15, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Liangliang Hu, Yanmeng Sun -
Publication number: 20110115297Abstract: A photovoltaic assembly is disclosed which comprises a string formed from a plurality of series-connected photovoltaic generators, and a hierarchical structure of power-exchange units, which each exchange power between neighbouring photovoltaic generators or groups of photovoltaic generators. The photovoltaic generators may be individual solar cells or a plurality of series-connected solar cells arranged as a segment. To compensate for differences in output between segments for instance due to partial shading, power-exchange units, such as DC-DC converters, are arranged across neighbouring segments, such that each power-exchange unit effectively sources or sinks current between neighbouring segments to current-match the string. To avoid unnecessary “rippling” of power matching along many power-exchange units and the associated power loss due to many power-exchange units operating at less than 100% efficiency, the power-exchange units are arranged in a hierarchical structure.Type: ApplicationFiled: October 14, 2010Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Klaas de WAAL, Hendrik Johannes BERGVELD, Henricus Cornelis Johannes BUTHKER, Franciscus A., C., M., SCHOOFS
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Publication number: 20110115756Abstract: In a method of operating an electronic system (1) a first device (3) of the electronic system (1) sends a message to a second device (6) of the electronic system (1). The second device (6) receives the message, generates a first value utilizing a first function based on at least parts of the history of at least parts of messages previously received at the second device (6), and stores the first value in a memory (8) of the second device (6). The first value is compared 5 with a second value generated at the first device (3), wherein the second value utilizes a second function based on at least parts of the history of at least parts of messages previously sent from the first device (3) to the second device (6). The first and second values are evaluated, and a signal is generated if the evaluating of the first and second values indicates that the history of the messages previously received at the second device (6) differs from the 10 history of messages previously sent from the first device (3).Type: ApplicationFiled: November 12, 2008Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Peter Slikkerveer, Susanne Burfeind
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Publication number: 20110118128Abstract: A biosensor device (100) for detecting biological particles, the biosensor device (100) comprising a substrate (102), a regular pattern of pores (104) formed in the substrate (102), and a plurality of sensor active structures (106) each of which being arranged on a surface of a corresponding one of the pores (104), wherein each of the plurality of sensor active structures (106) is sensitive to specific biological particles and is adapted to modify electromagnetic radiation interaction properties in the event of the presence of the respective biological particles.Type: ApplicationFiled: November 12, 2008Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Pablo Garcia Tello, Freddy Roozeboom
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Publication number: 20110115029Abstract: Integrated circuit comprising a substrate carrying at least one transistor comprising an alternating grid (1) of source and drain regions (D, S) separated by a grid (14) of gate regions, e.g. a checkerboard pattern of source and drain regions. The source regions (S) are vertically connected to a first metal layer and the drain regions (D) are vertically connected to a second metal layer. At least one of the first metal layer and the second metal layer comprises a metal grid (30, 40) of a plurality of interconnected metal portions (32, 42) arranged such that said grid comprises a plurality of gaps (34, 44) for connecting respective substrate portions to a further metal layer. Method for manufacturing such an integrated circuit.Type: ApplicationFiled: July 28, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventor: Jeroen Van Den Boom
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Publication number: 20110119383Abstract: The present application relates to a method, system and a computer readable medium. The method comprises processing an application which uses at least one resource, wherein at least one proxy is generated depending on the application, wherein at least two substantially similar resources are claimed by the proxy, and wherein the actually used resource for processing the application is determined depending on at least one predefined criterion.Type: ApplicationFiled: April 9, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventors: Bernardus Adrianus Cornelis Van Vlimmeren, Jack Alexander Goossen
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Publication number: 20110116653Abstract: An amplifier is disclosed, wherein the output stage is split between a primary output stage and a secondary stage. To minimise or eliminate any audible plop when the amplifier is switched on, the primary stage is connected, and the second stage is gradually connected using a switch. The gradual connection can be by means of varying the pulse-density of a pulse wave modulation on the switch, from fully open (0% pulse-density) to fully closed (100%). The inverse process can minimise or eliminate plop during switch-off. Separate feedback loops are switchable, from the primary and secondary stages; in a DC-coupled embodiment, the feedback loop from the secondary stage may include DC-offset cancelling circuitry, to both reduce or eliminate the plop and avoid and DC-offset current through the speaker.Type: ApplicationFiled: November 12, 2010Publication date: May 19, 2011Applicant: NXP B.V.Inventor: Han Martijn SCHUURMANS
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Publication number: 20110115539Abstract: A signal processing arrangement comprises a series of latches (XDL, L1, L2) arranged as a clocked delay line (CDL) having a data input and a data output that are coupled to each other so as to form an inverting loop. An enable circuit (ACDL) allows or prevents a latch (L2) in the series of latches from changing state depending on whether, one clock cycle ago, the latch concerned received a given binary value or the inverse of that given binary 5 value, respectively, from the preceding latch (L1) in the series of latches. Such a circuit configuration allows a low-cost frequency division by an odd number with relatively small duty cycle errors.Type: ApplicationFiled: July 7, 2009Publication date: May 19, 2011Applicant: NXP B.V.Inventor: Johannes Hubertus Antonius Brekelmans
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Patent number: 7944658Abstract: An integrated circuit suitable for use at high frequencies and comprising a first capacitor having an input and an output, as well as a ground connection, wherein the capacitor is ESD-protected through an resistor between the capacitor output and the ground connection, which resistor has a resistance value that is sufficiently high so as to prevent any substantial influence on RF performance of the ground connection.Type: GrantFiled: June 15, 2007Date of Patent: May 17, 2011Assignee: NXP B.V.Inventors: Johannes F. Dijkhuis, Antonius J. M. De Graauw
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Patent number: 7945221Abstract: A transmitter device for wireless communication equipment, comprises at least one path (P1) comprising i) a low-pass filter (LPF 1+, LPF1?) for filtering differential signals and applying a chosen first attenuation to each of them to decrease their amplitudes, ii) a differential transconductor (TC1+, TC1?) arranged for applying a chosen second attenuation to each differential signal coming from the low-pass filter (LPF1+, LPF1?) to decrease its continuous component, and iii) a mixer (M1) for mixing separately the differential signals delivered by the transconductor with local oscillator carriers at a chosen radio frequency to deliver output RF signals to be transmitted. The transconductor (TC1+, TC1?) comprises two original cells (OC) for defining two original signals from the differential signals having the first attenuation, and N first and N second signal copy cells (CC1-CC6) each arranged for generating a copy of one of the original signals.Type: GrantFiled: June 21, 2006Date of Patent: May 17, 2011Assignee: NXP B.V.Inventors: Patrice Derouet, Fabien Hubert
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Patent number: 7945828Abstract: An integrated circuit (IC) arrangement (10) comprises an integrated circuit (100) having a digital circuit portion (120) with a plurality of digital outputs (122), each of the outputs being arranged to provide a test result in a test mode of the integrated circuit (100). The arrangement (10) further comprises space compaction logic (140) comprising a space compaction network (160) having a plurality of compaction domains (162), each domain being arranged to compact a plurality of test results into a further test result, and a spreading network (150) coupled between the plurality of digital outputs (122, 210) and the space compaction network (160), the spreading network being arranged to duplicate each test result from the digital outputs (122,210) to a number of compaction domains (162).Type: GrantFiled: October 23, 2006Date of Patent: May 17, 2011Assignee: NXP B.V.Inventor: Hendrikus Petrus Elisabeth Vranken
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Method and arrangement for reducing the mutual interference of network subscribers in radio networks
Patent number: 7945210Abstract: The object of the invention, which relates to a method and an arrangement for reducing the mutual interference of network subscribers in radio networks, is to provide a solution by means of which data collisions are reduced and thus the data throughput rate of a radio cell is increased. According to the invention, this object is achieved in terms of the method in that the cell size of a radio cell is adjusted by reducing the receiver sensitivity of one or more devices belonging to the radio cell if the device receives interference which disrupts its communication from another device belonging to a different radio cell.Type: GrantFiled: December 13, 2005Date of Patent: May 17, 2011Assignee: NXP B.V.Inventor: Volker Aue -
Patent number: 7944385Abstract: A continuous-time sigma-delta analog-to-digital converter (CV) including i) a signal path (SP) having at least one combiner (C1) for combining analog signals to convert with feedback analog signals, at least two integrators (H1, H5), mounted in series, to integrate the combined analog signals, a quantizer (Q) for converting the integrated signals into digital signals, and a decimation filter (DF) for filtering digital signals, and ii) a feedback path (FP) having at least a digital-to-analog converter (DAC) for converting the digital signals output by the quantizer (Q) into feedback analog signals intended for the combiner (C1). Each integrator (H1, H5) having variable capacitance means arranged to be set in chosen states defined by the values of a digital word, to present the chosen capacitances.Type: GrantFiled: January 22, 2007Date of Patent: May 17, 2011Assignee: NXP B.V.Inventor: Yann Le Guillou
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Patent number: 7945718Abstract: One embodiment of the present invention is a microcontroller (24) including an embedded memory (42), waveform control circuitry (44) operatively coupled to the memory (42), several terminals (52), and a programmable processor (30). Processor (30) is responsive to execution of the first sequence of instructions to store a waveform bit pattern in memory (42) with a desired transmission timing. Waveform circuitry (44) is responsive to processor (30) to control transmission of the waveform bit pattern stored in memory (42) through one or more of the terminals (52) in accordance with the timing while processor (30) executes the second sequence of instructions to perform a different process.Type: GrantFiled: August 22, 2006Date of Patent: May 17, 2011Assignee: NXP B.V.Inventors: Ata Khan, Greg Goodhue, Pankaj Shrivastava
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Patent number: 7944716Abstract: The invention deals with the control of a resonant LLC converter by use of control parameters. The primary current flowing in the resonant tank and a voltage at a predetermined point in the resonant tank are monitored and control parameters are set for a high side conduction interval and control parameters are set for a low side conduction interval, the control parameters for the two conduction intervals being: a peak current of the interval and a predetermined voltage of the interval. The resonant converter comprises series-arranged controllable switches to be connected to the supply source. The resonant converter is operated by setting up criteria for turning off a switch in accordance with criteria including the four control parameters.Type: GrantFiled: March 24, 2006Date of Patent: May 17, 2011Assignee: NXP B.V.Inventor: Hans Halberstadt
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Patent number: 7943509Abstract: A damascene process is described using a copper fill process to fill a trench (12). The copper fill (20) is started with a deposited seed layer which includes (5) copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier (24) at the surface of the copper fill (20). Air gaps (26) may be created in the same annealing process. The process may be used to form a multilayer structure.Type: GrantFiled: December 31, 2008Date of Patent: May 17, 2011Assignee: NXP B.V.Inventors: Roel Daamen, Robertus A. M. Wolters, Martinus P. M. Maas, Pascal Bancken, Julien M. M. Michelon
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Patent number: 7944760Abstract: An electronic circuitry is provided for reading out a memory element (ME). The electronic circuitry comprises a first electronic path (IP) being coupled to the memory element (ME), a second electronic path (RP) having predetermined electrical properties, and a basic detection element (BDE) being coupled to the first and second electronic paths (IP, RP) such that the information contained in the memory element (ME) can be determined by the basic detection element (BDE) based on the relation of a digital signal being propagated over the first path (IP) to a digital signal being propagated over the second path (RP).Type: GrantFiled: October 29, 2007Date of Patent: May 17, 2011Assignee: NXP B.V.Inventor: Cedric Mayor