Patents Assigned to NXP
  • LOCKING TECHNIQUE FOR PHASE-LOCKED LOOP
    Publication number: 20210067164
    Abstract: Locking time for a phase-locked loop is decreased by selectively controlling a division value of the feedback divider during the first division cycle to reduce the initial phase error. The division value of the feedback divider during the first division cycle is selectively set such that the locking phase relationship between the two phase detector input signals is achieved at the end of the first division cycle.
    Type: Application
    Filed: July 27, 2020
    Publication date: March 4, 2021
    Applicant: NXP USA, Inc.
    Inventors: Stefano Dal Toso, Mathieu Perin
  • Null data packet (NDP) announcement frame for NDP ranging
    Patent number: 10935664
    Abstract: A first communication device generates a null data packet (NDP) announcement (NDPA) frame to announce a subsequent transmission of one or more NDPs to one or more second communication devices as part of a ranging measurement procedure. The NDPA frame is generated to include a training signal repetition field that specifies a number of instances of a training signal to be included in the one or more NDPs. The first communication device transmits the NDPA frame as part of the ranging measurement procedure. The first communication device generates at least one NDP to include a number of instances of the training signal that equals the number of instances of the training signal indicated by the training signal repetition field in the NDPA, and after transmitting the NDPA frame, transmits the at least one NDP as part of the ranging measurement procedure.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP USA, INC.
    Inventors: Christian R. Berger, Liwen Chu
  • Low stress pad structure for packaged devices
    Patent number: 10937750
    Abstract: Embodiments are provided for package semiconductor devices, each device including: a low stress pad structure comprising: a dielectric layer, a seed layer having: a center section, and a ring section formed around the center section and over a top surface of the dielectric layer, wherein the ring section of the seed layer includes a set of elongated openings through which a portion of the top surface of the dielectric layer is exposed, and a metal layer having: an inner section formed over a top surface of the center section of the seed layer, and an outer section formed over a top surface of the ring section of the seed layer, wherein a bottom surface of the outer section of the metal layer directly contacts the portion of the top surface of the dielectric layer exposed through the set of elongated openings.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Paul Southworth, Zhiwei Gong
  • Orthogonal frequency division multiple access protection
    Patent number: 10938495
    Abstract: An access point (AP) transmits a request-to-send (RTS) frame to a plurality of client stations. The RTS frame indicates that the plurality of client stations are requested to simultaneously transmit respective clear-to-send (CTS) frames to the AP. The AP receives at least some of the respective CTS frames from at least some of the plurality of client stations, including receiving a first CTS frame from a first client station, and receiving a second CTS frame from a second client station. The first CTS frame and the second CTS frame both span a first sub-channel, and are received simultaneously by the AP. The AP determines that the first sub-channel is available for communication with one or more client stations based on the reception of the first CTS frame and the second CTS frame.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: March 2, 2021
    Assignee: NXP USA, INC.
    Inventors: Liwen Chu, Lei Wang, Hongyuan Zhang, Hui-Ling Lou, Jinjing Jiang
  • Electrostatic discharge protection structure
    Patent number: 10937782
    Abstract: An electrostatic discharge, ESD, protection structure (200) formed within a semiconductor substrate of an integrated circuit device (600). The integrated circuit device (600) comprising: a radio frequency domain (632); a digital domain (610). The ESD protection structure (200) further includes an intermediate domain located between the radio frequency domain (632) and the digital domain (610) that comprises at least one radio frequency, RF, passive or active device that exhibits an impedance characteristic that increases as a frequency of operation increases.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Dolphin Abessolo Bidzo, Janusz Tomasz Klimczak, Detlef Clawin, Radu Mircea Secareanu
  • Analog-to-digital converter, resistive digital-to-analog converter circuit, and method of operating an analog-to-digital converter
    Patent number: 10938401
    Abstract: Embodiments of an analog-to-digital converter (ADC), resistive digital-to-analog converter (DAC) circuits, and methods of operating an ADC are disclosed. In an embodiment, an analog-to-digital converter includes a DAC unit configured to convert a digital code to a first voltage in response to an input voltage of the ADC, a comparator configured to compare the first voltage with a second voltage to generate a comparison output, and a logic circuit configured to generate the digital code, to control the DAC unit based on the comparison output, and to output the digital code as a digital output of the ADC. The DAC unit includes a capacitive DAC and multiple resistive DACs. Each of the resistive DACs is connected to the first voltage through a respective capacitor.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Erik Olieman, Alphons Litjes, Ibrahim Candan
  • Location-based communication
    Patent number: 10939359
    Abstract: Aspects of the disclosure are directed to a communications environment involving a plurality of remote transmitters that communicate over respective subchannels. As may be implemented in accordance with one or more embodiments, energy characteristics of wireless transmissions received from one of the remote transmitters and a location that remote transmitter are respectively ascertained, for each of such subchannels. One of the subchannels is selected based on the ascertained energy characteristics and locations of the remote transmitters, and data is generated for transmission over the selected one of the subchannels.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Luis Fernando Abanto Leon, Arie Geert Cornelis Koppelaar, Sonia Marcela Heemstra de Groot
  • Method and apparatus for uplink orthogonal frequency division multiple access
    Patent number: 10938454
    Abstract: A first communication device transmits a trigger frame transmission to multiple second communication devices to prompt the multiple second communication devices to simultaneously transmit in multiple communication sub-channels. The first communication device receives one or more transmissions from one or more of the second communication devices in less than all of the communication sub-channels. The first communication device generates acknowledgment information for the one or more transmissions from the one or more of the second communication devices, and transmits the acknowledgment information via all of communication sub-channels.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP USA, INC.
    Inventors: Liwen Chu, Lei Wang, Hongyuan Zhang, Hui-Ling Lou, Yakun Sun, Jinjing Jiang
  • Sigma-delta analog to digital converter
    Patent number: 10938407
    Abstract: A sigma-delta analog-to-digital converter (ADC) is disclosed. The sigma delta ADC has an analog input and a digital output. A sigma-delta modulator input is coupled to the analog input and a sigma-delta modulator output. A first filter having a first filter input is coupled to the sigma-delta modulator output and a first filter output. A second filter having a second filter input is coupled to the sigma-delta modulator output and a second filter output. The sigma-delta ADC operates in a first and second mode. In a first mode, the first filter output is coupled to the digital output. In a second mode, the second filter output is coupled to the digital output.
    Type: Grant
    Filed: February 23, 2020
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventor: Xavier Albinet
  • Millimeter wave communication through device case
    Patent number: 10938089
    Abstract: A device, including: a dielectric case or chassis; a first integrated circuit (IC) configured to produce a millimeter wave signal; a first IC antenna configured to receive the millimeter wave signal from the IC and radiate the millimeter wave signal; and a first waveguide configured to guide the radiated millimeter wave signal to the dielectric case, wherein the millimeter wave signal is coupled into to the dielectric case.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Jozef Thomas Martinus van BEEK, Krishna Tiruchi Natarajan
  • Voltage limiting device
    Patent number: 10938203
    Abstract: One example discloses a voltage limiting device, including: a first I/O port; a second I/O port; a voltage limiter, coupled to the first and second I/O ports, and configured to shunt a voltage received on the first and/or second I/O ports having an absolute value greater than a voltage limit; wherein the voltage limiter includes a first portion and a second portion; wherein the first portion includes a first current shunt coupled between the first I/O port and a mid-net, and a second current shunt coupled between the second I/O port and the mid-net; and wherein the second portion includes a third current shunt having one end coupled to the mid-net and another end coupled to a ground.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Anu Mathew, Guido Wouter Willem Quax
  • Power save optimization for wireless connectivity
    Patent number: 10939371
    Abstract: A method for power save optimization includes a wireless station receiving a beacon frame from an Access Point (AP), wherein the beacon frame comprises a Traffic Indication Map (TIM) including an Association Identifier (AID) flag corresponding to the wireless station. The wireless station transmits to the AP, a first NULL frame with a Power Save (PS) flag cleared to represent an AWAKE state if the AID flag is TRUE, otherwise the PS flag is set to represent a DEEP SLEEP state. The wireless station receives at least a portion of a data from the AP in response to the AP receiving the first NULL frame during the AWAKE state. The wireless station transmits to the AP, a second NULL frame with the PS flag set to represent the DEEP SLEEP state in response to the wireless station receiving all of the data.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP USA, Inc.
    Inventor: Doru Cristian Gucea
  • Gm-boosted differential voltage-controlled oscillator (VCO)
    Patent number: 10938345
    Abstract: The present application relates to a differential Colpitts voltage-controlled oscillator (VCO) circuit, which comprises a pair of transistors with control terminals biased by a common biasing voltage and a pair of couplers arranged to cross-couple corrector/drain of the transistors and the base/gate of the differential transistors. The pair of couplers have a coupling factor kc, which used to enhance the transconductance of the transistor pair, therefore can be used for power consumption reduction and phase noise minimalization.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP USA, INC.
    Inventor: Yi Yin
  • System and method for detecting tampering with a product
    Patent number: 10929739
    Abstract: A system for detecting tampering with a product includes a capacitor in or attached to the product, an integrated circuit configured to inject a current the capacitor and to detect a corresponding voltage slope on the capacitor. The integrated circuit is further configured to divide the voltage slope into a plurality of slope segments, discard a first set of slope segments, whose slope value falls outside a predefined range of slope values, and use a second set of slope segments, whose slope value falls within said predefined range, for determining a capacitance on the capacitor. A corresponding method for detecting tampering with a product is conceived, and a corresponding computer program is provided.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 23, 2021
    Assignee: NXP B.V.
    Inventors: Gerhard Martin Landauer, Ivan Jesus Rebollo Pimentel
  • Communicating subchannel availability information in a wireless local area network
    Patent number: 10931421
    Abstract: A client station of a wireless local area network (WLAN) determines respective availabilities at the client station of a plurality of subchannels for a multi-user (MU) transmission, and generates a media access control (MAC) data unit (MPDU) that includes a MAC header. The MAC header includes a control field, and the control field includes a subfield having i) an identification (ID) that indicates the subfield includes subchannel availability information, and ii) a bitmap that indicates the respective availabilities at the client station of the plurality of subchannels. The client station transmits the MPDU to an access point of the WLAN for a subsequent allocation by the access point of wireless bandwidth for the MU transmission.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: February 23, 2021
    Assignee: NXP USA, INC.
    Inventors: Liwen Chu, Lei Wang, Jinjing Jiang, Hongyuan Zhang, Yakun Sun, Hui-Ling Lou
  • Crystal oscillator circuit and method of operation
    Patent number: 10931232
    Abstract: A crystal oscillator circuit (100, 200) is described that includes a crystal resonator (220); and a voltage source (204) configured to apply a voltage step across the crystal oscillator (220) where a polarity of the voltage source (204) applied to the crystal resonator (220) is switched in response to a sign of a current passing through the crystal resonator (220) and in response thereto a self-timed energy injection waveform is provided to the crystal resonator (220).
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: February 23, 2021
    Assignee: NXP B.V.
    Inventors: Ronan van der Zee, Joeri Lechevallier
  • Semiconductor device with an encircled electrode
    Patent number: 10930747
    Abstract: An embodiment of a semiconductor device includes a first semiconductor region formed within a semiconductor substrate, a second semiconductor region formed within the semiconductor substrate, a first electrode coupled to the first semiconductor region, a second electrode coupled to the second semiconductor region and proximate the first electrode, wherein the second electrode is encircled by the first electrode. A third electrode may be coupled to the first electrode and the second semiconductor region. A fourth electrode may be coupled to the first semiconductor region and proximate the third electrode, wherein the fourth electrode may be coupled to the second electrode, and wherein the third electrode includes a shared portion of the first electrode.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: February 23, 2021
    Assignee: NXP B.V.
    Inventors: Tony Vanhoucke, Mahmoud Shehab Mohammad Al-Sa'di
  • ESD protection circuit providing multiple detection signals
    Patent number: 10930639
    Abstract: An ESD protection circuit includes a detection circuit for detecting an ESD event. The detection circuit includes two current mirrors each for providing two detection signals. The ESD protection circuit includes driver circuitry that produces trigger signals to clamp circuits that make conductive the clamp circuits in response to an ESD event based on the detection signals from the current mirrors.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: February 23, 2021
    Assignee: NXP USA, INC.
    Inventors: Kuo-Hsuan Meng, James W. Miller
  • Complexity reduction for transmitter precoding
    Patent number: 10924166
    Abstract: A transmitter includes a plurality of user-specific channels, with each user specific channel associated with a different set of user equipment (UE) receive antennas. For precoding, the transmitter generates a baseline channel matrix reflecting the characteristics of the communication medium employed to transmit data to the different user equipment (UEs). For each user-specific channel, the transmitter generates a complementary channel matrix based on the baseline channel matrix, then performs matrix decomposition to eliminate selected terms of the complementary channel matrix that interfere from other communication channels of the transmitter. The transmitter can reuse portions of one rotational matrix set generated for one channel to generate the rotational matrix sets for one or more other channels.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: February 16, 2021
    Assignee: NXP USA, INC.
    Inventors: Victor-Florin Crasmariu, Andrei Alexandru Enescu, Marius Octavian Arvinte
  • Integrated circuit with finFETs having dummy structures
    Patent number: 10924093
    Abstract: A circuit includes a plurality of voltage supply terminals including a lowest voltage supply terminal, an N-type finFET, and a current path electrically coupled to the lowest voltage supply terminal, where the N-type finFET transistor is located in the current path. The N-type finFET transistor includes at least one semiconductor fin, a gate structure made of a gate material located over the at least one fin, an end structure of the gate material located over an end of the at least one fin, a source electrode, and a drain electrode. The at least one fin is located over a well region, and the end structure is electrically tied to the well region, in which the well region is not electrically tied to the lowest voltage supply terminal.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventor: Hector Sanchez