Abstract: Embodiments of a method and device are disclosed. In an embodiment, a Doherty amplifier module includes a substrate including a mounting surface, and a carrier amplifier die, a first peaking amplifier die, and a second peaking amplifier die on the mounting surface. The carrier amplifier die includes a first output bond pad that has a first length and a first width. The first peaking amplifier die includes a second output bond pad including a first main pad portion having a second length and a second width and including a first side pad portion having a third length and a third width. At least one of the second width or the third width is greater than the first width. The second peaking amplifier includes a third output bond pad. A first wirebond array is coupled between the third output bond pad and at least the first side pad portion.

Abstract: An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits.

Abstract: A method for accessing a shared medium includes receiving, at a first device associated with a first basic service set (BSS), a packet from a second device associated with a second BSS. The packet includes an indication of a duration for which the shared medium is expected to be busy. The method includes setting, at the first device, a first counter for an inter-BSS channel access to the duration in response to the second BSS being different than the first BSS and in response to the duration being greater than a current value of the first counter. The method includes setting, at the first device, a second counter for an intra-BSS channel access to the duration in response to the second BSS being the same as the first BSS and irrespective of whether the duration indicated in the packet is greater than a current value of the second counter.

Abstract: According to a first aspect of the present disclosure, a fingerprint sensor module is provided, comprising: an assembly comprising a substrate and a fingerprint sensor mounted on one side of the substrate; wherein the fingerprint sensor comprises a set of sensor elements and a measurement unit; and wherein the measurement unit is configured to concurrently measure capacitances on subsets of the set of sensor elements. According to a second aspect of the present disclosure, a corresponding method of producing a fingerprint sensor module is conceived.

Abstract: A boundary within a last orthogonal frequency division multiplexing (OFDM) symbol of a PHY data unit is determined. Pre-encoder padding bits are added to a set of information bits to generate a set of padded information bits such that the set of padded information bits, after being encoded, fill one or more OFDM symbols up to the boundary within the last OFDM symbol. The set of padded information bits are encoded to generate a set of coded bits. A PHY preamble is generated to include a subfield that indicates the boundary. The one or more OFDM symbols are generated to include (i) the set of coded information bits in the one or more OFDM symbols up to the boundary to allow a receiving device to stop decoding the one or more OFDM symbols at the boundary, and (ii) post-encoder padding bits in the last OFDM symbol following the boundary.

Abstract: A mechanism is provided to determine if a short-range automotive radar detection is a direct reflection or an indirect (also known as “multipath”) reflection from a physical target object. The multipath information is further used to perform a height estimation of the object. Embodiments provide a radar system having a range resolution smaller than a path difference between the direct reflection path and the indirect reflection path. Both range separation techniques and Doppler separation techniques are utilized to provide a reliable and accurate estimation of the height of the object.

Abstract: A hybrid connector for a data cable, including: a galvanic connector having a plurality of connectors configured to make a galvanic connection with a plurality of connectors in a receptacle wherein a first portion of the plurality connectors are power connections and a second portion of the plurality of connectors are data connections; a plurality of millimeter wave wireless transmitter/receivers (TRx) configured to transmit/receive data from/to the hybrid connector; and a plurality of millimeter wave antennas surrounding the galvanic connector each antenna connected to one of the plurality of millimeter wave TRx's, wherein the plurality of millimeter wave antennas are configured to transmit/receive millimeter wave data signals.

Abstract: A switched mode power supply including an alternating current power supply configured to output a voltage, a sense resistor configured to sense a voltage output from the power supply, a current sense processor configured to sense a current level through the sense resistor, sense disturbances in the sensed voltage, and reconstruct the sensed voltage to eliminate the disturbances.

Abstract: A saw bow is provided and designed such that the conductors of the saw bow will break at a predictable location when using modern dicing techniques. This results in a break in the circuit provided by the saw bow, with any exposed conductors not being on the die side. Further, by providing a known breaking point in the saw bow, modern dicing techniques such as plasma dicing can be used, thereby allowing for the saw lane to be made narrower, which will in turn increase the number of wafers that can be included on a wafer.

Abstract: A method for deinterleaving a plurality of resource units (RUs) where each RU includes data and parameters. The method includes assigning each RU into one of a first deinterleaver and a second deinterleaver and storing the parameters of each respective RU to a respective buffer in an order. The method also includes processing the data of the respective RU in the one of the first deinterleaver and the second deinterleaver and upon completion of the processing of the data of a respective RU, outputting the data of the respective RU from the one of the first deinterleaver and the second deinterleaver into which the respective RU was assigned, outputting the parameters of the respective RU corresponding to one of the first deinterleaver and the second deinterleaver into which the respective RU was assigned, and aligning the parameters of the respective RU with the data of the respective RU based on the order of storage of the parameters in the respective buffer.

Abstract: A method is provided for embedding an integrated circuit (IC) into a 3D-printed object. The method includes providing a filament having a material for 3D-printing an object, and an integrated circuit embedded within the filament material. The filament is used to form at least part of the 3D-printed object. A 3D-printing system is provided for implementing the method. The 3D-printing system includes a filament dispenser for storing and dispensing the 3D-printing filament. A platform provides a work surface for supporting the object as the object is being printed. A processor is provided for controlling a printing operation of the 3D-printer, and for 3D-printing the object with the filament having the ICs embedded therein. A configuration circuit is provided for configuring the IC as the IC is embedded in the 3D-printed object.

Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a thin film capacitor a silicon substrate having a silicon dioxide layer; an adhesion layer on the silicon dioxide layer, wherein the adhesion layer is a polar dielectric; a first electrode layer on the adhesion layer; a dielectric layer on the first electrode layer; and a second electrode layer on the dielectric layer. Other embodiments are disclosed.

Abstract: A process that incorporates teachings of the subject disclosure may include, for example, providing a first silicon dioxide layer on the silicon substrate, depositing a modifier layer on the first silicon dioxide layer, depositing a second silicon dioxide layer on the modifier layer to form a multilayer initial oxide and annealing the multilayer initial oxide resulting in an annealed multilayer initial oxide. The annealing causes diffusion of modifier species from the modifier layer into the first and second silicon dioxide layers and results in amorphous polysilicates. The first and second silicon dioxide layers have thicknesses that prevent the diffusion of the modifier species from reaching top and bottom interfaces of the annealed multilayer initial oxide. Other embodiments are disclosed.

Abstract: A radar system (200, 200a) and a method of operating a radar system are described, the radar system (200, 200a) comprising: a plurality of ICs (210, 220), each IC (210, 220) comprising: a respective LO output (212, 222) for selectively outputting a respective LO signal, and a respective LO input (214, 224); and a coupling device (230, 330), the coupling device (230, 330) comprising: a plurality of inputs (232, 234; 341, 342, 351, 352), each input being coupled to the LO output (212, 222) of a respective IC (200, 200a), and a plurality of outputs (236, 238; 363, 364, 373, 374), each output being coupled to the LO input (212, 222) of a respective IC (214, 224); wherein the coupling device (230, 330) is configured such that a LO signal arriving at any one of said plurality of inputs (232, 234; 341, 342, 351, 352) is distributed to each of said plurality of outputs (236, 238; 363, 364, 373, 374). The coupling device (230, 330) may comprise at least one directional coupler.

Abstract: A fringe capacitor with a shielded the top capacitor plate is formed in multiple interconnect layers to include a first plate having a first defined finger structure located in one or more middle interconnect layers to form a top capacitor plate; a set of second plates located in the middle interconnect layer(s) and bottom and top interconnect layers that are connected to form a bottom capacitor plate which includes a second plate in the middle interconnect layer(s) having defined finger structures that are interleaved with the first defined finger structure of the top capacitor plate to vertically and horizontally sandwich the top capacitor plate; and a set of shield layers formed to surround and shield the top capacitor plate on lateral sides, where the set of shield layers are connected to a reference voltage, thereby shielding the top capacitor plate from parasitic capacitance.

Abstract: A method and apparatus for resistive short circuit immunity for wheel speed sensor interface on braking system. In one embodiment the apparatus includes a first circuit for transmitting a first current to a wheel speed sensor, and a second circuit for receiving a second current from the wheel speed sensor. Another circuit is coupled to the first and second circuits and configured to detect and respond to a near zero resistive short between the wheel speed sensor and ground. In this embodiment the circuit is configured to detect the near zero resistive short based on a direct or indirect comparison between magnitudes of the first and second currents to a first predetermined value, and based on a direct or indirect comparison between magnitudes of the first and second currents to a second predetermined value.

Abstract: A video device is described that includes: a host processor comprising at least one input video port configured to receive a plurality of video data signals that comprise video data and embedded data from a plurality of virtual channels in a received frame; and a memory operably coupled to the host processor and configured to receive and store video data. The host processor is configured to segregate the video data from the embedded data in the received frame and process the embedded data individually.

Abstract: An integrated “pull-down” driver circuit (210) is formed with a combination device consisting of an output driver transistor (N1) electrically coupled between a current source circuit (Ns) and the conductive pad, and an ESD bypass transistor (N3) electrically coupled in series with the output driver transistor, where one or more conductive interconnect layers connect the ESD bypass transistor in parallel with the current source circuit so that the ESD bypass transistor is in an off-state during normal operation and is activated to form a parasitic bipolar junction transistor with the output driver transistor to conduct ESD current between a first power supply conductor and the conductive pad during ESD events, and where a complementary integrated “pull-up” driver circuit may be formed with three corresponding PMOS transistors (P1, PS, P3) connected as shown between a second power supply conductor and the conductive pad.

Abstract: A receiver includes an input node coupled to receive an analog signal, a first switch coupled between the input node and a first node, a second switch coupled between the input node and a second node, a first resistive element coupled between the first node and a reference node, a second resistive element coupled between the second node and the reference node, a first capacitive element coupled to the first node, and a second capacitive element coupled to the second node. The receiver also includes a comparator having a first input coupled to the input node to receive the analog signal, and a second input coupled to the reference node to receive a reference voltage, wherein an output of the comparator controls the first and second switches.

Abstract: A circuit for high accuracy element matching is provided. The circuit includes an analog to digital converter (ADC) configured to generate an output code. A current source is configured to provide a signal to the ADC. The current source includes a first current branch including a first unit element group having a first unit element coupled by way of a first set of switches to a first node and a second node and a second unit element coupled by way of a second set of switches to the first node and the second node. A second current branch includes a second unit element group having a third unit element coupled by way of a third set of switches to the first node and the second node and a fourth unit element coupled by way of a fourth set of switches to the first node and the second node. A control circuit is configured to provide control signals to the sets of switches based on the output code. The control circuit is further configured to sort unit element currents and to dynamically switch unit elements.