Patents Assigned to NXP
  • Patent number: 10922781
    Abstract: A system for processing multiple images includes an access serializer, trigger controllers, a first-in-first-out (FIFO) memory, and an image signal processing (ISP) pipeline circuit. The access serializer serializes access requests that are associated with processing of input image lines of the images. The trigger controllers decode corresponding serialized access requests to generate trigger identifiers (IDs), respectively. The FIFO memory receives a corresponding trigger ID from each trigger controller and provides the trigger IDs to the ISP pipeline circuit based on an order of reception of the trigger IDs. The ISP pipeline circuit receives the input image lines associated with the trigger IDs, and based on a corresponding set of configuration parameters associated with the input image lines, processes the input image lines in an order of reception of the trigger IDs, to generate processed image lines, respectively.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, INC.
    Inventors: Chanpreet Singh, Stephan Matthias Herrmann, Rahul Jain, Gaurav Gupta, Pranshu Agrawal, Navarshi Dhiman
  • Patent number: 10924589
    Abstract: A RF transceiver for a mesh network node is described. The RF transceiver includes a RF transmitter and a RF receiver coupled to the processor. The RF transceiver is configured in a normal mode of operation as a network node in a wireless mesh network and is configured in a service mode of operation as a network node in a tree network.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventor: Bruno De Smet
  • Patent number: 10921439
    Abstract: A wireless ranging system generates, at a first device, a first plurality of counts, each of the first plurality of counts indicative of a transmit time of a corresponding packet, and further generates a second plurality of counts, each of the second plurality of counts indicative of a receive time of a corresponding packet. In response to a number of samples of the first plurality of counts exceeding a threshold, the system generates a plurality of timestamps based on the first plurality of counts and the second plurality of counts and generates a plurality of time-of-flight values based on the plurality of timestamps. Based on a combination of the plurality of the time-of-flight values, the wireless ranging system generates an effective time-of-flight value and identifies a distance between the first device and as second device based on the effective time-of-flight value.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Khurram Waheed, Carlos Alberto Neri Castellanos
  • Patent number: 10921435
    Abstract: A method (400) of detecting an object using a radar system is disclosed. The method comprises transmitting (401) a first radar beam having a first frequency and first radiation pattern (301) from an antenna (500), the first radiation pattern comprising a peak at zero azimuth angle, and detecting (402) a first signal from the object due to a reflection of the first radar beam. A second radar beam having a second frequency and second radiation pattern (302) is transmitted (403) from the antenna (500), the second radiation pattern comprising a peak at a non-zero azimuth angle. A second signal due to a reflection of the second radar beam from the object is detected (404), and the first signal and the second signal compared (405) to determine an angular location of the object relative to the zero azimuth angle.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP USA, INC.
    Inventors: Ziqiang Tong, Ralf Reuter, Arnaud Sion
  • Patent number: 10924142
    Abstract: Exemplary aspects are directed to FM-radio receivers and methods to assess signals in a desired channel. In one example, a method includes demodulating a broadcast signal associated with a radio-frequency transmission using a desired-channel bandwidth setting and, in response, provide a first frequency-selective demodulated signal (e.g., MPX signal in an FM broadcast) and provide a magnitude indication, such as the raw signal level, of a second demodulated signal that is less frequency selective than the first frequency-selective demodulated signal. A level estimation circuit is used to assess a running representation (or effective average) of the magnitude indication over time. In this manner, a speed or rate at which the level estimator assesses the running representation is controlled based on a degree of deviation or offset as indicated by the first frequency-selective demodulated signal relative to a carrier frequency used for the broadcast signal.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventor: Erik Keukens
  • Patent number: 10923451
    Abstract: Semiconductor dies including ultra-thin wafer backmetal systems, microelectronic devices containing such semiconductor dies, and associated fabrication methods are disclosed. In one embodiment, a method for processing a device wafer includes obtaining a device wafer having a wafer frontside and a wafer backside opposite the wafer frontside. A wafer-level gold-based ohmic bond layer, which has a first average grain size and which is predominately composed of gold, by weight, is sputter deposited onto the wafer backside. An electroplating process is utilized to deposit a wafer-level silicon ingress-resistant plated layer over the wafer-level Au-based ohmic bond layer, while imparting the plated layer with a second average grain size exceeding the first average grain size. The device wafer is singulated to separate the device wafer into a plurality of semiconductor die each having a die frontside, an Au-based ohmic bond layer, and a silicon ingress-resistant plated layer.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Tianwei Sun, Jaynal A. Molla
  • Patent number: 10922522
    Abstract: A finger vein recognition system includes an IR camera, a handle with a sensor and a IR LED array, and a microprocessor for controlling the LED array and processing image signals received from the camera. The luminescence of each LED in the LED array can be changed based on the position of a user's fingers and the environment, which improves the quality of images captured by the IR camera. The sensor detects the proximity of a user and activates the system.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Yuyun Hu, Xiaopeng Chen, Kai Zhu
  • Patent number: 10921421
    Abstract: A radar module (100; 200) comprises a low temperature co-fired ceramic, LTCC, substrate (101; 201), with a radar chip (102; 202) attached to a first surface (101a; 201a) of the LTCC substrate (101; 201) and a transmitting antenna (105, 106) for transmitting the radar signal attached to a second surface (101b; 201b) of the LTCC substrate (101; 201). The radar chip (102; 202) is configured to generate a radar signal for transmission. The transmitting antenna (105, 106) is configured to communicate with the radar chip (102; 202) through the LTCC substrate (101; 201). The radar module (100; 200) further comprises a beam steering element (205) configured to introduce a phase delay to the radar signal in order to adjust a first component of a direction of transmission of the radar signal.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP USA, INC.
    Inventors: Arnaud Sion, Ralf Reuter, Shamsuddin Ahmed, Ernst Seler
  • Patent number: 10925125
    Abstract: A solid-state heating apparatus may be incorporated into stand-alone appliances or other systems. The heating apparatus may include an impedance matching network coupled between an electrode and a radio-frequency (RF) source. The impedance matching network may be a variable impedance matching network that can be adjusted during the heating operation. The impedance matching network may include planar inductors formed from patterned conductive layers disposed either side of a substrate.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Qi Hua, Changyang Wang
  • Patent number: 10924307
    Abstract: A continuous time linear equalization (CTLE) circuit is disclosed. The CTLE circuit includes an input port, an output port, a first differential transistor pair coupled to the input port and the output port and a second differential transistor pair. The CTLE circuit further includes a first degenerative impedance circuit coupled between the first differential transistor pair and ground. The first degenerative impedance includes switchable components to vary impedance of the first degenerative impedance circuit. The CTLE circuit also includes a second degenerative impedance circuit coupled between the second differential transistor pair and ground. The second degenerative impedance includes switchable components to vary impedance of the second degenerative impedance circuit, wherein the resistive part of the impedance of the first degenerative impedance circuit is equal to the impedance of the second degenerative impedance circuit.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventors: Xu Zhang, Siamak Delshadpour
  • Patent number: 10921443
    Abstract: An automotive radar system comprises: a master module, a first radar module, a second radar module, and an optical waveguide arrangement operably coupling the master module to the first and second radar modules. The master module comprises an electro-optical interface device having an electrical domain side and an optical domain side. The optical domain side is operably coupled to the optical waveguide arrangement. The master module comprises a digital clock signal generator operably coupled to the electrical domain side of the electro-optical interface device.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventors: Ernst Seler, Gustavo Adolfo Guarin Aristizabal
  • Patent number: 10923964
    Abstract: A power-transmitter-unit includes a power-transmitting-coil for wirelessly providing power to a power-receiver-unit, and a resonant-capacitor connected to the power-transmitting-coil, such that together they define an LC circuit. The LC circuit includes a first-end and a second-end. A controller defines a foreign-object-detection-mode of operation, wherein, in the foreign-object-detection-mode of operation, the first-end of the LC circuit is connected to the second-end of the LC circuit such that the LC circuit is short-circuited and defines a closed-LC-circuit, and the controller is configured to receive a coil-current-signal that is representative of the current through the closed-LC-circuit.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Zbynek Mynar, Jozef Cicka, Vojt{hacek over (e)}ch Musil
  • Patent number: 10921436
    Abstract: An apparatus for resolving velocity ambiguity in a MIMO RADAR includes a plurality of transmit channels and a virtual channel Each transmit channel includes a transmit antenna configured to transmit a plurality of chirps. Each chirp includes a frequency ramp of a transmit frequency of the respective transmit channel. Each transmit channel is orthogonal to another transmit channel and to a virtual transmit channel. A waveform generator is configured to generate a local oscillator (LO) signal for each transmit channel. A frequency offset circuit is configured to modify the LO signal of each transmit channel with a respective frequency offset to generate the respective transmit frequency.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventor: Feike Guss Jansen
  • Patent number: 10921390
    Abstract: An integrated circuit includes a magneto resistive RAM (MRAM) array having a plurality of MRAM cells, and a set of at least one Hall sensor circuit, each of the set including a Hall sensor to detect a magnetic field. The integrated circuit also includes magnetic processing circuitry for receiving at least one indication from the set of at least one Hall sensor circuit. The magnetic processing circuitry including an output to provide an indication of a possible magnetic field threat to the MRAM array based on the at least one indication from the set.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Nihaar N. Mahatme, Mehul D. Shroff
  • Patent number: 10922264
    Abstract: A transceiver for sending and receiving data from a controller area network (CAN) bus I disclosed. The transceiver is configured to detect if a node, after losing an arbitration, has sent a dominant bit on the CAN bus. The transceiver further configured to send a predefined bit pattern on the CAN bus after receiving the dominant bit from the node.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventors: Anthony Adamson, Georg Olma
  • Patent number: 10923286
    Abstract: A device that incorporates teachings of the subject disclosure may include, for example, a multilayer initial oxide on a silicon substrate, where the multilayer initial oxide comprises amorphous polysilicates and a group one metal or a group two metal; a first electrode layer on the multilayer initial oxide; a dielectric layer on the first electrode layer; a second electrode layer on the dielectric layer, where an edge alignment spacing between at least one pair of corresponding electrode edges of two electrode layers of the capacitor is two microns or less; and connections for the first and second electrode layers. Other embodiments are disclosed.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Marina Zelner, Andrew Vladimir Claude Cervin, Edward Horne
  • Patent number: 10921434
    Abstract: A method of detecting an object is disclosed, comprising generating a transmission signal by generating a carrier signal and digitally modulating the carrier signal with a transmission modulation signal, and transmitting the transmission signal. A reflected signal is received, the reflected signal having been reflected from the object, and demodulated to extract a received modulation signal. The received modulation signal is correlated with the transmission modulation signal and a range of the object is determined from the correlation of the received modulation signal and the transmission modulation signal.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 16, 2021
    Assignee: NXP B.V.
    Inventors: Gustavo Guarin Aristizabal, Ralf Reuter, Maik Brett
  • Publication number: 20210042890
    Abstract: A system, method, and apparatus are provided for correcting image distortions in an image processing hardware unit by specifying an input block having a dynamic or adaptive size that is capable of storing up to a plurality of distorted input sub-images from an array of distorted input sub-images stored in external memory that is connected to the image processing hardware unit, and then fetching one or more first distorted input sub-images from the external memory for storage in internal memory of the image processing hardware using the input block to perform a single read operation so that the image processing hardware can then process the one or more first distorted input sub-images as a group for distortion correction to generate a one or more first corrected output tiles.
    Type: Application
    Filed: August 5, 2019
    Publication date: February 11, 2021
    Applicant: NXP USA, Inc.
    Inventors: Sharath Subramanya Naidu, Ajit Singh, Michael Andreas Staudenmaier
  • Publication number: 20210042447
    Abstract: A fully digital integrated circuit apparatus (200) and method (300) are provided for generating a test mode enable signal with a digital non-resettable state retention storage circuit (210) connected to store an authentication control pattern for authorizing test mode access to a secure circuit, a digital safety interlock gate circuit (220) connected to store a safety interlock gate setting that may be accessed independently from a test mode enable signal, and combinatorial logic circuitry (205) for generating the test mode enable signal only when the interlock safety gate setting is set to a first value and the digital non-resettable state retention storage circuit stores the authentication control code.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 11, 2021
    Applicant: NXP USA, Inc.
    Inventors: Stefan Doll, Thomas Henry Luedeke, Nikila Krishnamoorthy, Hubert Glenn Carson, JR., Anurag Jindal, Hilario Manuel Garza, Kamel Musa Khalaf, Joel Ray Knight, Adrian Lee Carleton
  • Patent number: 10917065
    Abstract: A system and method for tuning an impedance network of a device is provided. An RF signal is provided through a transmission path connected to an impedance matching network that includes a first variable component and a second variable component. A phase angle between a forward signal and a reflected signal along the transmission path is determined. Based on the phase angle between the forward signal and the reflected signal, the first variable component is modified to improve an impedance match between the RF signal source and the electrode. After modifying the first variable component, a ratio of a power of the reflected signal to a power of the forward signal is determined, and an inductance of the second variable component is modified to reduce the ratio of a power of the reflected signal to a power of the forward signal.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: February 9, 2021
    Assignee: NXP USA, Inc.
    Inventors: Lionel Mongin, Pierre Marie Jean Piel, James Eric Scott