Patents Assigned to NXP
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Patent number: 10890935Abstract: A low voltage bandgap reference circuit (200) is provided which includes a first current generator (202) having first and second circuit branches which include, respectively, first and second bipolar transistors having different sizing reference values for generating a first current at a first resistor that varies proportionally as a function of temperature; a second current generator (204, 205) having a third circuit branch which includes one or more field effect transistors and no bipolar transistors for generating a second current that varies inversely as a function of temperature; and a third circuit (206) connected to generate a bandgap reference current in response to the first current and the second current.Type: GrantFiled: February 22, 2019Date of Patent: January 12, 2021Assignee: NXP USA, Inc.Inventors: Guillaume Mouret, Yann Cargouet, Thierry Sicard
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Patent number: 10892617Abstract: An input protection circuit (200) and associated method are disclosed for protecting a circuit input (VINP) from positive and negative overvoltages at an input voltage (VIN) with a high-voltage PMOSFET (P1) having a gate, a drain connected across a zener diode (ZD1) to the gate, and a source connected to receive an input voltage; a blocking FET (N1) having a gate connected to a power supply voltage, a drain connected across a zener diode (ZD2) to the power supply voltage, and a source connected to the gate of the high-voltage PMOSFET; a high-voltage NMOSFET (N3) having a gate connected to the power supply voltage, a source providing the protected output voltage and connected across a zener diode (ZD3) to the gate, and a drain connected to a source follower node and a level shifter circuit (214) connected between the drain of the high-voltage PMOSFET and the source follower node.Type: GrantFiled: March 28, 2019Date of Patent: January 12, 2021Assignee: NXP USA, Inc.Inventors: William E. Edwards, John M. Pigott
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Patent number: 10892229Abstract: Embodiments for a packaged semiconductor device and methods of making are provided herein, where a packaged semiconductor device includes a package body having a recess in which a pressure sensor is located; a polymeric gel within the recess that vertically and laterally surrounds the pressure sensor; and a media shield including at least one metal layer on a top surface of the polymeric gel, wherein the media shield and the polymeric gel are sufficiently flexible to transmit pressure to the pressure sensor.Type: GrantFiled: April 5, 2019Date of Patent: January 12, 2021Assignee: NXP USA, INC.Inventors: Stephen Ryan Hooper, Dwight Lee Daniels, Thomas Cobb Speight, Gary Carl Johnson
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Patent number: 10891248Abstract: A method for communicating between a combo-endpoint device, wireless router and a wireless communication device includes monitoring communication patterns of wireless data communications between a wireless router and radio-communication circuitry of a combo-endpoint device, and storing data indicative of communication times of the wireless router based on the monitored communication patterns. The method further includes configuring a frequency-hopping(FH)-based protocol by defining connection periods according to time windows and selected frequencies for wireless communication of data between the wireless communication device and the radio-communication circuitry, and by establishing the time windows to not substantially conflict with the communication times of the wireless router.Type: GrantFiled: May 15, 2017Date of Patent: January 12, 2021Assignee: NXP B.V.Inventors: Hong Li, Fabian Rivière, Christopher John Gray
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Patent number: 10891071Abstract: A method, system, program control code, and hardware circuit are provided for predicting performance of an system-on-chip (SoC) (100) having a processor (105) and a master device (106) having shared access to a single-port memory (104) by activating a timer (102) in a Performance Monitoring Unit (PMU) (101) to measure a specified number of cycles of the processor in a defined measure instance and by activating a memory access counter (103) in the PMU to measure a first count of memory access requests to the single-port memory by the processor in the defined measure instance and to measure a second count of memory access requests to the single-port memory by the master device in the defined measure instance, so that the first and second counts are stored in memory.Type: GrantFiled: May 15, 2018Date of Patent: January 12, 2021Assignee: NXP USA, Inc.Inventors: Yuan Li, Eric Simard, Xiao Sun
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Patent number: 10892361Abstract: A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.Type: GrantFiled: January 20, 2020Date of Patent: January 12, 2021Assignee: NXP USA, INC.Inventors: Zihao M. Gao, Christopher Paul Dragon, Walter Sherrard Wright
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Patent number: 10890933Abstract: The disclosure relates to voltage regulators and more specially voltage regulators including error detection and correction mechanisms. Example embodiments include a voltage regulator comprising: an input arranged to receive a trim signal used to specify a target voltage at an output of the regulator; a comparator arranged to compare a voltage derived from the trim signal to the voltage at the output of the regulator; a filter arranged to filter an output of the comparator; a checksum module comprising first and second portions arranged to calculate first and second checksums respectively from a plurality of states associated with the voltage regulator and to provide an error signal equal to the difference between the first and second checksums; and an adjustment module arranged to receive the error signal and adjust one or more of the plurality of states if the error signal is non-zero.Type: GrantFiled: October 3, 2019Date of Patent: January 12, 2021Assignee: NXP B.V.Inventor: Jan-Peter Schat
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Patent number: 10893433Abstract: Embodiments are directed to methods and apparatuses for wireless vehicular communications involving retransmission of messages. A method for communicating by vehicular communications circuitry of a device includes, in a wireless communications network in which a message is broadcasted by vehicular communications circuitry of a device for asynchronous receptions by other circuitry in one or more devices configured to wirelessly communicate according to a communications protocol, monitoring a channel busy ratio associated with channels in a designated range of frequency pertaining to the wireless communications network. The method further includes assessing whether to retransmit the message as a function of the channel busy ratio, and in response to the channel busy ratio being outside a threshold, retransmitting the message according to the communications protocol.Type: GrantFiled: June 25, 2019Date of Patent: January 12, 2021Assignee: NXP B.V.Inventors: Vincent Pierre Martinez, Alessio Filippi
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Patent number: 10891933Abstract: An audio processing system is described including an amplifier configured to receive a first audio signal and output the first audio signal to an acoustic transducer comprising a voice coil. A sensor detects a signal corresponding to voice coil current of the acoustic transducer. A controller compares the first audio signal and the detected signal and determines a second audio signal from the comparison. The second audio signal is representative of an external sound source detected via the acoustic transducer. The audio processing system may simultaneously output the first audio signal and receive the second audio signal using the same acoustic transducer.Type: GrantFiled: September 5, 2019Date of Patent: January 12, 2021Assignee: NXP B.V.Inventors: Fre Jorrit Jorritsma, Quino Sandifort, Albertus de Man, Mattheus Johan Koerts
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Patent number: 10886774Abstract: A method for switching a power supply for low current standby operation includes deactivating a first supply connected to a first supply node, in response to activating an enable signal. A second supply is changed to a low power mode in response to activating the enable signal, wherein the second supply is connected to a second supply node. The first supply node is connected to the second supply node in response to a first voltage of the first supply node being less than or equal to a positive offset above a second voltage of the second supply node. The first supply node is disconnected from the second supply node in response to deactivating the enable signal, wherein the first supply node is disconnected at a rate preventing the first supply node from discharging below a first supply minimum voltage.Type: GrantFiled: October 30, 2018Date of Patent: January 5, 2021Assignee: NXP USA, Inc.Inventors: Keith Jackoski, Arif Alam
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Patent number: 10886959Abstract: Embodiments are directed to a buffer circuit that includes a first circuit and a second circuit. The first and second circuits include sets of transistors along pairs of related signal paths, each of the transistors being driven in response to two related input signals having different but related phases. The first circuit generates a first related output signal in response to one of the pairs of related signal paths and the second circuit generates a second output signal in response to another of the pairs of related signal paths. The first and second circuits provide a linear transfer function across one of the first and one of the second sets of transistors via one of the first pair and second pair of related signal paths.Type: GrantFiled: March 27, 2019Date of Patent: January 5, 2021Assignee: NXP B.V.Inventors: Andreas Johannes Köllmann, Bernard Burdiek
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Patent number: 10886399Abstract: A semiconductor device, such as a laterally diffused metal-oxide-semiconductor (LDMOS) transistor, includes a semiconductor substrate in which a source region and a drain region are disposed. The drain region has a drain finger terminating at a drain end. A gate structure is supported by the semiconductor substrate between the source region and the drain region, the gate structure extending laterally beyond the drain end. A drift region in the semiconductor substrate extends laterally from the drain region to at least the gate structure. The drift region is characterized by a first distance between a first sidewall of the drain finger and a second sidewall of the gate structure, and the gate structure is laterally tilted away from the drain region at the drain end of the drain finger to a second distance that is greater than the first distance.Type: GrantFiled: September 7, 2018Date of Patent: January 5, 2021Assignee: NXP USA, Inc.Inventor: Philippe Renaud
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Patent number: 10880138Abstract: An acquisition detector and method include a preamble detector configured to search in a plurality of symbols for a preamble match with a known preamble pattern when a power level of the input signal exceeds a determined noise threshold. The acquisition detector further includes a frame delimiter detector configured to search in the plurality of symbols for a frame delimiter match with a known frame delimiter pattern when the preamble match is identified and the power level of the input signal exceeds a determined noise threshold.Type: GrantFiled: August 15, 2019Date of Patent: December 29, 2020Assignee: NXP USA, Inc.Inventors: Mihai-Ionut Stanciu, Khurram Waheed, Raja Venkatesh Tamma, Claudio Gustavo Rey
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Patent number: 10878204Abstract: In accordance with a first aspect of the present disclosure, a system is provided for verifying whether objects belong to a predefined set, the system comprising: a first radio frequency, RF, communication device comprised in or attached to a first object a second RF communication device comprised in or attached to a second object; an RF communication reader configured to perform a read operation; wherein a first portion of a valid response is provided in the first RF communication device and wherein a second portion of said valid response is provided in the second RF communication device; the system being configured to produce a positive verification result if the RF communication reader receives a sum of the first portion of the valid response and the second portion of the valid response. In accordance with a second aspect of the present disclosure, a corresponding method is conceived for verifying whether objects belong to a predefined set.Type: GrantFiled: September 19, 2019Date of Patent: December 29, 2020Assignee: NXP B.V.Inventor: Franciscus Maria Vermunt
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Patent number: 10877087Abstract: An audio system has an amplifier having first and second power stages configurable to drive a speaker, each power stage having two transistors connected in series. Each of one or more analog-to-digital converters is connected to measure a corresponding voltage drop across a corresponding transistor. A processor is connected to characterize the operation of the audio system based on the measured voltage drops. The ADC(s) and the processor can be used during start-up and/or run-time operations of the audio system to determine or detect transistor ON resistance, system lag time, speaker current, open-load faults, shorted-load faults, and short-to-Vdd/Vss faults. To avoid errors, the processor determines or detects and avoids under-drive conditions, high-frequency conditions, ripple-current periods, and lag-time periods while characterizing the system operations.Type: GrantFiled: November 21, 2019Date of Patent: December 29, 2020Assignee: NXP B.V.Inventors: Ashutosh Ravindra Joharapurkar, Arvind Sherigar, Sounak Maji
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Patent number: 10879168Abstract: A transistor includes an active region bounded by an outer periphery and formed in a substrate. The active region includes sets of input fingers, output fingers, and common fingers disposed within the substrate and oriented substantially parallel to one another. The transistor further includes an input port, an output port, a first via connection disposed at the outer periphery of the active region proximate the input port and a second via connection disposed at the outer periphery of the active region proximate the output port. The second via connection has a noncircular cross-section with a second major axis and a second minor axis, the second major axis having a second major axis length, the second minor axis having a second minor axis length that is less than the second major axis length. The second major axis is oriented parallel to a longitudinal dimension of the input, output, and common fingers.Type: GrantFiled: February 24, 2020Date of Patent: December 29, 2020Assignee: NXP USA, Inc.Inventor: Darrell Glenn Hill
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Patent number: 10880767Abstract: A contactless communication device includes a near field communication (NFC) module for generating an electromagnetic carrier signal and modulating the carrier signal according to data to be transmitted, and an antenna circuit coupled to and driven by said NFC module with the modulated carrier signal. The device includes an RF front end coupled between said NFC module and said antenna circuit and further includes a protocol detection circuit for detecting a protocol mode in response to an incoming signal received by the device. The protocol detection circuit includes a plurality of filters being adapted to generate an envelope of the incoming signal; a plurality of decoders being adapted to generate an output in response to a respective envelope generated by a corresponding one of the plurality of filters; and a decision unit being adapted to detect a protocol mode based on the output from each of the plurality of decoders.Type: GrantFiled: November 21, 2019Date of Patent: December 29, 2020Assignee: NXP B.V.Inventors: Steve Charpentier, Ulrich Andreas Muehlmann, Stefan Mendel
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Patent number: 10879788Abstract: A power factor corrector circuit and a method of operating the power factor corrector circuit include a power factor corrector operable in a conduction mode within an operating frequency between a minimum value and a maximum value. A measured variable k1 can define a relation between a predetermined level set for a current ripple of a peak current Ipeakh minus a peak current Ipeakl in combination with a variable a that sets a ratio between a primary and secondary stroke interval and a resulting time period.Type: GrantFiled: June 28, 2019Date of Patent: December 29, 2020Assignee: NXP B.V.Inventor: Hans Halberstadt
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Publication number: 20200402698Abstract: An integrated circuit transformer (150) is formed with a primary winding (91) located in at least a first winding layer having a first thickness, a secondary winding (92) located in at least the first winding layer and having a first center point at the first side of the transformer and two secondary terminals at a second, opposite side of the transformer, and a first center tap feed line (81) located along a symmetry axis of the transformer in an upper metal layer having a second thickness that is at least equivalent to the first thickness of the first winding layer, wherein the first center tap feed line has a direct electrical connection to the first center point in the secondary winding.Type: ApplicationFiled: June 24, 2019Publication date: December 24, 2020Applicant: NXP B.V.Inventors: Lukas Frederik Tiemeijer, Bartholomeus Wilhelmus Christiaan Hovens, Maarten Lont
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Publication number: 20200402918Abstract: A saw bow is provided and designed such that the conductors of the saw bow will break at a predictable location when using modern dicing techniques. This results in a break in the circuit provided by the saw bow, with any exposed conductors not being on the die side. Further, by providing a known breaking point in the saw bow, modern dicing techniques such as plasma dicing can be used, thereby allowing for the saw lane to be made narrower, which will in turn increase the number of wafers that can be included on a wafer.Type: ApplicationFiled: June 18, 2019Publication date: December 24, 2020Applicant: NXP B.V.Inventors: Antonius Hendrikus Jozef Kamphuis, Johannes Cobussen, Christian Zenz, Guido Albermann