Abstract: A camera device includes a single imaging sensor, a plurality of imaging objectives associated with the single imaging sensor, and a plurality of dedicated image areas within the single imaging sensor, each of the plurality of dedicated image areas corresponding to a respective one of the plurality of imaging objectives, such that images formed by each of the plurality of imaging objectives may be recorded by the single imaging sensor.

Abstract: A pixel cell for use in a high dynamic range image sensor includes a photodiode disposed in semiconductor material to accumulate charge in response to light incident upon the photodiode. A transfer transistor is disposed in the semiconductor material and is coupled between a floating diffusion and the photodiode. A first amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal of the pixel cell. A second amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell.

Abstract: An image sensor includes a pixel array having pixels arranged in rows and columns, a first successive-approximation-register (“SAR”) analog-to-digital-converter (“ADC”), a second SAR ADC, and first and second control circuitry. The first SAR ADC includes a first capacitor array (“FCA”) that shares a first common terminal coupled to a first comparator and coupled to receive first analog pixel signals. The second SAR ADC includes a second capacitor array (“SCA”) that shares a second common terminal selectably coupled to a second comparator and coupled to receive second analog pixel signals. The first and second control modules are coupled to selectably switch bottom plates of the FCA from a low reference voltage to the high reference voltage at a same time as selectably switching bottom plates of the SCA from a high reference voltage to the low reference voltage.

Abstract: Techniques and mechanisms for circuitry to provide video data for loading to a buffer. In an embodiment, a loader circuit receives video data and determines MX data for a video frame and NZ data for the video frame, wherein M and N are different respective dimensions of a color space, and wherein X is a first encoding type and Z is a second encoding type. The first MX data includes data representing a first portion of a color component value, and the first NZ data includes data representing a second portion of that color component value. In another embodiment, the loader circuit sends the MX data via a first channel while sending the NZ data via a second channel to a random access buffer.

Abstract: A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is disposed in the first region and coupled between the photodiode and the floating diffusion to selectively transfer image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure lined with a dielectric layer inside the DTI structure is disposed in the semiconductor material isolates the first region on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. Doped semiconductor material inside the DTI structure is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.

Abstract: A keyboard camera device has a key array forming a keyboard and at least one camera configured with the keyboard and positioned with a field of view to view a user of the keyboard. An interface unit includes a keyboard controller for interfacing with an array of keys of the keyboard to detect key operations, a camera controller for controlling the at least one camera to capture images, and a host interface for receiving indication of the key operations and the images and for communicating the key operation indications and the images to one communication port of a computer.

Abstract: Embodiments of the invention describe providing a compact solution to provide high dynamic range imaging (HDRI or simply HDR) for an imaging pixel by utilizing a control node for resetting a floating diffusion node to a reference voltage value and for selectively transferring an image charge from a photosensitive element to a readout node. Embodiments of the invention further describe control node to have to a plurality of different capacitance regions to selectively increase the overall capacitance of the floating diffusion node. This variable capacitance of the floating diffusion node increases the dynamic range of the imaging pixel, thereby providing HDR for the host imaging system, as well as increasing the signal-to-noise ratio (SNR) of the imaging system.

Abstract: A method of capturing an image includes activating a first image sensor and capturing a sequence of images with a second image sensor. A determination is made as to whether the sequence of images captured by the second image sensor includes a shutter gesture. If a shutter gesture is included in the sequence of images captured by the second image sensor, the first image sensor captures a target image in response.

Abstract: Techniques and architectures for providing a coating for one or more micro-lenses of a pixel array. In an embodiment, a pixel element includes a micro-lens and a coating portion extending over a surface of the micro-lens, where a profile of the coating portion is super-conformal to, or at least conformal to, a profile of the micro-lens. In another embodiment, the coating portion is formed at least in part by orienting the surface of the micro-lens to face generally downward with the direction of gravity, the orienting to allow a fluid coating material to flow for formation of the coating portion.

Abstract: A circuit for providing signal amplification with reduced fixed pattern noise. In an embodiment, the circuit includes an amplifier and a plurality of legs coupled in parallel with one another between a first node for an input of the amplifier and a second node for an output of the amplifier. Control logic selects a first combination of the plurality of legs for a first configuration of the circuit to provide a first loop gain with the amplifier. In another embodiment, the control logic further selects a second combination of the plurality of legs for a second configuration of the circuit to provide a second loop gain with the amplifier, wherein the first loop gain is substantially equal to the second loop gain.

Abstract: A projector panel includes pixel display, a display controller, and a pattern generator. The pattern generator is operative to output pixel data indicative of at least one application specific predetermined pattern. In a particular embodiment, the projector panel is a liquid-crystal-on-silicon panel. In another particular embodiment, the projector panel is adapted for selective use in either structured light projection systems or conventional video projection systems.

Abstract: Embodiments of a pixel including a photosensitive region formed in a surface of a substrate and an overflow drain formed in the surface of the substrate at a distance from the photosensitive area, an electrical bias of the overflow drain being variable and controllable. Embodiments of a pixel including a photosensitive region formed in a surface of a substrate, a source-follower transistor coupled to the photosensitive region, the source-follower transistor including a drain, and a doped bridge coupling the photosensitive region to the drain of the source-follower transistor.

Abstract: A backside illuminated image sensor has a carbon nanotube transparent conductive coating formed on the backside of the image sensor. In one implementation the carbon nanotube transparent conductive coating acts as a wavelength selective filter to filter out infrared light. In one implementation the carbon nanotube transparent conductive coating has an optical transparency between 50% and 80% for blue and green color bands.

Abstract: An apparatus for a dual-sided image sensor is described. The dual-sided image sensor captures frontside image data incident upon a frontside of the dual-sided image sensor within an array of photosensitive regions integrated into a semiconductor layer of the dual-sided image sensor. Backside image data incident upon a backside of the dual-sided image sensor is also captured within the same array of photosensitive regions.

Abstract: A method for forming an image sensor device is provided. First, a lens is provided and a first sacrificial element is formed thereon. An electromagnetic interference layer is formed on the lens and the first sacrificial element, and the first sacrificial element and electromagnetic interference layer thereon are removed to form an electromagnetic interference pattern having an opening exposing a selected portion of the lens. A second sacrificial element is formed in the opening to cover a center region of the selected portion of the lens. A peripheral region of the selected portion of the lens remains exposed. A light-shielding layer is formed on the electromagnetic interference pattern, second sacrificial element, and peripheral region of the selected portion of the lens. The second sacrificial element and light-shielding pattern are removed to expose the center region of the selected portion of the lens as a light transmitting region.

Abstract: Embodiments of an apparatus including a color filter arrangement formed on a substrate having a pixel array formed therein. The color filter arrangement includes a clear filter having a first clear hard mask layer and a second clear hard mask layer formed thereon, a first color filter having the first clear hard mask layer and the second hard mask layer formed thereon, a second color filter having the first clear hard mask layer formed thereon, and a third color filter having no clear hard mask layer formed thereon. Other embodiments are disclosed and claimed.

Abstract: A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.

Abstract: A hybrid ADC having a successive approximation register (SAR) ADC mode for generating a bit of a digital signal and a ramp ADC mode for generating an additional bit of the digital signal is disclosed. When in the SAR ADC mode, a control circuit is configured to disable a ramp signal generator; disable a counter; and enable a register to control an offset stage to set the magnitude of an offset voltage that is provided to an input of a comparator of the ADC. When in the ramp ADC mode, the control circuit is configured to enable the ramp signal generator to provide a ramp signal to the input of the comparator; enable the counter to begin providing the digital count in response to the output of the comparator; and disable the register so that the offset stage is not providing the offset voltage.

Abstract: An integrated circuit system includes a first device wafer having a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer having a second semiconductor layer proximate to a second metal layer including a second conductor is disposed within a second metal layer oxide. A frontside of the first device wafer is bonded to a frontside of the second device wafer at a bonding interface. A conductive path couples the first conductor to the second conductor through the bonding interface. A first metal EMI shield is disposed in one of the first metal oxide layer and second metal layer oxide layer. The first EMI shield is included in a metal layer of said one of the first metal oxide layer and the second metal layer oxide layer nearest to the bonding interface.

Abstract: A pixel cell includes a storage transistor including a deep implant storage region having a first polarity is implanted in a semiconductor substrate to store image charge accumulated by a photodiode. A transfer transistor is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a readout node. A first shallow implant region having the first polarity is implanted in the semiconductor substrate under a first spacer region between a transfer gate of the transfer transistor and a storage gate of the storage transistor. A second shallow implant region having the first polarity is implanted in the semiconductor substrate under a second spacer region between the storage gate and the output gate.