Abstract: A wafer level image module includes a photo sensor for outputting an electrical signal upon receiving light, a lens set for focusing incident light onto the photo sensor, and an adjustment member disposed between the photo sensor and the lens set for controlling the distance between the photo sensor and the lens set to compensate the focus offset of the photo sensor for enabling the lens set to accurately focus the incident light onto the photo sensor in an in-focus manner so as to provide a high image quality.

Abstract: A CMOS (Complementary Metal Oxide Semiconductor) pixel for sensing at least one selected from a biological, chemical, ionic, electrical, mechanical and magnetic stimulus. The CMOS pixel includes a substrate including a backside, a source coupled with the substrate to generate a background current, and a detection element electrically coupled to measure the background current. The stimulus, which is to be provided to the backside, affects a measurable change in the background current.

Abstract: A backside illuminated imaging sensor includes a vertical stacked sensor that reduces cross talk by using different silicon layers to form photodiodes at separate levels within a stack (or separate stacks) to detect different colors. Blue light-, green light-, and red light-detection silicon layers are formed, with the blue light detection layer positioned closest to the backside of the sensor and the red light detection layer positioned farthest from the backside of the sensor. An anti-reflective coating (ARC) layer can be inserted in between the red and green light detection layers to reduce the optical cross talk captured by the red light detection layer. Amorphous polysilicon can be used to form the red light detection layer to boost the efficiency of detecting red light.

Abstract: A method, associated systems, and apparatus are described for imaging a scene to produce electronic image data representing the scene and having at least one improved characteristic. Encoding optics image and encode electromagnetic energy radiated or reflected from a scene, including its objects and features, and a detector receives the encoded electromagnetic energy to produce electronic image data which is at least partially decoded by a pre-processing operation to produce pre-processed electronic image data, having at least one improved characteristic as a result of cooperation between the encoding and decoding. A subset of the pre-processed image data may include artifacts as a result of the encoding and decoding; the artifacts are further processed by applying a nonlinear post-processing operation that identifies the artifacts in the pre-processed imaged data and compensates the associated image data values while retaining the improved image characteristics in the balance of the pre-processed image data.

Abstract: An image sensing device for receiving an incident light having an incident angle and photo signals formed thereby is provided. The image sensing device includes a micro prism and a micro lens for adjusting the incident angle and converging the incident light, respectively, a photo sensor for converting the photo signals into electronic signals, and an IC stacking layer for processing the electronic signals.

Abstract: An image sensor having an array of pixels disposed in a substrate. The array of pixels includes photosensitive elements, a color filters, and waveguide walls. The waveguide walls are disposed in the color filters and surround portions of the color filters to form waveguides through the color filters. In some embodiments, metal walls may be coupled to the waveguide walls.

Abstract: A CMOS image sensor includes an image pixel array, a dark pixel array, data bit liens, reference bit lines, a driver, comparators, and analog-to-digital converter (“ADC”) circuits. The image pixel array generates analog image signals in response to incident light. The dark pixel array generates analog black reference signals for analog black level calibration of the analog image signals. In one embodiment, the data bit lines each coupled to a different column of image pixels of the image pixel array and the reference bit lines each coupled to a different column of black reference pixels within the dark pixel array. The driver is coupled to the reference bit lines to drive an analog black reference signal. The comparators each couple to one of the data bit lines and each coupled to an output of the driver and offset the analog image signals with the analog black reference signals in an analog domain. The ADC circuits each coupled to an output of a comparator.

Abstract: The invention provides a compact camera module and a method for fabricating the same. A compact camera module includes an image sensor device package. A back spacer ring is disposed on the image sensor device package. A first edge of the back spacer ring is aligned to a second edge of the image sensor device package. An optical lens plate disposed over the back spacer ring. A front spacer ring is sandwiched between the back spacer ring and the optical lens plate. A third edge of the front spacer ring is aligned to a fourth edge of the optical lens plate.

Abstract: Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed.

Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.

Abstract: An image sensor array includes a substrate layer, a metal layer, an epitaxial layer, a plurality of imaging pixels, and a contact dummy pixel. The metal layer is disposed above the substrate layer. The epitaxial layer is disposed between the substrate layer and the metal layer. The imaging pixels are disposed within the epitaxial layer and each include a photosensitive element for collecting an image signal. The contact dummy pixel is dispose within the epitaxial layer and includes an electrical conducting path through the epitaxial layer. The electrical conducting path couples to the metal layer above the epitaxial layer.

Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.

Abstract: A high linearity up-conversion mixer is disclosed, which includes a voltage-to-current conversion circuit and an up-conversion mixer core circuit, the voltage-to-current conversion circuit has a differential signal positive input end for receiving an I/Q-channel positive baseband voltage signal and a differential signal negative input end for receiving an I/Q-channel negative baseband voltage signal, wherein the received positive and negative baseband voltage signals are low pass filtered by the voltage-to-current conversion circuit and are respectively converted to a first and a second current signal; the first and the second current signals are inputted to the up-conversion mixer core circuit to mix with local oscillator signals so as to output high linearity frequency-mixed signals. By embedding low-pass filters into the voltage-to-current conversion circuit of the up-conversion mixer, the present invention can ensure the high linearity of the up-conversion mixer while reduce the chip area and the current.

Abstract: An imaging sensor pixel array includes a semiconductor substrate, a plurality of active pixels and at least one black reference pixel. The plurality of active pixels are disposed in the semiconductor substrate for capturing an image. Each of the active pixels includes a first region for receiving light including a p-n junction for accumulating an image charge and active pixel circuitry coupled to the first region to readout the image charge. The black reference pixel is also disposed within the semiconductor substrate for generating a black level reference value. The black reference pixel includes a second region for receiving light without a p-n junction and black pixel circuitry coupled to the photodiode region without the p-n junction to readout a black level reference signal.

Abstract: A method of mutually aligning first and second imaging system fixturing components forms a first alignment structure on the first imaging system fixturing component, a second alignment structure on the second imaging system fixturing component, and engages the first and second alignment structures to align, with optical accuracy, the first and second imaging system fixturing components.

Abstract: Membrane suspended optical elements include a structured substrate including a plurality of apertures defined therein and an array of optical elements, each of the optical elements being suspended by membrane within one of the apertures.

Abstract: An image sensor includes a first sensor layer having a first array of pixels and a second sensor layer having a second array of pixels. Each pixel of the first and second arrays has a photodetector for collecting charge in response to incident light, a charge-to-voltage conversion mechanism, and a transfer gate for selectively transferring charge from the photodetector to the charge-to-voltage mechanism. The first and second sensor layers each have a thicknesses to collect light with a first and second preselected ranges of wavelengths, respectively. A circuit layer is situated below the first sensor layer and has support circuitry for the pixels of the first and second sensor layers, and interlayer connectors are between the pixels of the first and second layers and the support circuitry.

Abstract: An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.

Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.

Abstract: Techniques to provide a replica bias circuit for a high speed and low voltage common mode driver. In an embodiment, a pre-driver is coupled to provide driver input voltages to the driver, which driver includes a set of circuit elements coupled to provide, based on the driver input voltages, an output signal of a differential output. In another embodiment, a regulator circuit is coupled to provide regulated power to the pre-driver and driver, where the regulator circuit includes a scale replica circuit having a replica of the first set of circuit elements.